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Wed, 30 Sep 2026 01:31:47 -0700 (PDT) X-Received: by 2002:a05:620a:4398:b0:93c:8d49:ee4c with SMTP id af79cd13be357-93ca96b42b4mr84392585a.27.1790757107064; Wed, 30 Sep 2026 01:31:47 -0700 (PDT) Received: from [192.168.25.64] ([94.155.124.210]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a017520e1bsm29919385e9.6.2026.09.30.01.31.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Sep 2026 01:31:46 -0700 (PDT) Message-ID: <9394c0d0-1d40-4237-8481-3f7cbebf9980@oss.qualcomm.com> Date: Wed, 30 Sep 2026 11:31:44 +0300 Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/3] interconnect: qcom: Add CAMNOC interconnect provider driver To: Bryan O'Donoghue , Atanas Filipov , Georgi Djakov , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov References: <20260819093211.1436275-1-atanas.filipov@oss.qualcomm.com> <20260819093211.1436275-3-atanas.filipov@oss.qualcomm.com> Content-Language: en-US From: "Gjorgji Rosikopulos (Consultant)" In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYwOTMwMDAzMyBTYWx0ZWRfX33q83GMfhJPs SkaygP0eRt0RzdE9czPVgEmTOxqnRHXG+1elZD0I3aELGNFhAnWIfiaMDpnJZ41r7v4ArkLIsY3 DFknMNKNrvKYtqpjt31mGsUZjSuUVZE= X-Proofpoint-ORIG-GUID: lDnZVHigItGkE6ABWd-BAmvKX8UlOtKo X-Authority-Analysis: v=2.4 cv=VrC2kO2n c=1 sm=1 tr=0 ts=6abcc8f4 cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=eGCDHFSXubCXFTSSGhjuOA==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=lZvclhIxJYcy508GXbEA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-GUID: lDnZVHigItGkE6ABWd-BAmvKX8UlOtKo X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTMwMDAzMyBTYWx0ZWRfX3vzKbAX6RXOR 1k8DJJeanadMDQxUUESSqiLzAz853CLUSW16ssS/GWO3bo92yWZVyUoSmNs65Dl0CYTGLBkZErz u7Gl0F4WU5jTVGTOdJSpg8B5nZZTW6EIx83M7bzkKjAXjbFlZW3zG/LjZwf68KxGzB6TH5k7y28 IpTu+mhDoA5ni73Qo0C4sXk/UjDhLOxj2jFk5vbB7yO1OcqFAIdDLnuExg4Ho7BGxvxcuXgJhug NAI0geCxoHIMutcVl3yCcAcG97KzQ4BcOa5I2PMnLNC3Mnhi3UG7BsCFu4/vhShkGjdft2DpFhh ggw95+GwONl5zoE6LWbGKcBqFC+th//coDr5kMhtF/o+SxH9HnS4/5O+jY02WxKAgl1GZI4yofd VshkfM/hLIdhqJNXFVVDyi1mj0uXwMeQso+zV6L2NsGqhPPSfdtCbEhThYb7C62BOo2n41fmYAi n21549qeJYRAxlHUNsw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-30_01,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 impostorscore=0 clxscore=1015 malwarescore=0 bulkscore=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609300033 Hi Bryan, On 9/29/2026 11:36 AM, Bryan O'Donoghue wrote: > On 19/08/2026 10:32, Atanas Filipov wrote: >> Add an ICC provider for the Qualcomm Camera NOC (CAMNOC). Multiple >> camera sub-devices share CAM_CC_CAMNOC_AXI_CLK; direct clk_set_rate() >> calls from each consumer cause a last-writer-wins race. >> >> Each consumer obtains an ICC path to SLAVE_CAMNOC_AXI and votes via >> icc_set_bw(). The ICC core aggregates votes (max peak_bw) and the >> set() callback converts the result to clk_set_rate(). Consumers >> encode the required frequency as peak_bw in kBps. >> >> Signed-off-by: Atanas Filipov >> --- >> drivers/interconnect/qcom/Kconfig | 10 + >> drivers/interconnect/qcom/Makefile | 2 + >> drivers/interconnect/qcom/qcom-camnoc.c | 279 ++++++++++++++++++++++++ >> 3 files changed, 291 insertions(+) >> create mode 100644 drivers/interconnect/qcom/qcom-camnoc.c >> >> diff --git a/drivers/interconnect/qcom/Kconfig b/drivers/interconnect/qcom/Kconfig >> index 5b8a094ca4ed..9d9d238019a0 100644 >> --- a/drivers/interconnect/qcom/Kconfig >> +++ b/drivers/interconnect/qcom/Kconfig >> @@ -135,6 +135,16 @@ config INTERCONNECT_QCOM_NORD >> the RPMh hardware and communicates via Bus Clock Manager (BCM) >> through the Resource State Coordinator (RSC). >> >> +config INTERCONNECT_QCOM_CAMNOC >> + tristate "Qualcomm CAMNOC interconnect driver" >> + depends on INTERCONNECT_QCOM || COMPILE_TEST >> + depends on ARM64 || COMPILE_TEST >> + help >> + Say y here to support the Camera Network-on-Chip (CAMNOC) >> + interconnect driver for Qualcomm SoCs. It aggregates bandwidth >> + requests from camera sub-devices (IFE, JPEG, BPS, etc.) and >> + scales CAM_CC_CAMNOC_AXI_CLK accordingly. >> + >> config INTERCONNECT_QCOM_OSM_L3 >> tristate "Qualcomm OSM L3 interconnect driver" >> depends on INTERCONNECT_QCOM || COMPILE_TEST >> diff --git a/drivers/interconnect/qcom/Makefile b/drivers/interconnect/qcom/Makefile >> index 1c7d410b40cc..52a5998ae6a8 100644 >> --- a/drivers/interconnect/qcom/Makefile >> +++ b/drivers/interconnect/qcom/Makefile >> @@ -18,6 +18,7 @@ qnoc-msm8974-objs := msm8974.o >> qnoc-msm8976-objs := msm8976.o >> qnoc-msm8996-objs := msm8996.o >> qnoc-nord-objs := nord.o >> +icc-camnoc-objs := qcom-camnoc.o >> icc-osm-l3-objs := osm-l3.o >> qnoc-qcm2290-objs := qcm2290.o >> qnoc-qcs404-objs := qcs404.o >> @@ -66,6 +67,7 @@ obj-$(CONFIG_INTERCONNECT_QCOM_MSM8974) += qnoc-msm8974.o >> obj-$(CONFIG_INTERCONNECT_QCOM_MSM8976) += qnoc-msm8976.o >> obj-$(CONFIG_INTERCONNECT_QCOM_MSM8996) += qnoc-msm8996.o >> obj-$(CONFIG_INTERCONNECT_QCOM_NORD) += qnoc-nord.o >> +obj-$(CONFIG_INTERCONNECT_QCOM_CAMNOC) += icc-camnoc.o >> obj-$(CONFIG_INTERCONNECT_QCOM_OSM_L3) += icc-osm-l3.o >> obj-$(CONFIG_INTERCONNECT_QCOM_QCM2290) += qnoc-qcm2290.o >> obj-$(CONFIG_INTERCONNECT_QCOM_QCS404) += qnoc-qcs404.o >> diff --git a/drivers/interconnect/qcom/qcom-camnoc.c b/drivers/interconnect/qcom/qcom-camnoc.c >> new file mode 100644 >> index 000000000000..9a703b052b2d >> --- /dev/null >> +++ b/drivers/interconnect/qcom/qcom-camnoc.c >> @@ -0,0 +1,279 @@ >> +// SPDX-License-Identifier: GPL-2.0-only >> +/* >> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. >> + * >> + * Qualcomm Camera NOC (CAMNOC) interconnect provider. >> + * >> + * CAMNOC is the internal AXI interconnect within the Qualcomm camera >> + * subsystem. Multiple camera sub-devices (IFE, JPEG, BPS, etc.) share >> + * CAM_CC_CAMNOC_AXI_CLK. This driver acts as an ICC provider so that >> + * each sub-device can independently vote for bandwidth; the ICC core >> + * aggregates the votes (max of peak_bw across all consumers) and this >> + * driver translates the result into a clk_set_rate() call, avoiding >> + * the last-writer-wins race that occurs with direct clk_set_rate(). >> + * >> + * Consumers express their required clock rate directly as peak_bw in >> + * kBps (e.g. 400000 for 400 MHz). The driver converts kBps → Hz: >> + * rate_hz = peak_bw_kBps * 1000 >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +#include >> + >> +#define to_camnoc_provider(_p) \ >> + container_of(_p, struct qcom_camnoc_icc_provider, provider) >> + >> +struct qcom_camnoc_icc_provider { >> + struct clk *clk; >> + struct icc_provider provider; >> +}; >> + >> +struct qcom_camnoc_node { >> + const char *name; >> + u16 buswidth; >> +}; >> + >> +/* IFE */ >> +static const struct qcom_camnoc_node camnoc_master_ife_0 = { >> + .name = "master-camnoc-ife-0", .buswidth = 16 >> +}; >> + >> +static const struct qcom_camnoc_node camnoc_master_ife_0_rdi = { >> + .name = "master-camnoc-ife-0-rdi", .buswidth = 16 >> +}; >> + >> +static const struct qcom_camnoc_node camnoc_master_ife_1 = { >> + .name = "master-camnoc-ife-1", .buswidth = 16 >> +}; >> + >> +static const struct qcom_camnoc_node camnoc_master_ife_1_rdi = { >> + .name = "master-camnoc-ife-1-rdi", .buswidth = 16 >> +}; >> + >> +static const struct qcom_camnoc_node camnoc_master_ife_lite_0 = { >> + .name = "master-camnoc-ife-lite-0", .buswidth = 8 >> +}; >> + >> +static const struct qcom_camnoc_node camnoc_master_ife_lite_1 = { >> + .name = "master-camnoc-ife-lite-1", .buswidth = 8 >> +}; >> + >> +static const struct qcom_camnoc_node camnoc_master_ife_lite_2 = { >> + .name = "master-camnoc-ife-lite-2", .buswidth = 8 >> +}; >> + >> +static const struct qcom_camnoc_node camnoc_master_ife_lite_3 = { >> + .name = "master-camnoc-ife-lite-3", .buswidth = 8 >> +}; >> + >> +static const struct qcom_camnoc_node camnoc_master_ife_lite_4 = { >> + .name = "master-camnoc-ife-lite-4", .buswidth = 8 >> +}; >> + >> +/* BPS */ >> +static const struct qcom_camnoc_node camnoc_master_bps = { >> + .name = "master-camnoc-bps", .buswidth = 16 >> +}; >> + >> +/* IPE */ >> +static const struct qcom_camnoc_node camnoc_master_ipe_0 = { >> + .name = "master-camnoc-ipe-0", .buswidth = 16 >> +}; >> + >> +static const struct qcom_camnoc_node camnoc_master_ipe_1 = { >> + .name = "master-camnoc-ipe-1", .buswidth = 16 >> +}; >> + >> +/* JPEG */ >> +static const struct qcom_camnoc_node camnoc_master_jpeg = { >> + .name = "master-camnoc-jpeg", .buswidth = 16 >> +}; >> + >> +static const struct qcom_camnoc_node camnoc_master_jpeg_dma = { >> + .name = "master-camnoc-jpeg-dma", .buswidth = 16 >> +}; >> + >> +/* CDM */ >> +static const struct qcom_camnoc_node camnoc_master_cdm = { >> + .name = "master-camnoc-cdm", .buswidth = 4 >> +}; >> + >> +/* FD */ >> +static const struct qcom_camnoc_node camnoc_master_fd = { >> + .name = "master-camnoc-fd", .buswidth = 16 >> +}; >> + >> +/* SBI */ >> +static const struct qcom_camnoc_node camnoc_master_sbi = { >> + .name = "master-camnoc-sbi", .buswidth = 16 >> +}; >> + >> +/* ICP */ >> +static const struct qcom_camnoc_node camnoc_master_icp = { >> + .name = "master-camnoc-icp", .buswidth = 8 >> +}; >> + >> +/* Slave */ >> +static const struct qcom_camnoc_node camnoc_slave_axi = { >> + .name = "slave-camnoc-axi", .buswidth = 32 >> +}; >> + >> +static const struct qcom_camnoc_node * const camnoc_nodes[] = { >> + [MASTER_CAMNOC_IFE_0] = &camnoc_master_ife_0, >> + [MASTER_CAMNOC_IFE_0_RDI] = &camnoc_master_ife_0_rdi, >> + [MASTER_CAMNOC_IFE_1] = &camnoc_master_ife_1, >> + [MASTER_CAMNOC_IFE_1_RDI] = &camnoc_master_ife_1_rdi, >> + [MASTER_CAMNOC_IFE_LITE_0] = &camnoc_master_ife_lite_0, >> + [MASTER_CAMNOC_IFE_LITE_1] = &camnoc_master_ife_lite_1, >> + [MASTER_CAMNOC_IFE_LITE_2] = &camnoc_master_ife_lite_2, >> + [MASTER_CAMNOC_IFE_LITE_3] = &camnoc_master_ife_lite_3, >> + [MASTER_CAMNOC_IFE_LITE_4] = &camnoc_master_ife_lite_4, >> + [MASTER_CAMNOC_BPS] = &camnoc_master_bps, >> + [MASTER_CAMNOC_IPE_0] = &camnoc_master_ipe_0, >> + [MASTER_CAMNOC_IPE_1] = &camnoc_master_ipe_1, >> + [MASTER_CAMNOC_JPEG] = &camnoc_master_jpeg, >> + [MASTER_CAMNOC_JPEG_DMA] = &camnoc_master_jpeg_dma, >> + [MASTER_CAMNOC_CDM] = &camnoc_master_cdm, >> + [MASTER_CAMNOC_FD] = &camnoc_master_fd, >> + [MASTER_CAMNOC_SBI] = &camnoc_master_sbi, >> + [MASTER_CAMNOC_ICP] = &camnoc_master_icp, >> + [SLAVE_CAMNOC_AXI] = &camnoc_slave_axi, >> +}; > > This will fill up quickly given the number of entries. This should be > moved to a separate file. Yes that make sense. BTW we plan to move to icc-clk helper so we are evaluating how the things will look like. > >> + >> +#define CAMNOC_NUM_NODES ARRAY_SIZE(camnoc_nodes) >> + >> +static int qcom_camnoc_get_bw(struct icc_node *node, u32 *avg, u32 *peak) >> +{ >> + *avg = 0; >> + *peak = 0; >> + >> + return 0; >> +} > > What's going on here ? This sets everything to zero always ? Yes that should be fixed maybe as part of using icc-clk helper. ~Gjorgji