From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE221C433FF for ; Thu, 8 Aug 2019 13:19:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9A96D21880 for ; Thu, 8 Aug 2019 13:19:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733010AbfHHNT0 (ORCPT ); Thu, 8 Aug 2019 09:19:26 -0400 Received: from mga18.intel.com ([134.134.136.126]:22994 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732643AbfHHNT0 (ORCPT ); Thu, 8 Aug 2019 09:19:26 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2019 06:19:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,361,1559545200"; d="scan'208";a="168982318" Received: from linux.intel.com ([10.54.29.200]) by orsmga008.jf.intel.com with ESMTP; 08 Aug 2019 06:19:25 -0700 Received: from [10.251.21.180] (kliang2-mobl.ccr.corp.intel.com [10.251.21.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by linux.intel.com (Postfix) with ESMTPS id 6213C580889; Thu, 8 Aug 2019 06:19:24 -0700 (PDT) Subject: Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family To: Rajneesh Bhardwaj , x86@kernel.org Cc: bp@suse.de, Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Peter Zijlstra , Qiuxu Zhuo , Len Brown , Thomas Gleixner , Linux PM References: <20190808101045.19239-1-rajneesh.bhardwaj@linux.intel.com> From: "Liang, Kan" Message-ID: <9ea08a94-a3e0-0e89-401b-a240e1bce7fa@linux.intel.com> Date: Thu, 8 Aug 2019 09:19:23 -0400 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <20190808101045.19239-1-rajneesh.bhardwaj@linux.intel.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org On 8/8/2019 6:10 AM, Rajneesh Bhardwaj wrote: > Elkhart Lake is Atom based SoC that uses model number 0x96. CPUID details > will be documented in a future version of Intel Software Development > Manual. > > Cc: bp@suse.de > Cc: Borislav Petkov > Cc: Dave Hansen > Cc: "H. Peter Anvin" > Cc: Kan Liang > Cc: Peter Zijlstra > Cc: Qiuxu Zhuo > Cc: Len Brown > Cc: Thomas Gleixner > Cc: x86-ml > Cc: Linux PM > Signed-off-by: Rajneesh Bhardwaj > --- > arch/x86/include/asm/intel-family.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h > index 0278aa66ef62..06e94ae65f28 100644 > --- a/arch/x86/include/asm/intel-family.h > +++ b/arch/x86/include/asm/intel-family.h > @@ -79,6 +79,7 @@ > #define INTEL_FAM6_ATOM_GOLDMONT_PLUS 0x7A /* Gemini Lake */ > > #define INTEL_FAM6_ATOM_TREMONT_X 0x86 /* Jacobsville */ > +#define INTEL_FAM6_ATOM_ELKHART_LAKE 0x96 /*Elkhart Lake */ Usually, we should use the code name of microarchitecture for the name of CPUID. Thanks, Kan > > /* Xeon Phi */ > >