From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: Derek Basehore <dbasehore@chromium.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>,
Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com>,
"x86@kernel.org" <x86@kernel.org>,
Platform Driver <platform-driver-x86@vger.kernel.org>,
"Rafael J . Wysocki" <rjw@rjwysocki.net>,
Len Brown <len.brown@intel.com>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>
Subject: Re: [PATCH v5 1/5] x86: stub out pmc function
Date: Sat, 8 Jul 2017 19:00:43 +0300 [thread overview]
Message-ID: <CAHp75VeB_osvYsgmo5WcDbjB+ZWYVEG6CP043KxFoPximDReHA@mail.gmail.com> (raw)
In-Reply-To: <20170708000303.21863-1-dbasehore@chromium.org>
On Sat, Jul 8, 2017 at 3:02 AM, Derek Basehore <dbasehore@chromium.org> wrote:
> This creates an inline function of intel_pmc_slp_s0_counter_read for
> !CONFIG_INTEL_PMC_CORE.
it doesn't make sense alone.
There is a plan to move this header to where it nowadays belongs to, i.e.
include/linux/platform_data/x86/.
Please, do this relocation first.
>
> Signed-off-by: Derek Basehore <dbasehore@chromium.org>
> ---
> arch/x86/include/asm/pmc_core.h | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/include/asm/pmc_core.h b/arch/x86/include/asm/pmc_core.h
> index d4855f11136d..5d142d915f30 100644
> --- a/arch/x86/include/asm/pmc_core.h
> +++ b/arch/x86/include/asm/pmc_core.h
> @@ -22,6 +22,10 @@
> #define _ASM_PMC_CORE_H
>
> /* API to read SLP_S0_RESIDENCY counter */
> -int intel_pmc_slp_s0_counter_read(u32 *data);
> +#ifdef CONFIG_INTEL_PMC_CORE
> +extern int intel_pmc_slp_s0_counter_read(u32 *data);
> +#else
> +static inline int intel_pmc_slp_s0_counter_read(u32 *data) { return -EPERM; }
> +#endif
>
> #endif /* _ASM_PMC_CORE_H */
> --
> 2.13.2.725.g09c95d1e9-goog
>
--
With Best Regards,
Andy Shevchenko
prev parent reply other threads:[~2017-07-08 16:00 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-08 0:02 [PATCH v5 1/5] x86: stub out pmc function Derek Basehore
2017-07-08 0:03 ` [PATCH v5 2/5] tick: Add freeze timer events Derek Basehore
2017-07-08 16:05 ` Andy Shevchenko
2017-07-10 21:11 ` dbasehore .
2017-07-10 12:53 ` Rafael J. Wysocki
2017-07-12 21:25 ` Thomas Gleixner
2017-07-13 1:18 ` dbasehore .
2017-07-13 4:54 ` Thomas Gleixner
2017-07-13 7:32 ` Peter Zijlstra
2017-07-13 15:09 ` Rafael J. Wysocki
2017-07-13 22:58 ` dbasehore .
2017-07-15 12:39 ` Rafael J. Wysocki
2017-07-18 0:30 ` dbasehore .
2017-07-18 1:33 ` Rafael J. Wysocki
2017-07-18 3:52 ` dbasehore .
2017-07-18 6:40 ` Thomas Gleixner
2017-07-18 20:09 ` dbasehore .
2017-07-18 21:53 ` Thomas Gleixner
2017-07-18 22:03 ` dbasehore .
2017-07-18 22:22 ` Thomas Gleixner
2017-07-18 22:37 ` dbasehore .
2017-07-18 22:39 ` Thomas Gleixner
2017-07-08 0:03 ` [PATCH v5 3/5] x86, apic: Add freeze event support Derek Basehore
2017-07-13 5:13 ` Thomas Gleixner
2017-07-08 0:03 ` [PATCH v5 4/5] freeze: Add error reporting Derek Basehore
2017-07-08 0:03 ` [PATCH v5 5/5] intel_idle: Add S0ix validation Derek Basehore
2017-07-09 7:13 ` kbuild test robot
2017-07-10 13:33 ` Rafael J. Wysocki
2017-07-10 21:57 ` dbasehore .
2017-07-10 22:09 ` Rafael J. Wysocki
2017-07-10 22:24 ` dbasehore .
2017-07-11 14:57 ` Rafael J. Wysocki
2017-07-11 15:43 ` Len Brown
2017-07-12 22:16 ` Thomas Gleixner
2017-07-12 23:14 ` dbasehore .
2017-07-13 5:11 ` Thomas Gleixner
2017-07-13 22:49 ` dbasehore .
2017-07-13 1:06 ` dbasehore .
2017-07-08 16:00 ` Andy Shevchenko [this message]
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