[PATCH 00/11] power: supply: pmi8998 charger improvements and smb5 support

[PATCH 00/11] power: supply: pmi8998 charger improvements and smb5 support

[Casey Connolly]

This series contains fixes and cleanups for the pmi8998 charger driver,
as well as introducing support for the newer smb5 charger found in the
pm8150b and other newer Qualcomm PMICs..

A bug is fixed where wakeirq enable/disable refcounting wasn't respected
when the driver was unloaded and reloaded.

Support is added for disabling charging entirely by writing a 0 to the
"status" register (as described in the psy documentation). This allows
for userspace programs to manage charging, e.g. to stop at 80% capacity.

The AICL re-run interval is programmed to a consistent value (3
seconds).

The battery property charge-term-current-microamp is now respected, this
is used to program the constant charge current limit during the fast
charging phase. This also makes it safer to increase the max current
limit this driver originally imposed from 1A to ~2A. According to the
PMIC docs this is easy to handle without a secondary charger chip (which
most but not all phones have).

Further increasing the charge current limit would require tighter
integration with thermal zones and a mechanism to limit the current
when the device gets too warm (e.g. by modelling the power supply as
a cooling device). This infrastructure is currently missing from the
kernel.

---
Casey Connolly (11):
      dt-bindings: power: supply: qcom,pmi89980-charger: add pm8150b and 7250b
      arm64: dts: qcom: sdm845-oneplus-*: set constant-charge-current-max-microamp
      power: supply: qcom_pmi8998_charger: fix wakeirq
      power: supply: pmi8998_charger: rename to qcom_smbx
      power: supply: qcom_smbx: allow disabling charging
      power: supply: qcom_smbx: respect battery charge-term-current-microamp
      power: supply: qcom_smbx: bump up the max current
      power: supply: qcom_smbx: remove unused registers
      power: supply: qcom_smbx: add smb5 support
      MAINTAINERS: add myself as smbx charger driver maintainer
      power: supply: qcom_smbx: program aicl rerun time

 .../power/supply/qcom,pmi8998-charger.yaml         |   2 +
 MAINTAINERS                                        |   7 +
 .../boot/dts/qcom/sdm845-oneplus-enchilada.dts     |   8 +
 arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts |   8 +
 drivers/power/supply/Makefile                      |   2 +-
 .../supply/{qcom_pmi8998_charger.c => qcom_smbx.c} | 730 ++++++++++++---------
 6 files changed, 430 insertions(+), 327 deletions(-)
---
base-commit: bc6e0ba6c9bafa6241b05524b9829808056ac4ad
change-id: 20250518-smb2-smb5-support-01685eca6fbb

Casey Connolly <casey.connolly@linaro.org>

[PATCH 01/11] dt-bindings: power: supply: qcom,pmi89980-charger: add pm8150b and 7250b

[Casey Connolly]

Add compatible strings for these two PMICs which use the SMB5 generation
of charger.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
---
 .../devicetree/bindings/power/supply/qcom,pmi8998-charger.yaml          | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/power/supply/qcom,pmi8998-charger.yaml b/Documentation/devicetree/bindings/power/supply/qcom,pmi8998-charger.yaml
index 90c7dc7632c58dc5cbfb3abcde8e730882bfd936..d19746b64fee19a07bdb8f7a996e42103a9e0e73 100644
--- a/Documentation/devicetree/bindings/power/supply/qcom,pmi8998-charger.yaml
+++ b/Documentation/devicetree/bindings/power/supply/qcom,pmi8998-charger.yaml
@@ -11,8 +11,10 @@ maintainers:
 
 properties:
   compatible:
     enum:
+      - qcom,pm7250b-charger
+      - qcom,pm8150b-charger
       - qcom,pmi8998-charger
       - qcom,pm660-charger
 
   reg:

-- 
2.49.0

Re: [PATCH 01/11] dt-bindings: power: supply: qcom,pmi89980-charger: add pm8150b and 7250b

[Rob Herring (Arm)]

On Thu, 19 Jun 2025 16:55:09 +0200, Casey Connolly wrote:
> Add compatible strings for these two PMICs which use the SMB5 generation
> of charger.
> 
> Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
> ---
>  .../devicetree/bindings/power/supply/qcom,pmi8998-charger.yaml          | 2 ++
>  1 file changed, 2 insertions(+)
> 

Acked-by: Rob Herring (Arm) <robh@kernel.org>

[PATCH 02/11] arm64: dts: qcom: sdm845-oneplus-*: set constant-charge-current-max-microamp

[Casey Connolly]

Set the maximum constant charge current to use for this battery. While
the battery is likely comfortably capable of 4A or so, OnePlus didn't
include a secondary charger IC for parallel charging (instead they have
their proprietary Dash Charging). It's possible that this value could be
safely increased after some testing (and when we have support for
modelling the charger as a cooling device properly), but for now this
value is acceptable.

This is references from qcom,usb-icl-ua property in the downstream
vendor devicetree.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts | 8 ++++++++
 arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts    | 8 ++++++++
 2 files changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts b/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts
index 4005e04d998a40d25a64d652a526bf93efc20332..9ab5ddc1f6cbbdcfbf793b959d199b20256be9ed 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts
@@ -19,8 +19,16 @@ battery: battery {
 
 		charge-full-design-microamp-hours = <3300000>;
 		voltage-min-design-microvolt = <3400000>;
 		voltage-max-design-microvolt = <4400000>;
+
+		/*
+		 * Typical designs have multiple charger ICs which can handle more
+		 * current but the OnePlus 6/T do not, hence the lower limit. This
+		 * does not apply when using the Dash Charger, however this is not
+		 * yet supported.
+		 */
+		constant-charge-current-max-microamp = <1800000>;
 	};
 };
 
 &display_panel {
diff --git a/arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts b/arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts
index 9471ada0d6ad8bd44cc58a6efa07f7eb27921af9..1644648fb8800934e4a8a9b54380bb019dcd0059 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts
@@ -19,8 +19,16 @@ battery: battery {
 
 		charge-full-design-microamp-hours = <3700000>;
 		voltage-min-design-microvolt = <3400000>;
 		voltage-max-design-microvolt = <4400000>;
+
+		/*
+		 * Typical designs have multiple charger ICs which can handle more
+		 * current but the OnePlus 6/T do not, hence the lower limit. This
+		 * does not apply when using the Dash Charger, however this is not
+		 * yet supported.
+		 */
+		constant-charge-current-max-microamp = <1800000>;
 	};
 };
 
 &display_panel {

-- 
2.49.0

[PATCH 03/11] power: supply: qcom_pmi8998_charger: fix wakeirq

[Casey Connolly]

Unloading and reloading the driver (e.g. when built as a module)
currently leads to errors trying to enable wake IRQ since it's already
enabled.

Use devm to manage this for us so it correctly gets disabled when
removing the driver.

Additionally, call device_init_wakeup() so that charger attach/remove
will trigger a wakeup by default.

Fixes: 8648aeb5d7b7 ("power: supply: add Qualcomm PMI8998 SMB2 Charger driver")
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
---
 drivers/power/supply/qcom_pmi8998_charger.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/power/supply/qcom_pmi8998_charger.c b/drivers/power/supply/qcom_pmi8998_charger.c
index c2f8f2e24398316ac5c491eaaabe4c455e875c47..cd3cb473c70dd1c289cc4094e74746e3c6dc16ee 100644
--- a/drivers/power/supply/qcom_pmi8998_charger.c
+++ b/drivers/power/supply/qcom_pmi8998_charger.c
@@ -1015,9 +1015,11 @@ static int smb2_probe(struct platform_device *pdev)
 	rc = smb2_init_irq(chip, &irq, "wdog-bark", smb2_handle_wdog_bark);
 	if (rc < 0)
 		return rc;
 
-	rc = dev_pm_set_wake_irq(chip->dev, chip->cable_irq);
+	devm_device_init_wakeup(chip->dev);
+
+	rc = devm_pm_set_wake_irq(chip->dev, chip->cable_irq);
 	if (rc < 0)
 		return dev_err_probe(chip->dev, rc, "Couldn't set wake irq\n");
 
 	platform_set_drvdata(pdev, chip);

-- 
2.49.0

Re: [PATCH 03/11] power: supply: qcom_pmi8998_charger: fix wakeirq

[Dmitry Baryshkov]

On Thu, Jun 19, 2025 at 04:55:11PM +0200, Casey Connolly wrote:
> Unloading and reloading the driver (e.g. when built as a module)
> currently leads to errors trying to enable wake IRQ since it's already
> enabled.
> 
> Use devm to manage this for us so it correctly gets disabled when
> removing the driver.
> 
> Additionally, call device_init_wakeup() so that charger attach/remove
> will trigger a wakeup by default.
> 
> Fixes: 8648aeb5d7b7 ("power: supply: add Qualcomm PMI8998 SMB2 Charger driver")
> Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
> ---
>  drivers/power/supply/qcom_pmi8998_charger.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>


-- 
With best wishes
Dmitry

[PATCH 04/11] power: supply: pmi8998_charger: rename to qcom_smbx

[Casey Connolly]

Prepare to add smb5 support by making variables and the file name more
generic. Also take the opportunity to remove the "_charger" suffix since
smb2 always refers to a charger.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
---
 drivers/power/supply/Makefile                      |   2 +-
 .../supply/{qcom_pmi8998_charger.c => qcom_smbx.c} | 148 ++++++++++-----------
 2 files changed, 75 insertions(+), 75 deletions(-)

diff --git a/drivers/power/supply/Makefile b/drivers/power/supply/Makefile
index 4f5f8e3507f80da02812f0d08c2d81ddff0a272f..f943c9150b326d41ff241f82610f70298635eb08 100644
--- a/drivers/power/supply/Makefile
+++ b/drivers/power/supply/Makefile
@@ -119,6 +119,6 @@ obj-$(CONFIG_RN5T618_POWER)	+= rn5t618_power.o
 obj-$(CONFIG_BATTERY_ACER_A500)	+= acer_a500_battery.o
 obj-$(CONFIG_BATTERY_SURFACE)	+= surface_battery.o
 obj-$(CONFIG_CHARGER_SURFACE)	+= surface_charger.o
 obj-$(CONFIG_BATTERY_UG3105)	+= ug3105_battery.o
-obj-$(CONFIG_CHARGER_QCOM_SMB2)	+= qcom_pmi8998_charger.o
+obj-$(CONFIG_CHARGER_QCOM_SMB2)	+= qcom_smbx.o
 obj-$(CONFIG_FUEL_GAUGE_MM8013)	+= mm8013.o
diff --git a/drivers/power/supply/qcom_pmi8998_charger.c b/drivers/power/supply/qcom_smbx.c
similarity index 88%
rename from drivers/power/supply/qcom_pmi8998_charger.c
rename to drivers/power/supply/qcom_smbx.c
index cd3cb473c70dd1c289cc4094e74746e3c6dc16ee..b1cb925581ec6b8cfca3897be2de5b00a336c920 100644
--- a/drivers/power/supply/qcom_pmi8998_charger.c
+++ b/drivers/power/supply/qcom_smbx.c
@@ -361,19 +361,19 @@ enum charger_status {
 	INHIBIT_CHARGE,
 	DISABLE_CHARGE,
 };
 
-struct smb2_register {
+struct smb_init_register {
 	u16 addr;
 	u8 mask;
 	u8 val;
 };
 
 /**
- * struct smb2_chip - smb2 chip structure
+ * struct smb_chip - smb chip structure
  * @dev:		Device reference for power_supply
  * @name:		The platform device name
- * @base:		Base address for smb2 registers
+ * @base:		Base address for smb registers
  * @regmap:		Register map
  * @batt_info:		Battery data from DT
  * @status_change_work: Worker to handle plug/unplug events
  * @cable_irq:		USB plugin IRQ
@@ -381,9 +381,9 @@ struct smb2_register {
  * @usb_in_i_chan:	USB_IN current measurement channel
  * @usb_in_v_chan:	USB_IN voltage measurement channel
  * @chg_psy:		Charger power supply instance
  */
-struct smb2_chip {
+struct smb_chip {
 	struct device *dev;
 	const char *name;
 	unsigned int base;
 	struct regmap *regmap;
@@ -398,9 +398,9 @@ struct smb2_chip {
 
 	struct power_supply *chg_psy;
 };
 
-static enum power_supply_property smb2_properties[] = {
+static enum power_supply_property smb_properties[] = {
 	POWER_SUPPLY_PROP_MANUFACTURER,
 	POWER_SUPPLY_PROP_MODEL_NAME,
 	POWER_SUPPLY_PROP_CURRENT_MAX,
 	POWER_SUPPLY_PROP_CURRENT_NOW,
@@ -410,9 +410,9 @@ static enum power_supply_property smb2_properties[] = {
 	POWER_SUPPLY_PROP_ONLINE,
 	POWER_SUPPLY_PROP_USB_TYPE,
 };
 
-static int smb2_get_prop_usb_online(struct smb2_chip *chip, int *val)
+static int smb_get_prop_usb_online(struct smb_chip *chip, int *val)
 {
 	unsigned int stat;
 	int rc;
 
@@ -430,15 +430,15 @@ static int smb2_get_prop_usb_online(struct smb2_chip *chip, int *val)
 /*
  * Qualcomm "automatic power source detection" aka APSD
  * tells us what type of charger we're connected to.
  */
-static int smb2_apsd_get_charger_type(struct smb2_chip *chip, int *val)
+static int smb_apsd_get_charger_type(struct smb_chip *chip, int *val)
 {
 	unsigned int apsd_stat, stat;
 	int usb_online = 0;
 	int rc;
 
-	rc = smb2_get_prop_usb_online(chip, &usb_online);
+	rc = smb_get_prop_usb_online(chip, &usb_online);
 	if (!usb_online) {
 		*val = POWER_SUPPLY_USB_TYPE_UNKNOWN;
 		return rc;
 	}
@@ -470,15 +470,15 @@ static int smb2_apsd_get_charger_type(struct smb2_chip *chip, int *val)
 
 	return 0;
 }
 
-static int smb2_get_prop_status(struct smb2_chip *chip, int *val)
+static int smb_get_prop_status(struct smb_chip *chip, int *val)
 {
 	unsigned char stat[2];
 	int usb_online = 0;
 	int rc;
 
-	rc = smb2_get_prop_usb_online(chip, &usb_online);
+	rc = smb_get_prop_usb_online(chip, &usb_online);
 	if (!usb_online) {
 		*val = POWER_SUPPLY_STATUS_DISCHARGING;
 		return rc;
 	}
@@ -518,9 +518,9 @@ static int smb2_get_prop_status(struct smb2_chip *chip, int *val)
 		return rc;
 	}
 }
 
-static inline int smb2_get_current_limit(struct smb2_chip *chip,
+static inline int smb_get_current_limit(struct smb_chip *chip,
 					 unsigned int *val)
 {
 	int rc = regmap_read(chip->regmap, chip->base + ICL_STATUS, val);
 
@@ -528,9 +528,9 @@ static inline int smb2_get_current_limit(struct smb2_chip *chip,
 		*val *= CURRENT_SCALE_FACTOR;
 	return rc;
 }
 
-static int smb2_set_current_limit(struct smb2_chip *chip, unsigned int val)
+static int smb_set_current_limit(struct smb_chip *chip, unsigned int val)
 {
 	unsigned char val_raw;
 
 	if (val > 4800000) {
@@ -543,24 +543,24 @@ static int smb2_set_current_limit(struct smb2_chip *chip, unsigned int val)
 	return regmap_write(chip->regmap, chip->base + USBIN_CURRENT_LIMIT_CFG,
 			    val_raw);
 }
 
-static void smb2_status_change_work(struct work_struct *work)
+static void smb_status_change_work(struct work_struct *work)
 {
 	unsigned int charger_type, current_ua;
 	int usb_online = 0;
 	int count, rc;
-	struct smb2_chip *chip;
+	struct smb_chip *chip;
 
-	chip = container_of(work, struct smb2_chip, status_change_work.work);
+	chip = container_of(work, struct smb_chip, status_change_work.work);
 
-	smb2_get_prop_usb_online(chip, &usb_online);
+	smb_get_prop_usb_online(chip, &usb_online);
 	if (!usb_online)
 		return;
 
 	for (count = 0; count < 3; count++) {
 		dev_dbg(chip->dev, "get charger type retry %d\n", count);
-		rc = smb2_apsd_get_charger_type(chip, &charger_type);
+		rc = smb_apsd_get_charger_type(chip, &charger_type);
 		if (rc != -EAGAIN)
 			break;
 		msleep(100);
 	}
@@ -591,13 +591,13 @@ static void smb2_status_change_work(struct work_struct *work)
 		current_ua = SDP_CURRENT_UA;
 		break;
 	}
 
-	smb2_set_current_limit(chip, current_ua);
+	smb_set_current_limit(chip, current_ua);
 	power_supply_changed(chip->chg_psy);
 }
 
-static int smb2_get_iio_chan(struct smb2_chip *chip, struct iio_channel *chan,
+static int smb_get_iio_chan(struct smb_chip *chip, struct iio_channel *chan,
 			     int *val)
 {
 	int rc;
 	union power_supply_propval status;
@@ -616,9 +616,9 @@ static int smb2_get_iio_chan(struct smb2_chip *chip, struct iio_channel *chan,
 
 	return iio_read_channel_processed(chan, val);
 }
 
-static int smb2_get_prop_health(struct smb2_chip *chip, int *val)
+static int smb_get_prop_health(struct smb_chip *chip, int *val)
 {
 	int rc;
 	unsigned int stat;
 
@@ -650,13 +650,13 @@ static int smb2_get_prop_health(struct smb2_chip *chip, int *val)
 		return 0;
 	}
 }
 
-static int smb2_get_property(struct power_supply *psy,
+static int smb_get_property(struct power_supply *psy,
 			     enum power_supply_property psp,
 			     union power_supply_propval *val)
 {
-	struct smb2_chip *chip = power_supply_get_drvdata(psy);
+	struct smb_chip *chip = power_supply_get_drvdata(psy);
 
 	switch (psp) {
 	case POWER_SUPPLY_PROP_MANUFACTURER:
 		val->strval = "Qualcomm";
@@ -664,45 +664,45 @@ static int smb2_get_property(struct power_supply *psy,
 	case POWER_SUPPLY_PROP_MODEL_NAME:
 		val->strval = chip->name;
 		return 0;
 	case POWER_SUPPLY_PROP_CURRENT_MAX:
-		return smb2_get_current_limit(chip, &val->intval);
+		return smb_get_current_limit(chip, &val->intval);
 	case POWER_SUPPLY_PROP_CURRENT_NOW:
-		return smb2_get_iio_chan(chip, chip->usb_in_i_chan,
+		return smb_get_iio_chan(chip, chip->usb_in_i_chan,
 					 &val->intval);
 	case POWER_SUPPLY_PROP_VOLTAGE_NOW:
-		return smb2_get_iio_chan(chip, chip->usb_in_v_chan,
+		return smb_get_iio_chan(chip, chip->usb_in_v_chan,
 					 &val->intval);
 	case POWER_SUPPLY_PROP_ONLINE:
-		return smb2_get_prop_usb_online(chip, &val->intval);
+		return smb_get_prop_usb_online(chip, &val->intval);
 	case POWER_SUPPLY_PROP_STATUS:
-		return smb2_get_prop_status(chip, &val->intval);
+		return smb_get_prop_status(chip, &val->intval);
 	case POWER_SUPPLY_PROP_HEALTH:
-		return smb2_get_prop_health(chip, &val->intval);
+		return smb_get_prop_health(chip, &val->intval);
 	case POWER_SUPPLY_PROP_USB_TYPE:
-		return smb2_apsd_get_charger_type(chip, &val->intval);
+		return smb_apsd_get_charger_type(chip, &val->intval);
 	default:
 		dev_err(chip->dev, "invalid property: %d\n", psp);
 		return -EINVAL;
 	}
 }
 
-static int smb2_set_property(struct power_supply *psy,
+static int smb_set_property(struct power_supply *psy,
 			     enum power_supply_property psp,
 			     const union power_supply_propval *val)
 {
-	struct smb2_chip *chip = power_supply_get_drvdata(psy);
+	struct smb_chip *chip = power_supply_get_drvdata(psy);
 
 	switch (psp) {
 	case POWER_SUPPLY_PROP_CURRENT_MAX:
-		return smb2_set_current_limit(chip, val->intval);
+		return smb_set_current_limit(chip, val->intval);
 	default:
 		dev_err(chip->dev, "No setter for property: %d\n", psp);
 		return -EINVAL;
 	}
 }
 
-static int smb2_property_is_writable(struct power_supply *psy,
+static int smb_property_is_writable(struct power_supply *psy,
 				     enum power_supply_property psp)
 {
 	switch (psp) {
 	case POWER_SUPPLY_PROP_CURRENT_MAX:
@@ -711,11 +711,11 @@ static int smb2_property_is_writable(struct power_supply *psy,
 		return 0;
 	}
 }
 
-static irqreturn_t smb2_handle_batt_overvoltage(int irq, void *data)
+static irqreturn_t smb_handle_batt_overvoltage(int irq, void *data)
 {
-	struct smb2_chip *chip = data;
+	struct smb_chip *chip = data;
 	unsigned int status;
 
 	regmap_read(chip->regmap, chip->base + BATTERY_CHARGER_STATUS_2,
 		    &status);
@@ -728,11 +728,11 @@ static irqreturn_t smb2_handle_batt_overvoltage(int irq, void *data)
 
 	return IRQ_HANDLED;
 }
 
-static irqreturn_t smb2_handle_usb_plugin(int irq, void *data)
+static irqreturn_t smb_handle_usb_plugin(int irq, void *data)
 {
-	struct smb2_chip *chip = data;
+	struct smb_chip *chip = data;
 
 	power_supply_changed(chip->chg_psy);
 
 	schedule_delayed_work(&chip->status_change_work,
@@ -740,20 +740,20 @@ static irqreturn_t smb2_handle_usb_plugin(int irq, void *data)
 
 	return IRQ_HANDLED;
 }
 
-static irqreturn_t smb2_handle_usb_icl_change(int irq, void *data)
+static irqreturn_t smb_handle_usb_icl_change(int irq, void *data)
 {
-	struct smb2_chip *chip = data;
+	struct smb_chip *chip = data;
 
 	power_supply_changed(chip->chg_psy);
 
 	return IRQ_HANDLED;
 }
 
-static irqreturn_t smb2_handle_wdog_bark(int irq, void *data)
+static irqreturn_t smb_handle_wdog_bark(int irq, void *data)
 {
-	struct smb2_chip *chip = data;
+	struct smb_chip *chip = data;
 	int rc;
 
 	power_supply_changed(chip->chg_psy);
 
@@ -764,24 +764,24 @@ static irqreturn_t smb2_handle_wdog_bark(int irq, void *data)
 
 	return IRQ_HANDLED;
 }
 
-static const struct power_supply_desc smb2_psy_desc = {
+static const struct power_supply_desc smb_psy_desc = {
 	.name = "pmi8998_charger",
 	.type = POWER_SUPPLY_TYPE_USB,
 	.usb_types = BIT(POWER_SUPPLY_USB_TYPE_SDP) |
 		     BIT(POWER_SUPPLY_USB_TYPE_CDP) |
 		     BIT(POWER_SUPPLY_USB_TYPE_DCP) |
 		     BIT(POWER_SUPPLY_USB_TYPE_UNKNOWN),
-	.properties = smb2_properties,
-	.num_properties = ARRAY_SIZE(smb2_properties),
-	.get_property = smb2_get_property,
-	.set_property = smb2_set_property,
-	.property_is_writeable = smb2_property_is_writable,
+	.properties = smb_properties,
+	.num_properties = ARRAY_SIZE(smb_properties),
+	.get_property = smb_get_property,
+	.set_property = smb_set_property,
+	.property_is_writeable = smb_property_is_writable,
 };
 
 /* Init sequence derived from vendor downstream driver */
-static const struct smb2_register smb2_init_seq[] = {
+static const struct smb_init_register smb_init_seq[] = {
 	{ .addr = AICL_RERUN_TIME_CFG, .mask = AICL_RERUN_TIME_MASK, .val = 0 },
 	/*
 	 * By default configure us as an upstream facing port
 	 * FIXME: This will be handled by the type-c driver
@@ -881,19 +881,19 @@ static const struct smb2_register smb2_init_seq[] = {
 	  .mask = FAST_CHARGE_CURRENT_SETTING_MASK,
 	  .val = 1000000 / CURRENT_SCALE_FACTOR },
 };
 
-static int smb2_init_hw(struct smb2_chip *chip)
+static int smb_init_hw(struct smb_chip *chip)
 {
 	int rc, i;
 
-	for (i = 0; i < ARRAY_SIZE(smb2_init_seq); i++) {
+	for (i = 0; i < ARRAY_SIZE(smb_init_seq); i++) {
 		dev_dbg(chip->dev, "%d: Writing 0x%02x to 0x%02x\n", i,
-			smb2_init_seq[i].val, smb2_init_seq[i].addr);
+			smb_init_seq[i].val, smb_init_seq[i].addr);
 		rc = regmap_update_bits(chip->regmap,
-					chip->base + smb2_init_seq[i].addr,
-					smb2_init_seq[i].mask,
-					smb2_init_seq[i].val);
+					chip->base + smb_init_seq[i].addr,
+					smb_init_seq[i].mask,
+					smb_init_seq[i].val);
 		if (rc < 0)
 			return dev_err_probe(chip->dev, rc,
 					     "%s: init command %d failed\n",
 					     __func__, i);
@@ -901,9 +901,9 @@ static int smb2_init_hw(struct smb2_chip *chip)
 
 	return 0;
 }
 
-static int smb2_init_irq(struct smb2_chip *chip, int *irq, const char *name,
+static int smb_init_irq(struct smb_chip *chip, int *irq, const char *name,
 			 irqreturn_t (*handler)(int irq, void *data))
 {
 	int irqnum;
 	int rc;
@@ -923,13 +923,13 @@ static int smb2_init_irq(struct smb2_chip *chip, int *irq, const char *name,
 
 	return 0;
 }
 
-static int smb2_probe(struct platform_device *pdev)
+static int smb_probe(struct platform_device *pdev)
 {
 	struct power_supply_config supply_config = {};
 	struct power_supply_desc *desc;
-	struct smb2_chip *chip;
+	struct smb_chip *chip;
 	int rc, irq;
 
 	chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
 	if (!chip)
@@ -958,19 +958,19 @@ static int smb2_probe(struct platform_device *pdev)
 		return dev_err_probe(chip->dev, PTR_ERR(chip->usb_in_i_chan),
 				     "Couldn't get usbin_i IIO channel\n");
 	}
 
-	rc = smb2_init_hw(chip);
+	rc = smb_init_hw(chip);
 	if (rc < 0)
 		return rc;
 
 	supply_config.drv_data = chip;
 	supply_config.fwnode = dev_fwnode(&pdev->dev);
 
-	desc = devm_kzalloc(chip->dev, sizeof(smb2_psy_desc), GFP_KERNEL);
+	desc = devm_kzalloc(chip->dev, sizeof(smb_psy_desc), GFP_KERNEL);
 	if (!desc)
 		return -ENOMEM;
-	memcpy(desc, &smb2_psy_desc, sizeof(smb2_psy_desc));
+	memcpy(desc, &smb_psy_desc, sizeof(smb_psy_desc));
 	desc->name =
 		devm_kasprintf(chip->dev, GFP_KERNEL, "%s-charger",
 			       (const char *)device_get_match_data(chip->dev));
 	if (!desc->name)
@@ -987,9 +987,9 @@ static int smb2_probe(struct platform_device *pdev)
 		return dev_err_probe(chip->dev, rc,
 				     "Failed to get battery info\n");
 
 	rc = devm_delayed_work_autocancel(chip->dev, &chip->status_change_work,
-					  smb2_status_change_work);
+					  smb_status_change_work);
 	if (rc)
 		return dev_err_probe(chip->dev, rc,
 				     "Failed to init status change work\n");
 
@@ -998,22 +998,22 @@ static int smb2_probe(struct platform_device *pdev)
 				FLOAT_VOLTAGE_SETTING_MASK, rc);
 	if (rc < 0)
 		return dev_err_probe(chip->dev, rc, "Couldn't set vbat max\n");
 
-	rc = smb2_init_irq(chip, &irq, "bat-ov", smb2_handle_batt_overvoltage);
+	rc = smb_init_irq(chip, &irq, "bat-ov", smb_handle_batt_overvoltage);
 	if (rc < 0)
 		return rc;
 
-	rc = smb2_init_irq(chip, &chip->cable_irq, "usb-plugin",
-			   smb2_handle_usb_plugin);
+	rc = smb_init_irq(chip, &chip->cable_irq, "usb-plugin",
+			   smb_handle_usb_plugin);
 	if (rc < 0)
 		return rc;
 
-	rc = smb2_init_irq(chip, &irq, "usbin-icl-change",
-			   smb2_handle_usb_icl_change);
+	rc = smb_init_irq(chip, &irq, "usbin-icl-change",
+			   smb_handle_usb_icl_change);
 	if (rc < 0)
 		return rc;
-	rc = smb2_init_irq(chip, &irq, "wdog-bark", smb2_handle_wdog_bark);
+	rc = smb_init_irq(chip, &irq, "wdog-bark", smb_handle_wdog_bark);
 	if (rc < 0)
 		return rc;
 
 	devm_device_init_wakeup(chip->dev);
@@ -1029,24 +1029,24 @@ static int smb2_probe(struct platform_device *pdev)
 
 	return 0;
 }
 
-static const struct of_device_id smb2_match_id_table[] = {
+static const struct of_device_id smb_match_id_table[] = {
 	{ .compatible = "qcom,pmi8998-charger", .data = "pmi8998" },
 	{ .compatible = "qcom,pm660-charger", .data = "pm660" },
 	{ /* sentinal */ }
 };
-MODULE_DEVICE_TABLE(of, smb2_match_id_table);
+MODULE_DEVICE_TABLE(of, smb_match_id_table);
 
-static struct platform_driver qcom_spmi_smb2 = {
-	.probe = smb2_probe,
+static struct platform_driver qcom_spmi_smb = {
+	.probe = smb_probe,
 	.driver = {
-		.name = "qcom-pmi8998/pm660-charger",
-		.of_match_table = smb2_match_id_table,
+		.name = "qcom-smbx-charger",
+		.of_match_table = smb_match_id_table,
 		},
 };
 
-module_platform_driver(qcom_spmi_smb2);
+module_platform_driver(qcom_spmi_smb);
 
 MODULE_AUTHOR("Casey Connolly <casey.connolly@linaro.org>");
 MODULE_DESCRIPTION("Qualcomm SMB2 Charger Driver");
 MODULE_LICENSE("GPL");

-- 
2.49.0

Re: [PATCH 04/11] power: supply: pmi8998_charger: rename to qcom_smbx

[Luca Weiss]

On Thu Jun 19, 2025 at 4:55 PM CEST, Casey Connolly wrote:
> Prepare to add smb5 support by making variables and the file name more
> generic. Also take the opportunity to remove the "_charger" suffix since
> smb2 always refers to a charger.
>
> Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
> ---
>  drivers/power/supply/Makefile                      |   2 +-
>  .../supply/{qcom_pmi8998_charger.c => qcom_smbx.c} | 148 ++++++++++-----------
>  2 files changed, 75 insertions(+), 75 deletions(-)
>
> diff --git a/drivers/power/supply/Makefile b/drivers/power/supply/Makefile
> index 4f5f8e3507f80da02812f0d08c2d81ddff0a272f..f943c9150b326d41ff241f82610f70298635eb08 100644
> --- a/drivers/power/supply/Makefile
> +++ b/drivers/power/supply/Makefile
> @@ -119,6 +119,6 @@ obj-$(CONFIG_RN5T618_POWER)	+= rn5t618_power.o
>  obj-$(CONFIG_BATTERY_ACER_A500)	+= acer_a500_battery.o
>  obj-$(CONFIG_BATTERY_SURFACE)	+= surface_battery.o
>  obj-$(CONFIG_CHARGER_SURFACE)	+= surface_charger.o
>  obj-$(CONFIG_BATTERY_UG3105)	+= ug3105_battery.o
> -obj-$(CONFIG_CHARGER_QCOM_SMB2)	+= qcom_pmi8998_charger.o
> +obj-$(CONFIG_CHARGER_QCOM_SMB2)	+= qcom_smbx.o

While you may want to keep the CONFIG_ name the same, the description
should be updated, at least in the SMB5 commit.

  │ Say Y here to enable the Qualcomm PMIC Charger driver. This
  │ adds support for the SMB2 switch mode battery charger found
  │ in PMI8998 and related PMICs.

Regards
Luca

[PATCH 05/11] power: supply: qcom_smbx: allow disabling charging

[Casey Connolly]

Hook up USBIN_CMD_IL so that writing "0" to the status register will
disable charging, this is useful to let users limit charging
automatically.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
---
 drivers/power/supply/qcom_smbx.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/power/supply/qcom_smbx.c b/drivers/power/supply/qcom_smbx.c
index b1cb925581ec6b8cfca3897be2de5b00a336c920..fc2a8e20435639a9da4d966c43271beaeb57a03f 100644
--- a/drivers/power/supply/qcom_smbx.c
+++ b/drivers/power/supply/qcom_smbx.c
@@ -692,8 +692,11 @@ static int smb_set_property(struct power_supply *psy,
 {
 	struct smb_chip *chip = power_supply_get_drvdata(psy);
 
 	switch (psp) {
+	case POWER_SUPPLY_PROP_STATUS:
+		return regmap_update_bits(chip->regmap, chip->base + USBIN_CMD_IL,
+					  USBIN_SUSPEND_BIT, !val->intval);
 	case POWER_SUPPLY_PROP_CURRENT_MAX:
 		return smb_set_current_limit(chip, val->intval);
 	default:
 		dev_err(chip->dev, "No setter for property: %d\n", psp);
@@ -704,8 +707,9 @@ static int smb_set_property(struct power_supply *psy,
 static int smb_property_is_writable(struct power_supply *psy,
 				     enum power_supply_property psp)
 {
 	switch (psp) {
+	case POWER_SUPPLY_PROP_STATUS:
 	case POWER_SUPPLY_PROP_CURRENT_MAX:
 		return 1;
 	default:
 		return 0;

-- 
2.49.0

Re: [PATCH 05/11] power: supply: qcom_smbx: allow disabling charging

[Konrad Dybcio]

On 6/19/25 4:55 PM, Casey Connolly wrote:
> Hook up USBIN_CMD_IL so that writing "0" to the status register will
> disable charging, this is useful to let users limit charging
> automatically.
> 
> Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

Re: [PATCH 05/11] power: supply: qcom_smbx: allow disabling charging

[Sebastian Reichel]

[-- Attachment #1: Type: text/plain, Size: 1663 bytes --]

Hi,

On Thu, Jun 19, 2025 at 04:55:13PM +0200, Casey Connolly wrote:
> Hook up USBIN_CMD_IL so that writing "0" to the status register will
> disable charging, this is useful to let users limit charging
> automatically.
> 
> Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
> ---
>  drivers/power/supply/qcom_smbx.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/power/supply/qcom_smbx.c b/drivers/power/supply/qcom_smbx.c
> index b1cb925581ec6b8cfca3897be2de5b00a336c920..fc2a8e20435639a9da4d966c43271beaeb57a03f 100644
> --- a/drivers/power/supply/qcom_smbx.c
> +++ b/drivers/power/supply/qcom_smbx.c
> @@ -692,8 +692,11 @@ static int smb_set_property(struct power_supply *psy,
>  {
>  	struct smb_chip *chip = power_supply_get_drvdata(psy);
>  
>  	switch (psp) {
> +	case POWER_SUPPLY_PROP_STATUS:
> +		return regmap_update_bits(chip->regmap, chip->base + USBIN_CMD_IL,
> +					  USBIN_SUSPEND_BIT, !val->intval);

I planned to pick this, but USBIN_CMD_IL is not defined before the
smb5 support patch, so this is not bisectable.

Greetings,

-- Sebastian

>  	case POWER_SUPPLY_PROP_CURRENT_MAX:
>  		return smb_set_current_limit(chip, val->intval);
>  	default:
>  		dev_err(chip->dev, "No setter for property: %d\n", psp);
> @@ -704,8 +707,9 @@ static int smb_set_property(struct power_supply *psy,
>  static int smb_property_is_writable(struct power_supply *psy,
>  				     enum power_supply_property psp)
>  {
>  	switch (psp) {
> +	case POWER_SUPPLY_PROP_STATUS:
>  	case POWER_SUPPLY_PROP_CURRENT_MAX:
>  		return 1;
>  	default:
>  		return 0;
> 
> -- 
> 2.49.0
> 
> 

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

[PATCH 06/11] power: supply: qcom_smbx: respect battery charge-term-current-microamp

[Casey Connolly]

Respect the max current limit set on the battery node, one some devices
this is set conservatively to avoid overheating since they only have a
single charger IC (instead of two in parallel).

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
---
 drivers/power/supply/qcom_smbx.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/power/supply/qcom_smbx.c b/drivers/power/supply/qcom_smbx.c
index fc2a8e20435639a9da4d966c43271beaeb57a03f..7fc232fa7260a7422ac12a48686cd7d396edd9a4 100644
--- a/drivers/power/supply/qcom_smbx.c
+++ b/drivers/power/supply/qcom_smbx.c
@@ -583,9 +583,9 @@ static void smb_status_change_work(struct work_struct *work)
 	case POWER_SUPPLY_USB_TYPE_CDP:
 		current_ua = CDP_CURRENT_UA;
 		break;
 	case POWER_SUPPLY_USB_TYPE_DCP:
-		current_ua = DCP_CURRENT_UA;
+		current_ua = chip->batt_info->constant_charge_current_max_ua;
 		break;
 	case POWER_SUPPLY_USB_TYPE_SDP:
 	default:
 		current_ua = SDP_CURRENT_UA;
@@ -989,8 +989,10 @@ static int smb_probe(struct platform_device *pdev)
 	rc = power_supply_get_battery_info(chip->chg_psy, &chip->batt_info);
 	if (rc)
 		return dev_err_probe(chip->dev, rc,
 				     "Failed to get battery info\n");
+	if (chip->batt_info->constant_charge_current_max_ua == -EINVAL)
+		chip->batt_info->constant_charge_current_max_ua = DCP_CURRENT_UA;
 
 	rc = devm_delayed_work_autocancel(chip->dev, &chip->status_change_work,
 					  smb_status_change_work);
 	if (rc)

-- 
2.49.0

Re: [PATCH 06/11] power: supply: qcom_smbx: respect battery charge-term-current-microamp

[Konrad Dybcio]

On 6/19/25 4:55 PM, Casey Connolly wrote:
> Respect the max current limit set on the battery node, one some devices
> this is set conservatively to avoid overheating since they only have a
> single charger IC (instead of two in parallel).
> 
> Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
> ---

The subject references a different, similar-sounding property

The change looks ok

Konrad

Re: [PATCH 06/11] power: supply: qcom_smbx: respect battery charge-term-current-microamp

[Sebastian Reichel]

[-- Attachment #1: Type: text/plain, Size: 1394 bytes --]

Hi,

On Thu, Jun 19, 2025 at 04:55:14PM +0200, Casey Connolly wrote:
> Respect the max current limit set on the battery node, one some devices
> this is set conservatively to avoid overheating since they only have a
> single charger IC (instead of two in parallel).
> 
> Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
> ---
>  drivers/power/supply/qcom_smbx.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/power/supply/qcom_smbx.c b/drivers/power/supply/qcom_smbx.c
> index fc2a8e20435639a9da4d966c43271beaeb57a03f..7fc232fa7260a7422ac12a48686cd7d396edd9a4 100644
> --- a/drivers/power/supply/qcom_smbx.c
> +++ b/drivers/power/supply/qcom_smbx.c
> @@ -583,9 +583,9 @@ static void smb_status_change_work(struct work_struct *work)
>  	case POWER_SUPPLY_USB_TYPE_CDP:
>  		current_ua = CDP_CURRENT_UA;
>  		break;
>  	case POWER_SUPPLY_USB_TYPE_DCP:
> -		current_ua = DCP_CURRENT_UA;
> +		current_ua = chip->batt_info->constant_charge_current_max_ua;

"constant_charge_current_max_ua" is current information for the
battery. But current_ua is written to chip->base + USBIN_CURRENT_LIMIT_CFG,
which sounds like it would be current limit on the USB side?

Assuming the charger is using a buck converter to get from USB
voltage to battery voltage (very likely) the currents are
different.

Greetings,

-- Sebastian

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

[PATCH 07/11] power: supply: qcom_smbx: bump up the max current

[Casey Connolly]

I set a super conservative current limit since we lack many of the
safety features (thermal monitoring, etc) that these drivers really
need. However now we have a better understanding of the hardware, it's
fine to bump this limit up a bit, devices can additionally set the max
current via devicetree instead.

Since this is common to smb2 and smb5, move this write out of the init
sequence and into probe proper.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
---
 drivers/power/supply/qcom_smbx.c | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/power/supply/qcom_smbx.c b/drivers/power/supply/qcom_smbx.c
index 7fc232fa7260a7422ac12a48686cd7d396edd9a4..d1607674d291d6ef5762d35acd3330e2116f41a3 100644
--- a/drivers/power/supply/qcom_smbx.c
+++ b/drivers/power/supply/qcom_smbx.c
@@ -875,16 +875,8 @@ static const struct smb_init_register smb_init_seq[] = {
 	 */
 	{ .addr = PRE_CHARGE_CURRENT_CFG,
 	  .mask = PRE_CHARGE_CURRENT_SETTING_MASK,
 	  .val = 500000 / CURRENT_SCALE_FACTOR },
-	/*
-	 * This overrides all of the current limit options exposed to userspace
-	 * and prevents the device from pulling more than ~1A. This is done
-	 * to minimise potential fire hazard risks.
-	 */
-	{ .addr = FAST_CHARGE_CURRENT_CFG,
-	  .mask = FAST_CHARGE_CURRENT_SETTING_MASK,
-	  .val = 1000000 / CURRENT_SCALE_FACTOR },
 };
 
 static int smb_init_hw(struct smb_chip *chip)
 {
@@ -1029,8 +1021,22 @@ static int smb_probe(struct platform_device *pdev)
 		return dev_err_probe(chip->dev, rc, "Couldn't set wake irq\n");
 
 	platform_set_drvdata(pdev, chip);
 
+	/*
+	 * This overrides all of the other current limits and is expected
+	 * to be used for setting limits based on temperature. We set some
+	 * relatively safe default value while still allowing a comfortably
+	 * fast charging rate. Once temperature monitoring is hooked up we
+	 * would expect this to be changed dynamically based on temperature
+	 * reporting.
+	 */
+	rc = regmap_write(chip->regmap, chip->base + FAST_CHARGE_CURRENT_CFG,
+			  1950000 / CURRENT_SCALE_FACTOR);
+	if (rc < 0)
+		return dev_err_probe(chip->dev, rc,
+				     "Couldn't write fast charge current cfg");
+
 	/* Initialise charger state */
 	schedule_delayed_work(&chip->status_change_work, 0);
 
 	return 0;

-- 
2.49.0

Re: [PATCH 07/11] power: supply: qcom_smbx: bump up the max current

[Konrad Dybcio]

On 6/19/25 4:55 PM, Casey Connolly wrote:
> I set a super conservative current limit since we lack many of the
> safety features (thermal monitoring, etc) that these drivers really
> need. However now we have a better understanding of the hardware, it's
> fine to bump this limit up a bit, devices can additionally set the max
> current via devicetree instead.
> 
> Since this is common to smb2 and smb5, move this write out of the init
> sequence and into probe proper.
> 
> Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
> ---
>  drivers/power/supply/qcom_smbx.c | 22 ++++++++++++++--------
>  1 file changed, 14 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/power/supply/qcom_smbx.c b/drivers/power/supply/qcom_smbx.c
> index 7fc232fa7260a7422ac12a48686cd7d396edd9a4..d1607674d291d6ef5762d35acd3330e2116f41a3 100644
> --- a/drivers/power/supply/qcom_smbx.c
> +++ b/drivers/power/supply/qcom_smbx.c
> @@ -875,16 +875,8 @@ static const struct smb_init_register smb_init_seq[] = {
>  	 */
>  	{ .addr = PRE_CHARGE_CURRENT_CFG,
>  	  .mask = PRE_CHARGE_CURRENT_SETTING_MASK,
>  	  .val = 500000 / CURRENT_SCALE_FACTOR },
> -	/*
> -	 * This overrides all of the current limit options exposed to userspace
> -	 * and prevents the device from pulling more than ~1A. This is done
> -	 * to minimise potential fire hazard risks.
> -	 */
> -	{ .addr = FAST_CHARGE_CURRENT_CFG,
> -	  .mask = FAST_CHARGE_CURRENT_SETTING_MASK,
> -	  .val = 1000000 / CURRENT_SCALE_FACTOR },
>  };
>  
>  static int smb_init_hw(struct smb_chip *chip)
>  {
> @@ -1029,8 +1021,22 @@ static int smb_probe(struct platform_device *pdev)
>  		return dev_err_probe(chip->dev, rc, "Couldn't set wake irq\n");
>  
>  	platform_set_drvdata(pdev, chip);
>  
> +	/*
> +	 * This overrides all of the other current limits and is expected
> +	 * to be used for setting limits based on temperature. We set some
> +	 * relatively safe default value while still allowing a comfortably
> +	 * fast charging rate. Once temperature monitoring is hooked up we
> +	 * would expect this to be changed dynamically based on temperature
> +	 * reporting.
> +	 */
> +	rc = regmap_write(chip->regmap, chip->base + FAST_CHARGE_CURRENT_CFG,
> +			  1950000 / CURRENT_SCALE_FACTOR);

In surprise to no one, I'm really not sure..

1A is not a bad default value if no other information at all is provided.
I'd say deferring this to DTS would be the best, so that if the programmer
knows that e.g. the batt/skin temp sensors are there, it takes an explicit
addition to allow more current

Konrad

[PATCH 08/11] power: supply: qcom_smbx: remove unused registers

[Casey Connolly]

Remove registers and bits that aren't used to make things a bit more
readable.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
---
 drivers/power/supply/qcom_smbx.c | 211 +--------------------------------------
 1 file changed, 4 insertions(+), 207 deletions(-)

diff --git a/drivers/power/supply/qcom_smbx.c b/drivers/power/supply/qcom_smbx.c
index d1607674d291d6ef5762d35acd3330e2116f41a3..10ddd33a09599decb23c0f1ccd02fa9b56602543 100644
--- a/drivers/power/supply/qcom_smbx.c
+++ b/drivers/power/supply/qcom_smbx.c
@@ -24,39 +24,17 @@
 #include <linux/workqueue.h>
 
 /* clang-format off */
 #define BATTERY_CHARGER_STATUS_1			0x06
-#define BVR_INITIAL_RAMP_BIT				BIT(7)
-#define CC_SOFT_TERMINATE_BIT				BIT(6)
-#define STEP_CHARGING_STATUS_SHIFT			3
-#define STEP_CHARGING_STATUS_MASK			GENMASK(5, 3)
 #define BATTERY_CHARGER_STATUS_MASK			GENMASK(2, 0)
 
 #define BATTERY_CHARGER_STATUS_2			0x07
-#define INPUT_CURRENT_LIMITED_BIT			BIT(7)
-#define CHARGER_ERROR_STATUS_SFT_EXPIRE_BIT		BIT(6)
 #define CHARGER_ERROR_STATUS_BAT_OV_BIT			BIT(5)
-#define CHARGER_ERROR_STATUS_BAT_TERM_MISSING_BIT	BIT(4)
-#define BAT_TEMP_STATUS_MASK				GENMASK(3, 0)
-#define BAT_TEMP_STATUS_SOFT_LIMIT_MASK			GENMASK(3, 2)
 #define BAT_TEMP_STATUS_HOT_SOFT_LIMIT_BIT		BIT(3)
 #define BAT_TEMP_STATUS_COLD_SOFT_LIMIT_BIT		BIT(2)
 #define BAT_TEMP_STATUS_TOO_HOT_BIT			BIT(1)
 #define BAT_TEMP_STATUS_TOO_COLD_BIT			BIT(0)
 
-#define BATTERY_CHARGER_STATUS_4			0x0A
-#define CHARGE_CURRENT_POST_JEITA_MASK			GENMASK(7, 0)
-
-#define BATTERY_CHARGER_STATUS_7			0x0D
-#define ENABLE_TRICKLE_BIT				BIT(7)
-#define ENABLE_PRE_CHARGING_BIT				BIT(6)
-#define ENABLE_FAST_CHARGING_BIT			BIT(5)
-#define ENABLE_FULLON_MODE_BIT				BIT(4)
-#define TOO_COLD_ADC_BIT				BIT(3)
-#define TOO_HOT_ADC_BIT					BIT(2)
-#define HOT_SL_ADC_BIT					BIT(1)
-#define COLD_SL_ADC_BIT					BIT(0)
-
 #define CHARGING_ENABLE_CMD				0x42
 #define CHARGING_ENABLE_CMD_BIT				BIT(0)
 
 #define CHGR_CFG2					0x51
@@ -78,270 +56,89 @@
 #define FLOAT_VOLTAGE_CFG				0x70
 #define FLOAT_VOLTAGE_SETTING_MASK			GENMASK(7, 0)
 
 #define FG_UPDATE_CFG_2_SEL				0x7D
-#define SOC_LT_OTG_THRESH_SEL_BIT			BIT(3)
 #define SOC_LT_CHG_RECHARGE_THRESH_SEL_BIT		BIT(2)
 #define VBT_LT_CHG_RECHARGE_THRESH_SEL_BIT		BIT(1)
-#define IBT_LT_CHG_TERM_THRESH_SEL_BIT			BIT(0)
-
-#define JEITA_EN_CFG					0x90
-#define JEITA_EN_HARDLIMIT_BIT				BIT(4)
-#define JEITA_EN_HOT_SL_FCV_BIT				BIT(3)
-#define JEITA_EN_COLD_SL_FCV_BIT			BIT(2)
-#define JEITA_EN_HOT_SL_CCC_BIT				BIT(1)
-#define JEITA_EN_COLD_SL_CCC_BIT			BIT(0)
-
-#define INT_RT_STS					0x310
-#define TYPE_C_CHANGE_RT_STS_BIT			BIT(7)
-#define USBIN_ICL_CHANGE_RT_STS_BIT			BIT(6)
-#define USBIN_SOURCE_CHANGE_RT_STS_BIT			BIT(5)
-#define USBIN_PLUGIN_RT_STS_BIT				BIT(4)
-#define USBIN_OV_RT_STS_BIT				BIT(3)
-#define USBIN_UV_RT_STS_BIT				BIT(2)
-#define USBIN_LT_3P6V_RT_STS_BIT			BIT(1)
-#define USBIN_COLLAPSE_RT_STS_BIT			BIT(0)
 
 #define OTG_CFG						0x153
-#define OTG_RESERVED_MASK				GENMASK(7, 6)
-#define DIS_OTG_ON_TLIM_BIT				BIT(5)
-#define QUICKSTART_OTG_FASTROLESWAP_BIT			BIT(4)
-#define INCREASE_DFP_TIME_BIT				BIT(3)
-#define ENABLE_OTG_IN_DEBUG_MODE_BIT			BIT(2)
 #define OTG_EN_SRC_CFG_BIT				BIT(1)
-#define CONCURRENT_MODE_CFG_BIT				BIT(0)
-
-#define OTG_ENG_OTG_CFG					0x1C0
-#define ENG_BUCKBOOST_HALT1_8_MODE_BIT			BIT(0)
 
 #define APSD_STATUS					0x307
-#define APSD_STATUS_7_BIT				BIT(7)
-#define HVDCP_CHECK_TIMEOUT_BIT				BIT(6)
-#define SLOW_PLUGIN_TIMEOUT_BIT				BIT(5)
-#define ENUMERATION_DONE_BIT				BIT(4)
-#define VADP_CHANGE_DONE_AFTER_AUTH_BIT			BIT(3)
-#define QC_AUTH_DONE_STATUS_BIT				BIT(2)
-#define QC_CHARGER_BIT					BIT(1)
 #define APSD_DTC_STATUS_DONE_BIT			BIT(0)
 
 #define APSD_RESULT_STATUS				0x308
-#define ICL_OVERRIDE_LATCH_BIT				BIT(7)
 #define APSD_RESULT_STATUS_MASK				GENMASK(6, 0)
-#define QC_3P0_BIT					BIT(6)
-#define QC_2P0_BIT					BIT(5)
 #define FLOAT_CHARGER_BIT				BIT(4)
 #define DCP_CHARGER_BIT					BIT(3)
 #define CDP_CHARGER_BIT					BIT(2)
 #define OCP_CHARGER_BIT					BIT(1)
 #define SDP_CHARGER_BIT					BIT(0)
 
-#define TYPE_C_STATUS_1					0x30B
-#define UFP_TYPEC_MASK					GENMASK(7, 5)
-#define UFP_TYPEC_RDSTD_BIT				BIT(7)
-#define UFP_TYPEC_RD1P5_BIT				BIT(6)
-#define UFP_TYPEC_RD3P0_BIT				BIT(5)
-#define UFP_TYPEC_FMB_255K_BIT				BIT(4)
-#define UFP_TYPEC_FMB_301K_BIT				BIT(3)
-#define UFP_TYPEC_FMB_523K_BIT				BIT(2)
-#define UFP_TYPEC_FMB_619K_BIT				BIT(1)
-#define UFP_TYPEC_OPEN_OPEN_BIT				BIT(0)
-
-#define TYPE_C_STATUS_2					0x30C
-#define DFP_RA_OPEN_BIT					BIT(7)
-#define TIMER_STAGE_BIT					BIT(6)
-#define EXIT_UFP_MODE_BIT				BIT(5)
-#define EXIT_DFP_MODE_BIT				BIT(4)
-#define DFP_TYPEC_MASK					GENMASK(3, 0)
-#define DFP_RD_OPEN_BIT					BIT(3)
-#define DFP_RD_RA_VCONN_BIT				BIT(2)
-#define DFP_RD_RD_BIT					BIT(1)
-#define DFP_RA_RA_BIT					BIT(0)
-
-#define TYPE_C_STATUS_3					0x30D
-#define ENABLE_BANDGAP_BIT				BIT(7)
-#define U_USB_GND_NOVBUS_BIT				BIT(6)
-#define U_USB_FLOAT_NOVBUS_BIT				BIT(5)
-#define U_USB_GND_BIT					BIT(4)
-#define U_USB_FMB1_BIT					BIT(3)
-#define U_USB_FLOAT1_BIT				BIT(2)
-#define U_USB_FMB2_BIT					BIT(1)
-#define U_USB_FLOAT2_BIT				BIT(0)
-
-#define TYPE_C_STATUS_4					0x30E
-#define UFP_DFP_MODE_STATUS_BIT				BIT(7)
-#define TYPEC_VBUS_STATUS_BIT				BIT(6)
-#define TYPEC_VBUS_ERROR_STATUS_BIT			BIT(5)
-#define TYPEC_DEBOUNCE_DONE_STATUS_BIT			BIT(4)
-#define TYPEC_UFP_AUDIO_ADAPT_STATUS_BIT		BIT(3)
-#define TYPEC_VCONN_OVERCURR_STATUS_BIT			BIT(2)
-#define CC_ORIENTATION_BIT				BIT(1)
-#define CC_ATTACHED_BIT					BIT(0)
-
-#define TYPE_C_STATUS_5					0x30F
-#define TRY_SOURCE_FAILED_BIT				BIT(6)
-#define TRY_SINK_FAILED_BIT				BIT(5)
-#define TIMER_STAGE_2_BIT				BIT(4)
-#define TYPEC_LEGACY_CABLE_STATUS_BIT			BIT(3)
-#define TYPEC_NONCOMP_LEGACY_CABLE_STATUS_BIT		BIT(2)
-#define TYPEC_TRYSOURCE_DETECT_STATUS_BIT		BIT(1)
-#define TYPEC_TRYSINK_DETECT_STATUS_BIT			BIT(0)
-
 #define CMD_APSD					0x341
-#define ICL_OVERRIDE_BIT				BIT(1)
 #define APSD_RERUN_BIT					BIT(0)
 
 #define TYPE_C_CFG					0x358
-#define APSD_START_ON_CC_BIT				BIT(7)
-#define WAIT_FOR_APSD_BIT				BIT(6)
 #define FACTORY_MODE_DETECTION_EN_BIT			BIT(5)
-#define FACTORY_MODE_ICL_3A_4A_BIT			BIT(4)
-#define FACTORY_MODE_DIS_CHGING_CFG_BIT			BIT(3)
-#define SUSPEND_NON_COMPLIANT_CFG_BIT			BIT(2)
 #define VCONN_OC_CFG_BIT				BIT(1)
-#define TYPE_C_OR_U_USB_BIT				BIT(0)
-
-#define TYPE_C_CFG_2					0x359
-#define TYPE_C_DFP_CURRSRC_MODE_BIT			BIT(7)
-#define DFP_CC_1P4V_OR_1P6V_BIT				BIT(6)
-#define VCONN_SOFTSTART_CFG_MASK			GENMASK(5, 4)
-#define EN_TRY_SOURCE_MODE_BIT				BIT(3)
-#define USB_FACTORY_MODE_ENABLE_BIT			BIT(2)
-#define TYPE_C_UFP_MODE_BIT				BIT(1)
-#define EN_80UA_180UA_CUR_SOURCE_BIT			BIT(0)
-
-#define TYPE_C_CFG_3					0x35A
-#define TVBUS_DEBOUNCE_BIT				BIT(7)
-#define TYPEC_LEGACY_CABLE_INT_EN_BIT			BIT(6)
-#define TYPEC_NONCOMPLIANT_LEGACY_CABLE_INT_EN_B	BIT(5)
-#define TYPEC_TRYSOURCE_DETECT_INT_EN_BIT		BIT(4)
-#define TYPEC_TRYSINK_DETECT_INT_EN_BIT			BIT(3)
-#define EN_TRYSINK_MODE_BIT				BIT(2)
-#define EN_LEGACY_CABLE_DETECTION_BIT			BIT(1)
-#define ALLOW_PD_DRING_UFP_TCCDB_BIT			BIT(0)
 
 #define USBIN_OPTIONS_1_CFG				0x362
-#define CABLE_R_SEL_BIT					BIT(7)
-#define HVDCP_AUTH_ALG_EN_CFG_BIT			BIT(6)
-#define HVDCP_AUTONOMOUS_MODE_EN_CFG_BIT		BIT(5)
-#define INPUT_PRIORITY_BIT				BIT(4)
-#define AUTO_SRC_DETECT_BIT				BIT(3)
 #define HVDCP_EN_BIT					BIT(2)
-#define VADP_INCREMENT_VOLTAGE_LIMIT_BIT		BIT(1)
-#define VADP_TAPER_TIMER_EN_BIT				BIT(0)
-
-#define USBIN_OPTIONS_2_CFG				0x363
-#define WIPWR_RST_EUD_CFG_BIT				BIT(7)
-#define SWITCHER_START_CFG_BIT				BIT(6)
-#define DCD_TIMEOUT_SEL_BIT				BIT(5)
-#define OCD_CURRENT_SEL_BIT				BIT(4)
-#define SLOW_PLUGIN_TIMER_EN_CFG_BIT			BIT(3)
-#define FLOAT_OPTIONS_MASK				GENMASK(2, 0)
-#define FLOAT_DIS_CHGING_CFG_BIT			BIT(2)
-#define SUSPEND_FLOAT_CFG_BIT				BIT(1)
-#define FORCE_FLOAT_SDP_CFG_BIT				BIT(0)
-
-#define TAPER_TIMER_SEL_CFG				0x364
-#define TYPEC_SPARE_CFG_BIT				BIT(7)
-#define TYPEC_DRP_DFP_TIME_CFG_BIT			BIT(5)
-#define TAPER_TIMER_SEL_MASK				GENMASK(1, 0)
-
-#define USBIN_LOAD_CFG					0x365
-#define USBIN_OV_CH_LOAD_OPTION_BIT			BIT(7)
-#define ICL_OVERRIDE_AFTER_APSD_BIT			BIT(4)
 
 #define USBIN_ICL_OPTIONS				0x366
-#define CFG_USB3P0_SEL_BIT				BIT(2)
 #define USB51_MODE_BIT					BIT(1)
 #define USBIN_MODE_CHG_BIT				BIT(0)
 
+/* PMI8998 only */
 #define TYPE_C_INTRPT_ENB_SOFTWARE_CTRL			0x368
-#define EXIT_SNK_BASED_ON_CC_BIT			BIT(7)
-#define VCONN_EN_ORIENTATION_BIT			BIT(6)
-#define TYPEC_VCONN_OVERCURR_INT_EN_BIT			BIT(5)
 #define VCONN_EN_SRC_BIT				BIT(4)
 #define VCONN_EN_VALUE_BIT				BIT(3)
 #define TYPEC_POWER_ROLE_CMD_MASK			GENMASK(2, 0)
 #define UFP_EN_CMD_BIT					BIT(2)
 #define DFP_EN_CMD_BIT					BIT(1)
 #define TYPEC_DISABLE_CMD_BIT				BIT(0)
 
 #define USBIN_CURRENT_LIMIT_CFG				0x370
-#define USBIN_CURRENT_LIMIT_MASK			GENMASK(7, 0)
 
 #define USBIN_AICL_OPTIONS_CFG				0x380
 #define SUSPEND_ON_COLLAPSE_USBIN_BIT			BIT(7)
-#define USBIN_AICL_HDC_EN_BIT				BIT(6)
 #define USBIN_AICL_START_AT_MAX_BIT			BIT(5)
-#define USBIN_AICL_RERUN_EN_BIT				BIT(4)
 #define USBIN_AICL_ADC_EN_BIT				BIT(3)
 #define USBIN_AICL_EN_BIT				BIT(2)
 #define USBIN_HV_COLLAPSE_RESPONSE_BIT			BIT(1)
 #define USBIN_LV_COLLAPSE_RESPONSE_BIT			BIT(0)
 
+// FIXME: drop these and their programming, no need to set min to 4.3v
 #define USBIN_5V_AICL_THRESHOLD_CFG			0x381
 #define USBIN_5V_AICL_THRESHOLD_CFG_MASK		GENMASK(2, 0)
 
 #define USBIN_CONT_AICL_THRESHOLD_CFG			0x384
 #define USBIN_CONT_AICL_THRESHOLD_CFG_MASK		GENMASK(5, 0)
 
-#define DC_ENG_SSUPPLY_CFG2				0x4C1
-#define ENG_SSUPPLY_IVREF_OTG_SS_MASK			GENMASK(2, 0)
-#define OTG_SS_SLOW					0x3
-
-#define DCIN_AICL_REF_SEL_CFG				0x481
-#define DCIN_CONT_AICL_THRESHOLD_CFG_MASK		GENMASK(5, 0)
-
-#define WI_PWR_OPTIONS					0x495
-#define CHG_OK_BIT					BIT(7)
-#define WIPWR_UVLO_IRQ_OPT_BIT				BIT(6)
-#define BUCK_HOLDOFF_ENABLE_BIT				BIT(5)
-#define CHG_OK_HW_SW_SELECT_BIT				BIT(4)
-#define WIPWR_RST_ENABLE_BIT				BIT(3)
-#define DCIN_WIPWR_IRQ_SELECT_BIT			BIT(2)
-#define AICL_SWITCH_ENABLE_BIT				BIT(1)
-#define ZIN_ICL_ENABLE_BIT				BIT(0)
-
 #define ICL_STATUS					0x607
 #define INPUT_CURRENT_LIMIT_MASK			GENMASK(7, 0)
 
 #define POWER_PATH_STATUS				0x60B
-#define P_PATH_INPUT_SS_DONE_BIT			BIT(7)
-#define P_PATH_USBIN_SUSPEND_STS_BIT			BIT(6)
-#define P_PATH_DCIN_SUSPEND_STS_BIT			BIT(5)
 #define P_PATH_USE_USBIN_BIT				BIT(4)
-#define P_PATH_USE_DCIN_BIT				BIT(3)
-#define P_PATH_POWER_PATH_MASK				GENMASK(2, 1)
 #define P_PATH_VALID_INPUT_POWER_SOURCE_STS_BIT		BIT(0)
 
 #define BARK_BITE_WDOG_PET				0x643
 #define BARK_BITE_WDOG_PET_BIT				BIT(0)
 
 #define WD_CFG						0x651
 #define WATCHDOG_TRIGGER_AFP_EN_BIT			BIT(7)
 #define BARK_WDOG_INT_EN_BIT				BIT(6)
-#define BITE_WDOG_INT_EN_BIT				BIT(5)
-#define SFT_AFTER_WDOG_IRQ_MASK				GENMASK(4, 3)
-#define WDOG_IRQ_SFT_BIT				BIT(2)
 #define WDOG_TIMER_EN_ON_PLUGIN_BIT			BIT(1)
-#define WDOG_TIMER_EN_BIT				BIT(0)
 
 #define SNARL_BARK_BITE_WD_CFG				0x653
-#define BITE_WDOG_DISABLE_CHARGING_CFG_BIT		BIT(7)
-#define SNARL_WDOG_TIMEOUT_MASK				GENMASK(6, 4)
-#define BARK_WDOG_TIMEOUT_MASK				GENMASK(3, 2)
-#define BITE_WDOG_TIMEOUT_MASK				GENMASK(1, 0)
 
 #define AICL_RERUN_TIME_CFG				0x661
 #define AICL_RERUN_TIME_MASK				GENMASK(1, 0)
+#define AIC_RERUN_TIME_3_SECS				0x0
 
+/* FIXME: probably remove this so we get parallel charging? */
 #define STAT_CFG					0x690
-#define STAT_SW_OVERRIDE_VALUE_BIT			BIT(7)
 #define STAT_SW_OVERRIDE_CFG_BIT			BIT(6)
-#define STAT_PARALLEL_OFF_DG_CFG_MASK			GENMASK(5, 4)
-#define STAT_POLARITY_CFG_BIT				BIT(3)
-#define STAT_PARALLEL_CFG_BIT				BIT(2)
-#define STAT_FUNCTION_CFG_BIT				BIT(1)
-#define STAT_IRQ_PULSING_EN_BIT				BIT(0)
 
 #define SDP_CURRENT_UA					500000
 #define CDP_CURRENT_UA					1500000
 #define DCP_CURRENT_UA					1500000

-- 
2.49.0

[PATCH 09/11] power: supply: qcom_smbx: add smb5 support

[Casey Connolly]

Introduce support for the SMB5 charger found on pm8150b and other more
modern Qualcomm SoCs.

SMB5 is largely similar to SMB2, with a few register differences. The
main difference is the new Type-C hardware block which some registers
are moved to.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
---
 drivers/power/supply/qcom_smbx.c | 367 +++++++++++++++++++++++++++++++++------
 1 file changed, 314 insertions(+), 53 deletions(-)

diff --git a/drivers/power/supply/qcom_smbx.c b/drivers/power/supply/qcom_smbx.c
index 10ddd33a09599decb23c0f1ccd02fa9b56602543..d902f3f43548191d3d0310ce90e699918ed0f16f 100644
--- a/drivers/power/supply/qcom_smbx.c
+++ b/drivers/power/supply/qcom_smbx.c
@@ -22,18 +22,32 @@
 #include <linux/regmap.h>
 #include <linux/types.h>
 #include <linux/workqueue.h>
 
+enum smb_generation {
+	SMB2,
+	SMB5,
+};
+
+#define SMB_REG_OFFSET(smb) (smb->gen == SMB2 ? 0x600 : 0x100)
+
 /* clang-format off */
 #define BATTERY_CHARGER_STATUS_1			0x06
 #define BATTERY_CHARGER_STATUS_MASK			GENMASK(2, 0)
 
 #define BATTERY_CHARGER_STATUS_2			0x07
-#define CHARGER_ERROR_STATUS_BAT_OV_BIT			BIT(5)
-#define BAT_TEMP_STATUS_HOT_SOFT_LIMIT_BIT		BIT(3)
-#define BAT_TEMP_STATUS_COLD_SOFT_LIMIT_BIT		BIT(2)
-#define BAT_TEMP_STATUS_TOO_HOT_BIT			BIT(1)
-#define BAT_TEMP_STATUS_TOO_COLD_BIT			BIT(0)
+#define SMB2_CHARGER_ERROR_STATUS_BAT_OV_BIT		BIT(5)
+#define SMB2_BAT_TEMP_STATUS_HOT_SOFT_LIMIT_BIT	BIT(3)
+#define SMB2_BAT_TEMP_STATUS_COLD_SOFT_LIMIT_BIT	BIT(2)
+#define SMB2_BAT_TEMP_STATUS_TOO_HOT_BIT		BIT(1)
+#define SMB5_CHARGER_ERROR_STATUS_BAT_OV_BIT		BIT(1)
+#define SMB2_BAT_TEMP_STATUS_TOO_COLD_BIT		BIT(0)
+
+#define BATTERY_CHARGER_STATUS_7			0x0D
+#define SMB5_BAT_TEMP_STATUS_HOT_SOFT_BIT		BIT(5)
+#define SMB5_BAT_TEMP_STATUS_COLD_SOFT_BIT		BIT(4)
+#define SMB5_BAT_TEMP_STATUS_TOO_HOT_BIT		BIT(3)
+#define SMB5_BAT_TEMP_STATUS_TOO_COLD_BIT		BIT(2)
 
 #define CHARGING_ENABLE_CMD				0x42
 #define CHARGING_ENABLE_CMD_BIT				BIT(0)
 
@@ -55,11 +69,14 @@
 
 #define FLOAT_VOLTAGE_CFG				0x70
 #define FLOAT_VOLTAGE_SETTING_MASK			GENMASK(7, 0)
 
-#define FG_UPDATE_CFG_2_SEL				0x7D
-#define SOC_LT_CHG_RECHARGE_THRESH_SEL_BIT		BIT(2)
-#define VBT_LT_CHG_RECHARGE_THRESH_SEL_BIT		BIT(1)
+#define SMB2_FG_UPDATE_CFG_2_SEL			0x7D
+#define SMB2_SOC_LT_CHG_RECHARGE_THRESH_SEL_BIT		BIT(2)
+#define SMB2_VBT_LT_CHG_RECHARGE_THRESH_SEL_BIT		BIT(1)
+
+#define SMB5_CHARGE_RCHG_SOC_THRESHOLD_CFG_REG		0x7D
+#define SMB5_CHARGE_RCHG_SOC_THRESHOLD_CFG_MASK		GENMASK(7, 0)
 
 #define OTG_CFG						0x153
 #define OTG_EN_SRC_CFG_BIT				BIT(1)
 
@@ -73,36 +90,46 @@
 #define CDP_CHARGER_BIT					BIT(2)
 #define OCP_CHARGER_BIT					BIT(1)
 #define SDP_CHARGER_BIT					BIT(0)
 
+#define USBIN_CMD_IL					0x340
+#define USBIN_SUSPEND_BIT				BIT(0)
+
 #define CMD_APSD					0x341
 #define APSD_RERUN_BIT					BIT(0)
 
+#define CMD_ICL_OVERRIDE				0x342
+#define ICL_OVERRIDE_BIT				BIT(0)
+
 #define TYPE_C_CFG					0x358
+#define APSD_START_ON_CC_BIT				BIT(7)
 #define FACTORY_MODE_DETECTION_EN_BIT			BIT(5)
 #define VCONN_OC_CFG_BIT				BIT(1)
 
 #define USBIN_OPTIONS_1_CFG				0x362
+#define AUTO_SRC_DETECT_BIT				BIT(3)
 #define HVDCP_EN_BIT					BIT(2)
 
+#define USBIN_LOAD_CFG					0x65
+#define ICL_OVERRIDE_AFTER_APSD_BIT			BIT(4)
+
 #define USBIN_ICL_OPTIONS				0x366
 #define USB51_MODE_BIT					BIT(1)
 #define USBIN_MODE_CHG_BIT				BIT(0)
 
 /* PMI8998 only */
 #define TYPE_C_INTRPT_ENB_SOFTWARE_CTRL			0x368
-#define VCONN_EN_SRC_BIT				BIT(4)
+#define SMB2_VCONN_EN_SRC_BIT				BIT(4)
 #define VCONN_EN_VALUE_BIT				BIT(3)
 #define TYPEC_POWER_ROLE_CMD_MASK			GENMASK(2, 0)
-#define UFP_EN_CMD_BIT					BIT(2)
-#define DFP_EN_CMD_BIT					BIT(1)
-#define TYPEC_DISABLE_CMD_BIT				BIT(0)
+#define SMB5_EN_SNK_ONLY_BIT				BIT(1)
 
 #define USBIN_CURRENT_LIMIT_CFG				0x370
 
 #define USBIN_AICL_OPTIONS_CFG				0x380
 #define SUSPEND_ON_COLLAPSE_USBIN_BIT			BIT(7)
 #define USBIN_AICL_START_AT_MAX_BIT			BIT(5)
+#define USBIN_AICL_PERIODIC_RERUN_EN_BIT		BIT(4)
 #define USBIN_AICL_ADC_EN_BIT				BIT(3)
 #define USBIN_AICL_EN_BIT				BIT(2)
 #define USBIN_HV_COLLAPSE_RESPONSE_BIT			BIT(1)
 #define USBIN_LV_COLLAPSE_RESPONSE_BIT			BIT(0)
@@ -113,15 +140,41 @@
 
 #define USBIN_CONT_AICL_THRESHOLD_CFG			0x384
 #define USBIN_CONT_AICL_THRESHOLD_CFG_MASK		GENMASK(5, 0)
 
-#define ICL_STATUS					0x607
+#define ICL_STATUS(smb)					(SMB_REG_OFFSET(smb) + 0x07)
 #define INPUT_CURRENT_LIMIT_MASK			GENMASK(7, 0)
 
-#define POWER_PATH_STATUS				0x60B
+#define POWER_PATH_STATUS(smb)				(SMB_REG_OFFSET(smb) + 0x0B)
 #define P_PATH_USE_USBIN_BIT				BIT(4)
 #define P_PATH_VALID_INPUT_POWER_SOURCE_STS_BIT		BIT(0)
 
+/* 0x5xx region is PM8150b only Type-C registers */
+
+/* Bits 2:0 match PMI8998 TYPE_C_INTRPT_ENB_SOFTWARE_CTRL */
+#define SMB5_TYPE_C_MODE_CFG				0x544
+#define SMB5_EN_TRY_SNK_BIT				BIT(4)
+#define SMB5_EN_SNK_ONLY_BIT				BIT(1)
+
+#define SMB5_TYPEC_TYPE_C_VCONN_CONTROL			0x546
+#define SMB5_VCONN_EN_ORIENTATION_BIT			BIT(2)
+#define SMB5_VCONN_EN_VALUE_BIT				BIT(1)
+#define SMB5_VCONN_EN_SRC_BIT				BIT(0)
+
+
+#define SMB5_TYPE_C_DEBUG_ACCESS_SINK			0x54a
+#define SMB5_TYPEC_DEBUG_ACCESS_SINK_MASK		GENMASK(4, 0)
+
+#define SMB5_DEBUG_ACCESS_SRC_CFG			0x54C
+#define SMB5_EN_UNORIENTED_DEBUG_ACCESS_SRC_BIT	BIT(0)
+
+#define SMB5_TYPE_C_EXIT_STATE_CFG			0x550
+#define SMB5_BYPASS_VSAFE0V_DURING_ROLE_SWAP_BIT	BIT(3)
+#define SMB5_SEL_SRC_UPPER_REF_BIT			BIT(2)
+#define SMB5_EXIT_SNK_BASED_ON_CC_BIT			BIT(0)
+
+/* Common */
+
 #define BARK_BITE_WDOG_PET				0x643
 #define BARK_BITE_WDOG_PET_BIT				BIT(0)
 
 #define WD_CFG						0x651
@@ -184,8 +237,9 @@ struct smb_chip {
 	const char *name;
 	unsigned int base;
 	struct regmap *regmap;
 	struct power_supply_battery_info *batt_info;
+	enum smb_generation gen;
 
 	struct delayed_work status_change_work;
 	int cable_irq;
 	bool wakeup_enabled;
@@ -195,8 +249,15 @@ struct smb_chip {
 
 	struct power_supply *chg_psy;
 };
 
+struct smb_match_data {
+	const char *name;
+	enum smb_generation gen;
+	size_t init_seq_len;
+	const struct smb_init_register __counted_by(init_seq_len) *init_seq;
+};
+
 static enum power_supply_property smb_properties[] = {
 	POWER_SUPPLY_PROP_MANUFACTURER,
 	POWER_SUPPLY_PROP_MODEL_NAME,
 	POWER_SUPPLY_PROP_CURRENT_MAX,
@@ -212,9 +273,9 @@ static int smb_get_prop_usb_online(struct smb_chip *chip, int *val)
 {
 	unsigned int stat;
 	int rc;
 
-	rc = regmap_read(chip->regmap, chip->base + POWER_PATH_STATUS, &stat);
+	rc = regmap_read(chip->regmap, chip->base + POWER_PATH_STATUS(chip), &stat);
 	if (rc < 0) {
 		dev_err(chip->dev, "Couldn't read power path status: %d\n", rc);
 		return rc;
 	}
@@ -267,11 +328,37 @@ static int smb_apsd_get_charger_type(struct smb_chip *chip, int *val)
 
 	return 0;
 }
 
+/* Return 1 when in overvoltage state, else 0 or -errno */
+static int smbx_ov_status(struct smb_chip *chip)
+{
+	u16 reg;
+	u8 mask;
+	int rc;
+	u32 val;
+
+	switch (chip->gen) {
+	case SMB2:
+		reg = BATTERY_CHARGER_STATUS_2;
+		mask = SMB2_CHARGER_ERROR_STATUS_BAT_OV_BIT;
+		break;
+	case SMB5:
+		reg = BATTERY_CHARGER_STATUS_7;
+		mask = SMB5_CHARGER_ERROR_STATUS_BAT_OV_BIT;
+		break;
+	}
+
+	rc = regmap_read(chip->regmap, chip->base + reg, &val);
+	if (rc)
+		return rc;
+
+	return !!(reg & mask);
+}
+
 static int smb_get_prop_status(struct smb_chip *chip, int *val)
 {
-	unsigned char stat[2];
+	u32 stat;
 	int usb_online = 0;
 	int rc;
 
 	rc = smb_get_prop_usb_online(chip, &usb_online);
@@ -279,24 +366,29 @@ static int smb_get_prop_status(struct smb_chip *chip, int *val)
 		*val = POWER_SUPPLY_STATUS_DISCHARGING;
 		return rc;
 	}
 
-	rc = regmap_bulk_read(chip->regmap,
-			      chip->base + BATTERY_CHARGER_STATUS_1, &stat, 2);
+	rc = regmap_read(chip->regmap,
+			      chip->base + BATTERY_CHARGER_STATUS_1, &stat);
 	if (rc < 0) {
 		dev_err(chip->dev, "Failed to read charging status ret=%d\n",
 			rc);
 		return rc;
 	}
 
-	if (stat[1] & CHARGER_ERROR_STATUS_BAT_OV_BIT) {
+	rc = smbx_ov_status(chip);
+	if (rc < 0)
+		return rc;
+
+	/* In overvoltage state */
+	if (rc == 1) {
 		*val = POWER_SUPPLY_STATUS_NOT_CHARGING;
 		return 0;
 	}
 
-	stat[0] = stat[0] & BATTERY_CHARGER_STATUS_MASK;
+	stat = stat & BATTERY_CHARGER_STATUS_MASK;
 
-	switch (stat[0]) {
+	switch (stat) {
 	case TRICKLE_CHARGE:
 	case PRE_CHARGE:
 	case FAST_CHARGE:
 	case FULLON_CHARGE:
@@ -318,9 +410,9 @@ static int smb_get_prop_status(struct smb_chip *chip, int *val)
 
 static inline int smb_get_current_limit(struct smb_chip *chip,
 					 unsigned int *val)
 {
-	int rc = regmap_read(chip->regmap, chip->base + ICL_STATUS, val);
+	int rc = regmap_read(chip->regmap, chip->base + ICL_STATUS(chip), val);
 
 	if (rc >= 0)
 		*val *= CURRENT_SCALE_FACTOR;
 	return rc;
@@ -413,9 +505,46 @@ static int smb_get_iio_chan(struct smb_chip *chip, struct iio_channel *chan,
 
 	return iio_read_channel_processed(chan, val);
 }
 
-static int smb_get_prop_health(struct smb_chip *chip, int *val)
+static int smb5_get_prop_health(struct smb_chip *chip, int *val)
+{
+	int rc;
+	unsigned int stat;
+
+	rc = smbx_ov_status(chip);
+
+	/* Treat any error as if we are in the overvoltage state */
+	if (rc < 0)
+		dev_err(chip->dev, "Couldn't determine overvoltage status!");
+	if (rc) {
+		dev_err(chip->dev, "battery over-voltage");
+		*val = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
+		return 0;
+	}
+
+	rc = regmap_read(chip->regmap, chip->base + BATTERY_CHARGER_STATUS_7,
+			 &stat);
+	if (rc < 0) {
+		dev_err(chip->dev, "Couldn't read charger status 7 rc=%d\n", rc);
+		return rc;
+	}
+
+	if (stat & SMB5_BAT_TEMP_STATUS_TOO_COLD_BIT)
+		*val = POWER_SUPPLY_HEALTH_COLD;
+	else if (stat & SMB5_BAT_TEMP_STATUS_TOO_HOT_BIT)
+		*val = POWER_SUPPLY_HEALTH_OVERHEAT;
+	else if (stat & SMB5_BAT_TEMP_STATUS_COLD_SOFT_BIT)
+		*val = POWER_SUPPLY_HEALTH_COOL;
+	else if (stat & SMB5_BAT_TEMP_STATUS_HOT_SOFT_BIT)
+		*val = POWER_SUPPLY_HEALTH_WARM;
+	else
+		*val = POWER_SUPPLY_HEALTH_GOOD;
+
+	return 0;
+}
+
+static int smb2_get_prop_health(struct smb_chip *chip, int *val)
 {
 	int rc;
 	unsigned int stat;
 
@@ -426,34 +555,45 @@ static int smb_get_prop_health(struct smb_chip *chip, int *val)
 		return rc;
 	}
 
 	switch (stat) {
-	case CHARGER_ERROR_STATUS_BAT_OV_BIT:
+	case SMB2_CHARGER_ERROR_STATUS_BAT_OV_BIT:
 		*val = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
 		return 0;
-	case BAT_TEMP_STATUS_TOO_COLD_BIT:
+	case SMB2_BAT_TEMP_STATUS_TOO_COLD_BIT:
 		*val = POWER_SUPPLY_HEALTH_COLD;
 		return 0;
-	case BAT_TEMP_STATUS_TOO_HOT_BIT:
+	case SMB2_BAT_TEMP_STATUS_TOO_HOT_BIT:
 		*val = POWER_SUPPLY_HEALTH_OVERHEAT;
 		return 0;
-	case BAT_TEMP_STATUS_COLD_SOFT_LIMIT_BIT:
+	case SMB2_BAT_TEMP_STATUS_COLD_SOFT_LIMIT_BIT:
 		*val = POWER_SUPPLY_HEALTH_COOL;
 		return 0;
-	case BAT_TEMP_STATUS_HOT_SOFT_LIMIT_BIT:
+	case SMB2_BAT_TEMP_STATUS_HOT_SOFT_LIMIT_BIT:
 		*val = POWER_SUPPLY_HEALTH_WARM;
 		return 0;
 	default:
 		*val = POWER_SUPPLY_HEALTH_GOOD;
 		return 0;
 	}
 }
 
+static int smb_get_prop_health(struct smb_chip *chip, int *val)
+{
+	switch (chip->gen) {
+	case SMB2:
+		return smb2_get_prop_health(chip, val);
+	case SMB5:
+		return smb5_get_prop_health(chip, val);
+	}
+}
+
 static int smb_get_property(struct power_supply *psy,
 			     enum power_supply_property psp,
 			     union power_supply_propval *val)
 {
 	struct smb_chip *chip = power_supply_get_drvdata(psy);
+	int ret;
 
 	switch (psp) {
 	case POWER_SUPPLY_PROP_MANUFACTURER:
 		val->strval = "Qualcomm";
@@ -466,10 +606,15 @@ static int smb_get_property(struct power_supply *psy,
 	case POWER_SUPPLY_PROP_CURRENT_NOW:
 		return smb_get_iio_chan(chip, chip->usb_in_i_chan,
 					 &val->intval);
 	case POWER_SUPPLY_PROP_VOLTAGE_NOW:
-		return smb_get_iio_chan(chip, chip->usb_in_v_chan,
+		ret = smb_get_iio_chan(chip, chip->usb_in_v_chan,
 					 &val->intval);
+		if (!ret) {
+			if (chip->gen == SMB5)
+				val->intval *= 16;
+		}
+		return ret;
 	case POWER_SUPPLY_PROP_ONLINE:
 		return smb_get_prop_usb_online(chip, &val->intval);
 	case POWER_SUPPLY_PROP_STATUS:
 		return smb_get_prop_status(chip, &val->intval);
@@ -515,14 +660,10 @@ static int smb_property_is_writable(struct power_supply *psy,
 
 static irqreturn_t smb_handle_batt_overvoltage(int irq, void *data)
 {
 	struct smb_chip *chip = data;
-	unsigned int status;
 
-	regmap_read(chip->regmap, chip->base + BATTERY_CHARGER_STATUS_2,
-		    &status);
-
-	if (status & CHARGER_ERROR_STATUS_BAT_OV_BIT) {
+	if (smbx_ov_status(chip) == 1) {
 		/* The hardware stops charging automatically */
 		dev_err(chip->dev, "battery overvoltage detected\n");
 		power_supply_changed(chip->chg_psy);
 	}
@@ -566,9 +707,9 @@ static irqreturn_t smb_handle_wdog_bark(int irq, void *data)
 	return IRQ_HANDLED;
 }
 
 static const struct power_supply_desc smb_psy_desc = {
-	.name = "pmi8998_charger",
+	.name = "SMB2_charger",
 	.type = POWER_SUPPLY_TYPE_USB,
 	.usb_types = BIT(POWER_SUPPLY_USB_TYPE_SDP) |
 		     BIT(POWER_SUPPLY_USB_TYPE_CDP) |
 		     BIT(POWER_SUPPLY_USB_TYPE_DCP) |
@@ -580,18 +721,100 @@ static const struct power_supply_desc smb_psy_desc = {
 	.property_is_writeable = smb_property_is_writable,
 };
 
 /* Init sequence derived from vendor downstream driver */
-static const struct smb_init_register smb_init_seq[] = {
-	{ .addr = AICL_RERUN_TIME_CFG, .mask = AICL_RERUN_TIME_MASK, .val = 0 },
+static const struct smb_init_register smb5_init_seq[] = {
+	{ .addr = USBIN_CMD_IL, .mask = USBIN_SUSPEND_BIT, .val = 0 },
+	/*
+	 * By default configure us as an upstream facing port
+	 * FIXME: This will be handled by the type-c driver
+	 */
+	{ .addr = SMB5_TYPE_C_MODE_CFG,
+	  .mask = SMB5_EN_TRY_SNK_BIT | SMB5_EN_SNK_ONLY_BIT,
+	  .val = SMB5_EN_TRY_SNK_BIT },
+	{ .addr = SMB5_TYPEC_TYPE_C_VCONN_CONTROL,
+	  .mask = SMB5_VCONN_EN_ORIENTATION_BIT | SMB5_VCONN_EN_SRC_BIT |
+		  SMB5_VCONN_EN_VALUE_BIT,
+	  .val = SMB2_VCONN_EN_SRC_BIT },
+	{ .addr = SMB5_DEBUG_ACCESS_SRC_CFG,
+	  .mask = SMB5_EN_UNORIENTED_DEBUG_ACCESS_SRC_BIT,
+	  .val = SMB5_EN_UNORIENTED_DEBUG_ACCESS_SRC_BIT },
+	{ .addr = SMB5_TYPE_C_EXIT_STATE_CFG,
+	  .mask = SMB5_SEL_SRC_UPPER_REF_BIT,
+	  .val = SMB5_SEL_SRC_UPPER_REF_BIT },
+	/*
+	 * Disable Type-C factory mode and stay in Attached.SRC state when VCONN
+	 * over-current happens
+	 */
+	{ .addr = TYPE_C_CFG,
+	  .mask = APSD_START_ON_CC_BIT,
+	  .val = 0 },
+	{ .addr = SMB5_TYPE_C_DEBUG_ACCESS_SINK,
+	  .mask = SMB5_TYPEC_DEBUG_ACCESS_SINK_MASK,
+	  .val = 0x17 },
+	/* Configure VBUS for software control */
+	{ .addr = OTG_CFG, .mask = OTG_EN_SRC_CFG_BIT, .val = 0 },
+	/*
+	 * Recharge when State Of Charge drops below 98%.
+	 */
+	{ .addr = SMB5_CHARGE_RCHG_SOC_THRESHOLD_CFG_REG,
+	  .mask = SMB5_CHARGE_RCHG_SOC_THRESHOLD_CFG_MASK,
+	  .val = 250 },
+	/* Enable charging */
+	{ .addr = CHARGING_ENABLE_CMD,
+	  .mask = CHARGING_ENABLE_CMD_BIT,
+	  .val = CHARGING_ENABLE_CMD_BIT },
+	/* Enable BC1P2 auto Src detect */
+	{ .addr = USBIN_OPTIONS_1_CFG,
+	  .mask = AUTO_SRC_DETECT_BIT,
+	  .val = AUTO_SRC_DETECT_BIT },
+	/* Set the default SDP charger type to a 500ma USB 2.0 port */
+	{ .addr = USBIN_ICL_OPTIONS,
+	  .mask = USBIN_MODE_CHG_BIT,
+	  .val = USBIN_MODE_CHG_BIT },
+	{ .addr = CMD_ICL_OVERRIDE,
+	  .mask = ICL_OVERRIDE_BIT,
+	  .val = 0 },
+	{ .addr = USBIN_LOAD_CFG,
+	  .mask = ICL_OVERRIDE_AFTER_APSD_BIT,
+	  .val = 0 },
+	/* Disable watchdog */
+	{ .addr = SNARL_BARK_BITE_WD_CFG, .mask = 0xff, .val = 0 },
+	{ .addr = WD_CFG,
+	  .mask = WATCHDOG_TRIGGER_AFP_EN_BIT | WDOG_TIMER_EN_ON_PLUGIN_BIT |
+		  BARK_WDOG_INT_EN_BIT,
+	  .val = 0 },
+	/*
+	 * Enable Automatic Input Current Limit, this will slowly ramp up the current
+	 * When connected to a wall charger, and automatically stop when it detects
+	 * the charger current limit (voltage drop?) or it reaches the programmed limit.
+	 */
+	{ .addr = USBIN_AICL_OPTIONS_CFG,
+	  .mask = USBIN_AICL_PERIODIC_RERUN_EN_BIT | USBIN_AICL_ADC_EN_BIT
+			| USBIN_AICL_EN_BIT | SUSPEND_ON_COLLAPSE_USBIN_BIT,
+	  .val = USBIN_AICL_PERIODIC_RERUN_EN_BIT | USBIN_AICL_ADC_EN_BIT
+			| USBIN_AICL_EN_BIT | SUSPEND_ON_COLLAPSE_USBIN_BIT },
+	/*
+	 * This overrides all of the other current limit configs and is
+	 * expected to be used for setting limits based on temperature.
+	 * We set some relatively safe default value while still allowing
+	 * a comfortably fast charging rate.
+	 */
+	{ .addr = FAST_CHARGE_CURRENT_CFG,
+	  .mask = FAST_CHARGE_CURRENT_SETTING_MASK,
+	  .val = 1950000 / CURRENT_SCALE_FACTOR },
+};
+
+/* Init sequence derived from vendor downstream driver */
+static const struct smb_init_register smb2_init_seq[] = {
 	/*
 	 * By default configure us as an upstream facing port
 	 * FIXME: This will be handled by the type-c driver
 	 */
 	{ .addr = TYPE_C_INTRPT_ENB_SOFTWARE_CTRL,
-	  .mask = TYPEC_POWER_ROLE_CMD_MASK | VCONN_EN_SRC_BIT |
+	  .mask = TYPEC_POWER_ROLE_CMD_MASK | SMB2_VCONN_EN_SRC_BIT |
 		  VCONN_EN_VALUE_BIT,
-	  .val = VCONN_EN_SRC_BIT },
+	  .val = SMB2_VCONN_EN_SRC_BIT },
 	/*
 	 * Disable Type-C factory mode and stay in Attached.SRC state when VCONN
 	 * over-current happens
 	 */
@@ -603,12 +826,12 @@ static const struct smb_init_register smb_init_seq[] = {
 	/*
 	 * Use VBAT to determine the recharge threshold when battery is full
 	 * rather than the state of charge.
 	 */
-	{ .addr = FG_UPDATE_CFG_2_SEL,
-	  .mask = SOC_LT_CHG_RECHARGE_THRESH_SEL_BIT |
-		  VBT_LT_CHG_RECHARGE_THRESH_SEL_BIT,
-	  .val = VBT_LT_CHG_RECHARGE_THRESH_SEL_BIT },
+	{ .addr = SMB2_FG_UPDATE_CFG_2_SEL,
+	  .mask = SMB2_SOC_LT_CHG_RECHARGE_THRESH_SEL_BIT |
+		  SMB2_VBT_LT_CHG_RECHARGE_THRESH_SEL_BIT,
+	  .val = SMB2_VBT_LT_CHG_RECHARGE_THRESH_SEL_BIT },
 	/* Enable charging */
 	{ .addr = USBIN_OPTIONS_1_CFG, .mask = HVDCP_EN_BIT, .val = 0 },
 	{ .addr = CHARGING_ENABLE_CMD,
 	  .mask = CHARGING_ENABLE_CMD_BIT,
@@ -674,19 +897,48 @@ static const struct smb_init_register smb_init_seq[] = {
 	  .mask = PRE_CHARGE_CURRENT_SETTING_MASK,
 	  .val = 500000 / CURRENT_SCALE_FACTOR },
 };
 
-static int smb_init_hw(struct smb_chip *chip)
+struct smb_match_data pmi8998_match_data = {
+	.init_seq = smb2_init_seq,
+	.init_seq_len = ARRAY_SIZE(smb2_init_seq),
+	.name = "pmi8998",
+	.gen = SMB2,
+};
+
+struct smb_match_data pm660_match_data = {
+	.init_seq = smb2_init_seq,
+	.init_seq_len = ARRAY_SIZE(smb2_init_seq),
+	.name = "pm660",
+	.gen = SMB2,
+};
+
+struct smb_match_data pm8150b_match_data = {
+	.init_seq = smb5_init_seq,
+	.init_seq_len = ARRAY_SIZE(smb5_init_seq),
+	.name = "pm8150b",
+	.gen = SMB5,
+};
+
+struct smb_match_data pm7250b_match_data = {
+	.init_seq = smb5_init_seq,
+	.init_seq_len = ARRAY_SIZE(smb5_init_seq),
+	.name = "pm7250b",
+	.gen = SMB5,
+};
+
+
+static int smb_init_hw(struct smb_chip *chip, const struct smb_init_register *init_seq, size_t len)
 {
 	int rc, i;
 
-	for (i = 0; i < ARRAY_SIZE(smb_init_seq); i++) {
+	for (i = 0; i < len; i++) {
 		dev_dbg(chip->dev, "%d: Writing 0x%02x to 0x%02x\n", i,
-			smb_init_seq[i].val, smb_init_seq[i].addr);
+			init_seq[i].val, init_seq[i].addr);
 		rc = regmap_update_bits(chip->regmap,
-					chip->base + smb_init_seq[i].addr,
-					smb_init_seq[i].mask,
-					smb_init_seq[i].val);
+					chip->base + init_seq[i].addr,
+					init_seq[i].mask,
+					init_seq[i].val);
 		if (rc < 0)
 			return dev_err_probe(chip->dev, rc,
 					     "%s: init command %d failed\n",
 					     __func__, i);
@@ -721,8 +973,9 @@ static int smb_probe(struct platform_device *pdev)
 {
 	struct power_supply_config supply_config = {};
 	struct power_supply_desc *desc;
 	struct smb_chip *chip;
+	const struct smb_match_data *match_data;
 	int rc, irq;
 
 	chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
 	if (!chip)
@@ -751,9 +1004,15 @@ static int smb_probe(struct platform_device *pdev)
 		return dev_err_probe(chip->dev, PTR_ERR(chip->usb_in_i_chan),
 				     "Couldn't get usbin_i IIO channel\n");
 	}
 
-	rc = smb_init_hw(chip);
+	match_data = (const struct smb_match_data *)device_get_match_data(chip->dev);
+
+	chip->gen = match_data->gen;
+
+	dev_info(chip->dev, "Generation %s\n", chip->gen == SMB2 ? "SMB2" : "SMB5");
+
+	rc = smb_init_hw(chip, match_data->init_seq, match_data->init_seq_len);
 	if (rc < 0)
 		return rc;
 
 	supply_config.drv_data = chip;
@@ -764,9 +1023,9 @@ static int smb_probe(struct platform_device *pdev)
 		return -ENOMEM;
 	memcpy(desc, &smb_psy_desc, sizeof(smb_psy_desc));
 	desc->name =
 		devm_kasprintf(chip->dev, GFP_KERNEL, "%s-charger",
-			       (const char *)device_get_match_data(chip->dev));
+			       match_data->name);
 	if (!desc->name)
 		return -ENOMEM;
 
 	chip->chg_psy =
@@ -839,10 +1098,12 @@ static int smb_probe(struct platform_device *pdev)
 	return 0;
 }
 
 static const struct of_device_id smb_match_id_table[] = {
-	{ .compatible = "qcom,pmi8998-charger", .data = "pmi8998" },
-	{ .compatible = "qcom,pm660-charger", .data = "pm660" },
+	{ .compatible = "qcom,pmi8998-charger", .data = &pmi8998_match_data },
+	{ .compatible = "qcom,pm660-charger", .data = &pm660_match_data },
+	{ .compatible = "qcom,pm7250b-charger", .data = &pm7250b_match_data },
+	{ .compatible = "qcom,pm8150b-charger", .data = &pm8150b_match_data },
 	{ /* sentinal */ }
 };
 MODULE_DEVICE_TABLE(of, smb_match_id_table);
 

-- 
2.49.0

Re: [PATCH 09/11] power: supply: qcom_smbx: add smb5 support

[kernel test robot]

Hi Casey,

kernel test robot noticed the following build warnings:

[auto build test WARNING on bc6e0ba6c9bafa6241b05524b9829808056ac4ad]

url:    https://github.com/intel-lab-lkp/linux/commits/Casey-Connolly/dt-bindings-power-supply-qcom-pmi89980-charger-add-pm8150b-and-7250b/20250619-230137
base:   bc6e0ba6c9bafa6241b05524b9829808056ac4ad
patch link:    https://lore.kernel.org/r/20250619-smb2-smb5-support-v1-9-ac5dec51b6e1%40linaro.org
patch subject: [PATCH 09/11] power: supply: qcom_smbx: add smb5 support
config: x86_64-buildonly-randconfig-006-20250620 (https://download.01.org/0day-ci/archive/20250620/202506201101.9HMIR1fb-lkp@intel.com/config)
compiler: clang version 20.1.2 (https://github.com/llvm/llvm-project 58df0ef89dd64126512e4ee27b4ac3fd8ddf6247)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250620/202506201101.9HMIR1fb-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202506201101.9HMIR1fb-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> Warning: drivers/power/supply/qcom_smbx.c:250 struct member 'gen' not described in 'smb_chip'

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH 09/11] power: supply: qcom_smbx: add smb5 support

[Luca Weiss]

Hi Casey!

Adding a note here, I also plan to look into what (if any) changes are
necessary for this to work on PMI632 (which is the PMIC for
sdm632/msm8953 Fairphone 3) since that's also SMB5.

On Thu Jun 19, 2025 at 4:55 PM CEST, Casey Connolly wrote:
> Introduce support for the SMB5 charger found on pm8150b and other more
> modern Qualcomm SoCs.
>
> SMB5 is largely similar to SMB2, with a few register differences. The
> main difference is the new Type-C hardware block which some registers
> are moved to.
>
> Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
> ---
>  drivers/power/supply/qcom_smbx.c | 367 +++++++++++++++++++++++++++++++++------
>  1 file changed, 314 insertions(+), 53 deletions(-)

<snip>

> +/* Bits 2:0 match PMI8998 TYPE_C_INTRPT_ENB_SOFTWARE_CTRL */
> +#define SMB5_TYPE_C_MODE_CFG				0x544
> +#define SMB5_EN_TRY_SNK_BIT				BIT(4)
> +#define SMB5_EN_SNK_ONLY_BIT				BIT(1)
> +
> +#define SMB5_TYPEC_TYPE_C_VCONN_CONTROL			0x546
> +#define SMB5_VCONN_EN_ORIENTATION_BIT			BIT(2)
> +#define SMB5_VCONN_EN_VALUE_BIT				BIT(1)
> +#define SMB5_VCONN_EN_SRC_BIT				BIT(0)
> +
> +
> +#define SMB5_TYPE_C_DEBUG_ACCESS_SINK			0x54a
> +#define SMB5_TYPEC_DEBUG_ACCESS_SINK_MASK		GENMASK(4, 0)
> +
> +#define SMB5_DEBUG_ACCESS_SRC_CFG			0x54C
> +#define SMB5_EN_UNORIENTED_DEBUG_ACCESS_SRC_BIT	BIT(0)
> +
> +#define SMB5_TYPE_C_EXIT_STATE_CFG			0x550
> +#define SMB5_BYPASS_VSAFE0V_DURING_ROLE_SWAP_BIT	BIT(3)
> +#define SMB5_SEL_SRC_UPPER_REF_BIT			BIT(2)
> +#define SMB5_EXIT_SNK_BASED_ON_CC_BIT			BIT(0)

<snip>

>  /* Init sequence derived from vendor downstream driver */
> -static const struct smb_init_register smb_init_seq[] = {
> -	{ .addr = AICL_RERUN_TIME_CFG, .mask = AICL_RERUN_TIME_MASK, .val = 0 },
> +static const struct smb_init_register smb5_init_seq[] = {
> +	{ .addr = USBIN_CMD_IL, .mask = USBIN_SUSPEND_BIT, .val = 0 },
> +	/*
> +	 * By default configure us as an upstream facing port
> +	 * FIXME: This will be handled by the type-c driver
> +	 */
> +	{ .addr = SMB5_TYPE_C_MODE_CFG,
> +	  .mask = SMB5_EN_TRY_SNK_BIT | SMB5_EN_SNK_ONLY_BIT,
> +	  .val = SMB5_EN_TRY_SNK_BIT },

Since there's already a driver for the Type-C in pm8150b and pm7250b,
can we remove this? Or is additional plumbing between the two drivers
necessary to make this work? Maybe Bryan can also jump in here.

Regards
Luca

> +	{ .addr = SMB5_TYPEC_TYPE_C_VCONN_CONTROL,
> +	  .mask = SMB5_VCONN_EN_ORIENTATION_BIT | SMB5_VCONN_EN_SRC_BIT |
> +		  SMB5_VCONN_EN_VALUE_BIT,
> +	  .val = SMB2_VCONN_EN_SRC_BIT },
> +	{ .addr = SMB5_DEBUG_ACCESS_SRC_CFG,
> +	  .mask = SMB5_EN_UNORIENTED_DEBUG_ACCESS_SRC_BIT,
> +	  .val = SMB5_EN_UNORIENTED_DEBUG_ACCESS_SRC_BIT },
> +	{ .addr = SMB5_TYPE_C_EXIT_STATE_CFG,
> +	  .mask = SMB5_SEL_SRC_UPPER_REF_BIT,
> +	  .val = SMB5_SEL_SRC_UPPER_REF_BIT },
> +	/*
> +	 * Disable Type-C factory mode and stay in Attached.SRC state when VCONN
> +	 * over-current happens
> +	 */
> +	{ .addr = TYPE_C_CFG,
> +	  .mask = APSD_START_ON_CC_BIT,
> +	  .val = 0 },
> +	{ .addr = SMB5_TYPE_C_DEBUG_ACCESS_SINK,
> +	  .mask = SMB5_TYPEC_DEBUG_ACCESS_SINK_MASK,
> +	  .val = 0x17 },

Re: [PATCH 09/11] power: supply: qcom_smbx: add smb5 support

[Luca Weiss]

On Thu Jun 19, 2025 at 4:55 PM CEST, Casey Connolly wrote:
> Introduce support for the SMB5 charger found on pm8150b and other more
> modern Qualcomm SoCs.
>
> SMB5 is largely similar to SMB2, with a few register differences. The
> main difference is the new Type-C hardware block which some registers
> are moved to.
>
> Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
> ---

<snip>

> +static int smb_get_prop_health(struct smb_chip *chip, int *val)
> +{
> +	switch (chip->gen) {
> +	case SMB2:
> +		return smb2_get_prop_health(chip, val);
> +	case SMB5:
> +		return smb5_get_prop_health(chip, val);
> +	}
> +}

This doesn't compile for me:

drivers/power/supply/qcom_smbx.c: In function 'smb_get_prop_health':
drivers/power/supply/qcom_smbx.c:588:1: error: control reaches end of non-void function [-Werror=return-type]
  588 | }
      | ^

Regards
Luca

Re: [PATCH 09/11] power: supply: qcom_smbx: add smb5 support

[Dmitry Baryshkov]

On Thu, Jun 19, 2025 at 04:55:17PM +0200, Casey Connolly wrote:
> Introduce support for the SMB5 charger found on pm8150b and other more
> modern Qualcomm SoCs.
> 
> SMB5 is largely similar to SMB2, with a few register differences. The
> main difference is the new Type-C hardware block which some registers
> are moved to.
> 
> Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
> ---
>  drivers/power/supply/qcom_smbx.c | 367 +++++++++++++++++++++++++++++++++------
>  1 file changed, 314 insertions(+), 53 deletions(-)
> 
> diff --git a/drivers/power/supply/qcom_smbx.c b/drivers/power/supply/qcom_smbx.c
> index 10ddd33a09599decb23c0f1ccd02fa9b56602543..d902f3f43548191d3d0310ce90e699918ed0f16f 100644
> --- a/drivers/power/supply/qcom_smbx.c
> +++ b/drivers/power/supply/qcom_smbx.c
> @@ -22,18 +22,32 @@
>  #include <linux/regmap.h>
>  #include <linux/types.h>
>  #include <linux/workqueue.h>
>  
> +enum smb_generation {
> +	SMB2,
> +	SMB5,
> +};
> +
> +#define SMB_REG_OFFSET(smb) (smb->gen == SMB2 ? 0x600 : 0x100)
> +
>  /* clang-format off */
>  #define BATTERY_CHARGER_STATUS_1			0x06
>  #define BATTERY_CHARGER_STATUS_MASK			GENMASK(2, 0)
>  
>  #define BATTERY_CHARGER_STATUS_2			0x07
> -#define CHARGER_ERROR_STATUS_BAT_OV_BIT			BIT(5)
> -#define BAT_TEMP_STATUS_HOT_SOFT_LIMIT_BIT		BIT(3)
> -#define BAT_TEMP_STATUS_COLD_SOFT_LIMIT_BIT		BIT(2)
> -#define BAT_TEMP_STATUS_TOO_HOT_BIT			BIT(1)
> -#define BAT_TEMP_STATUS_TOO_COLD_BIT			BIT(0)
> +#define SMB2_CHARGER_ERROR_STATUS_BAT_OV_BIT		BIT(5)
> +#define SMB2_BAT_TEMP_STATUS_HOT_SOFT_LIMIT_BIT	BIT(3)
> +#define SMB2_BAT_TEMP_STATUS_COLD_SOFT_LIMIT_BIT	BIT(2)
> +#define SMB2_BAT_TEMP_STATUS_TOO_HOT_BIT		BIT(1)
> +#define SMB5_CHARGER_ERROR_STATUS_BAT_OV_BIT		BIT(1)
> +#define SMB2_BAT_TEMP_STATUS_TOO_COLD_BIT		BIT(0)
> +
> +#define BATTERY_CHARGER_STATUS_7			0x0D
> +#define SMB5_BAT_TEMP_STATUS_HOT_SOFT_BIT		BIT(5)
> +#define SMB5_BAT_TEMP_STATUS_COLD_SOFT_BIT		BIT(4)
> +#define SMB5_BAT_TEMP_STATUS_TOO_HOT_BIT		BIT(3)
> +#define SMB5_BAT_TEMP_STATUS_TOO_COLD_BIT		BIT(2)
>  
>  #define CHARGING_ENABLE_CMD				0x42
>  #define CHARGING_ENABLE_CMD_BIT				BIT(0)
>  
> @@ -55,11 +69,14 @@
>  
>  #define FLOAT_VOLTAGE_CFG				0x70
>  #define FLOAT_VOLTAGE_SETTING_MASK			GENMASK(7, 0)
>  
> -#define FG_UPDATE_CFG_2_SEL				0x7D
> -#define SOC_LT_CHG_RECHARGE_THRESH_SEL_BIT		BIT(2)
> -#define VBT_LT_CHG_RECHARGE_THRESH_SEL_BIT		BIT(1)
> +#define SMB2_FG_UPDATE_CFG_2_SEL			0x7D
> +#define SMB2_SOC_LT_CHG_RECHARGE_THRESH_SEL_BIT		BIT(2)
> +#define SMB2_VBT_LT_CHG_RECHARGE_THRESH_SEL_BIT		BIT(1)
> +
> +#define SMB5_CHARGE_RCHG_SOC_THRESHOLD_CFG_REG		0x7D
> +#define SMB5_CHARGE_RCHG_SOC_THRESHOLD_CFG_MASK		GENMASK(7, 0)
>  
>  #define OTG_CFG						0x153
>  #define OTG_EN_SRC_CFG_BIT				BIT(1)
>  
> @@ -73,36 +90,46 @@
>  #define CDP_CHARGER_BIT					BIT(2)
>  #define OCP_CHARGER_BIT					BIT(1)
>  #define SDP_CHARGER_BIT					BIT(0)
>  
> +#define USBIN_CMD_IL					0x340
> +#define USBIN_SUSPEND_BIT				BIT(0)
> +
>  #define CMD_APSD					0x341
>  #define APSD_RERUN_BIT					BIT(0)
>  
> +#define CMD_ICL_OVERRIDE				0x342
> +#define ICL_OVERRIDE_BIT				BIT(0)
> +
>  #define TYPE_C_CFG					0x358
> +#define APSD_START_ON_CC_BIT				BIT(7)
>  #define FACTORY_MODE_DETECTION_EN_BIT			BIT(5)
>  #define VCONN_OC_CFG_BIT				BIT(1)
>  
>  #define USBIN_OPTIONS_1_CFG				0x362
> +#define AUTO_SRC_DETECT_BIT				BIT(3)
>  #define HVDCP_EN_BIT					BIT(2)
>  
> +#define USBIN_LOAD_CFG					0x65
> +#define ICL_OVERRIDE_AFTER_APSD_BIT			BIT(4)
> +
>  #define USBIN_ICL_OPTIONS				0x366
>  #define USB51_MODE_BIT					BIT(1)
>  #define USBIN_MODE_CHG_BIT				BIT(0)
>  
>  /* PMI8998 only */
>  #define TYPE_C_INTRPT_ENB_SOFTWARE_CTRL			0x368
> -#define VCONN_EN_SRC_BIT				BIT(4)
> +#define SMB2_VCONN_EN_SRC_BIT				BIT(4)
>  #define VCONN_EN_VALUE_BIT				BIT(3)
>  #define TYPEC_POWER_ROLE_CMD_MASK			GENMASK(2, 0)
> -#define UFP_EN_CMD_BIT					BIT(2)
> -#define DFP_EN_CMD_BIT					BIT(1)
> -#define TYPEC_DISABLE_CMD_BIT				BIT(0)
> +#define SMB5_EN_SNK_ONLY_BIT				BIT(1)
>  
>  #define USBIN_CURRENT_LIMIT_CFG				0x370
>  
>  #define USBIN_AICL_OPTIONS_CFG				0x380
>  #define SUSPEND_ON_COLLAPSE_USBIN_BIT			BIT(7)
>  #define USBIN_AICL_START_AT_MAX_BIT			BIT(5)
> +#define USBIN_AICL_PERIODIC_RERUN_EN_BIT		BIT(4)
>  #define USBIN_AICL_ADC_EN_BIT				BIT(3)
>  #define USBIN_AICL_EN_BIT				BIT(2)
>  #define USBIN_HV_COLLAPSE_RESPONSE_BIT			BIT(1)
>  #define USBIN_LV_COLLAPSE_RESPONSE_BIT			BIT(0)
> @@ -113,15 +140,41 @@
>  
>  #define USBIN_CONT_AICL_THRESHOLD_CFG			0x384
>  #define USBIN_CONT_AICL_THRESHOLD_CFG_MASK		GENMASK(5, 0)
>  
> -#define ICL_STATUS					0x607
> +#define ICL_STATUS(smb)					(SMB_REG_OFFSET(smb) + 0x07)
>  #define INPUT_CURRENT_LIMIT_MASK			GENMASK(7, 0)
>  
> -#define POWER_PATH_STATUS				0x60B
> +#define POWER_PATH_STATUS(smb)				(SMB_REG_OFFSET(smb) + 0x0B)
>  #define P_PATH_USE_USBIN_BIT				BIT(4)
>  #define P_PATH_VALID_INPUT_POWER_SOURCE_STS_BIT		BIT(0)
>  
> +/* 0x5xx region is PM8150b only Type-C registers */
> +
> +/* Bits 2:0 match PMI8998 TYPE_C_INTRPT_ENB_SOFTWARE_CTRL */
> +#define SMB5_TYPE_C_MODE_CFG				0x544
> +#define SMB5_EN_TRY_SNK_BIT				BIT(4)
> +#define SMB5_EN_SNK_ONLY_BIT				BIT(1)
> +
> +#define SMB5_TYPEC_TYPE_C_VCONN_CONTROL			0x546
> +#define SMB5_VCONN_EN_ORIENTATION_BIT			BIT(2)
> +#define SMB5_VCONN_EN_VALUE_BIT				BIT(1)
> +#define SMB5_VCONN_EN_SRC_BIT				BIT(0)
> +
> +
> +#define SMB5_TYPE_C_DEBUG_ACCESS_SINK			0x54a
> +#define SMB5_TYPEC_DEBUG_ACCESS_SINK_MASK		GENMASK(4, 0)
> +
> +#define SMB5_DEBUG_ACCESS_SRC_CFG			0x54C
> +#define SMB5_EN_UNORIENTED_DEBUG_ACCESS_SRC_BIT	BIT(0)
> +
> +#define SMB5_TYPE_C_EXIT_STATE_CFG			0x550
> +#define SMB5_BYPASS_VSAFE0V_DURING_ROLE_SWAP_BIT	BIT(3)
> +#define SMB5_SEL_SRC_UPPER_REF_BIT			BIT(2)
> +#define SMB5_EXIT_SNK_BASED_ON_CC_BIT			BIT(0)
> +
> +/* Common */
> +
>  #define BARK_BITE_WDOG_PET				0x643
>  #define BARK_BITE_WDOG_PET_BIT				BIT(0)
>  
>  #define WD_CFG						0x651
> @@ -184,8 +237,9 @@ struct smb_chip {
>  	const char *name;
>  	unsigned int base;
>  	struct regmap *regmap;
>  	struct power_supply_battery_info *batt_info;
> +	enum smb_generation gen;
>  
>  	struct delayed_work status_change_work;
>  	int cable_irq;
>  	bool wakeup_enabled;
> @@ -195,8 +249,15 @@ struct smb_chip {
>  
>  	struct power_supply *chg_psy;
>  };
>  
> +struct smb_match_data {
> +	const char *name;
> +	enum smb_generation gen;
> +	size_t init_seq_len;
> +	const struct smb_init_register __counted_by(init_seq_len) *init_seq;
> +};
> +
>  static enum power_supply_property smb_properties[] = {
>  	POWER_SUPPLY_PROP_MANUFACTURER,
>  	POWER_SUPPLY_PROP_MODEL_NAME,
>  	POWER_SUPPLY_PROP_CURRENT_MAX,
> @@ -212,9 +273,9 @@ static int smb_get_prop_usb_online(struct smb_chip *chip, int *val)
>  {
>  	unsigned int stat;
>  	int rc;
>  
> -	rc = regmap_read(chip->regmap, chip->base + POWER_PATH_STATUS, &stat);
> +	rc = regmap_read(chip->regmap, chip->base + POWER_PATH_STATUS(chip), &stat);
>  	if (rc < 0) {
>  		dev_err(chip->dev, "Couldn't read power path status: %d\n", rc);
>  		return rc;
>  	}
> @@ -267,11 +328,37 @@ static int smb_apsd_get_charger_type(struct smb_chip *chip, int *val)
>  
>  	return 0;
>  }
>  
> +/* Return 1 when in overvoltage state, else 0 or -errno */
> +static int smbx_ov_status(struct smb_chip *chip)
> +{
> +	u16 reg;
> +	u8 mask;
> +	int rc;
> +	u32 val;
> +
> +	switch (chip->gen) {
> +	case SMB2:
> +		reg = BATTERY_CHARGER_STATUS_2;
> +		mask = SMB2_CHARGER_ERROR_STATUS_BAT_OV_BIT;
> +		break;
> +	case SMB5:
> +		reg = BATTERY_CHARGER_STATUS_7;
> +		mask = SMB5_CHARGER_ERROR_STATUS_BAT_OV_BIT;
> +		break;
> +	}
> +
> +	rc = regmap_read(chip->regmap, chip->base + reg, &val);
> +	if (rc)
> +		return rc;
> +
> +	return !!(reg & mask);
> +}
> +
>  static int smb_get_prop_status(struct smb_chip *chip, int *val)
>  {
> -	unsigned char stat[2];
> +	u32 stat;
>  	int usb_online = 0;
>  	int rc;
>  
>  	rc = smb_get_prop_usb_online(chip, &usb_online);
> @@ -279,24 +366,29 @@ static int smb_get_prop_status(struct smb_chip *chip, int *val)
>  		*val = POWER_SUPPLY_STATUS_DISCHARGING;
>  		return rc;
>  	}
>  
> -	rc = regmap_bulk_read(chip->regmap,
> -			      chip->base + BATTERY_CHARGER_STATUS_1, &stat, 2);
> +	rc = regmap_read(chip->regmap,
> +			      chip->base + BATTERY_CHARGER_STATUS_1, &stat);
>  	if (rc < 0) {
>  		dev_err(chip->dev, "Failed to read charging status ret=%d\n",
>  			rc);
>  		return rc;
>  	}
>  
> -	if (stat[1] & CHARGER_ERROR_STATUS_BAT_OV_BIT) {
> +	rc = smbx_ov_status(chip);
> +	if (rc < 0)
> +		return rc;
> +
> +	/* In overvoltage state */
> +	if (rc == 1) {
>  		*val = POWER_SUPPLY_STATUS_NOT_CHARGING;
>  		return 0;
>  	}
>  
> -	stat[0] = stat[0] & BATTERY_CHARGER_STATUS_MASK;
> +	stat = stat & BATTERY_CHARGER_STATUS_MASK;
>  
> -	switch (stat[0]) {
> +	switch (stat) {
>  	case TRICKLE_CHARGE:
>  	case PRE_CHARGE:
>  	case FAST_CHARGE:
>  	case FULLON_CHARGE:
> @@ -318,9 +410,9 @@ static int smb_get_prop_status(struct smb_chip *chip, int *val)
>  
>  static inline int smb_get_current_limit(struct smb_chip *chip,
>  					 unsigned int *val)
>  {
> -	int rc = regmap_read(chip->regmap, chip->base + ICL_STATUS, val);
> +	int rc = regmap_read(chip->regmap, chip->base + ICL_STATUS(chip), val);
>  
>  	if (rc >= 0)
>  		*val *= CURRENT_SCALE_FACTOR;
>  	return rc;
> @@ -413,9 +505,46 @@ static int smb_get_iio_chan(struct smb_chip *chip, struct iio_channel *chan,
>  
>  	return iio_read_channel_processed(chan, val);
>  }
>  
> -static int smb_get_prop_health(struct smb_chip *chip, int *val)
> +static int smb5_get_prop_health(struct smb_chip *chip, int *val)
> +{
> +	int rc;
> +	unsigned int stat;
> +
> +	rc = smbx_ov_status(chip);
> +
> +	/* Treat any error as if we are in the overvoltage state */
> +	if (rc < 0)
> +		dev_err(chip->dev, "Couldn't determine overvoltage status!");
> +	if (rc) {
> +		dev_err(chip->dev, "battery over-voltage");
> +		*val = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
> +		return 0;
> +	}
> +
> +	rc = regmap_read(chip->regmap, chip->base + BATTERY_CHARGER_STATUS_7,
> +			 &stat);
> +	if (rc < 0) {
> +		dev_err(chip->dev, "Couldn't read charger status 7 rc=%d\n", rc);
> +		return rc;
> +	}
> +
> +	if (stat & SMB5_BAT_TEMP_STATUS_TOO_COLD_BIT)
> +		*val = POWER_SUPPLY_HEALTH_COLD;
> +	else if (stat & SMB5_BAT_TEMP_STATUS_TOO_HOT_BIT)
> +		*val = POWER_SUPPLY_HEALTH_OVERHEAT;
> +	else if (stat & SMB5_BAT_TEMP_STATUS_COLD_SOFT_BIT)
> +		*val = POWER_SUPPLY_HEALTH_COOL;
> +	else if (stat & SMB5_BAT_TEMP_STATUS_HOT_SOFT_BIT)
> +		*val = POWER_SUPPLY_HEALTH_WARM;
> +	else
> +		*val = POWER_SUPPLY_HEALTH_GOOD;
> +
> +	return 0;
> +}
> +
> +static int smb2_get_prop_health(struct smb_chip *chip, int *val)
>  {
>  	int rc;
>  	unsigned int stat;
>  
> @@ -426,34 +555,45 @@ static int smb_get_prop_health(struct smb_chip *chip, int *val)
>  		return rc;
>  	}
>  
>  	switch (stat) {
> -	case CHARGER_ERROR_STATUS_BAT_OV_BIT:
> +	case SMB2_CHARGER_ERROR_STATUS_BAT_OV_BIT:
>  		*val = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
>  		return 0;
> -	case BAT_TEMP_STATUS_TOO_COLD_BIT:
> +	case SMB2_BAT_TEMP_STATUS_TOO_COLD_BIT:
>  		*val = POWER_SUPPLY_HEALTH_COLD;
>  		return 0;
> -	case BAT_TEMP_STATUS_TOO_HOT_BIT:
> +	case SMB2_BAT_TEMP_STATUS_TOO_HOT_BIT:
>  		*val = POWER_SUPPLY_HEALTH_OVERHEAT;
>  		return 0;
> -	case BAT_TEMP_STATUS_COLD_SOFT_LIMIT_BIT:
> +	case SMB2_BAT_TEMP_STATUS_COLD_SOFT_LIMIT_BIT:
>  		*val = POWER_SUPPLY_HEALTH_COOL;
>  		return 0;
> -	case BAT_TEMP_STATUS_HOT_SOFT_LIMIT_BIT:
> +	case SMB2_BAT_TEMP_STATUS_HOT_SOFT_LIMIT_BIT:
>  		*val = POWER_SUPPLY_HEALTH_WARM;
>  		return 0;
>  	default:
>  		*val = POWER_SUPPLY_HEALTH_GOOD;
>  		return 0;
>  	}
>  }
>  
> +static int smb_get_prop_health(struct smb_chip *chip, int *val)
> +{
> +	switch (chip->gen) {
> +	case SMB2:
> +		return smb2_get_prop_health(chip, val);
> +	case SMB5:
> +		return smb5_get_prop_health(chip, val);
> +	}
> +}
> +
>  static int smb_get_property(struct power_supply *psy,
>  			     enum power_supply_property psp,
>  			     union power_supply_propval *val)
>  {
>  	struct smb_chip *chip = power_supply_get_drvdata(psy);
> +	int ret;
>  
>  	switch (psp) {
>  	case POWER_SUPPLY_PROP_MANUFACTURER:
>  		val->strval = "Qualcomm";
> @@ -466,10 +606,15 @@ static int smb_get_property(struct power_supply *psy,
>  	case POWER_SUPPLY_PROP_CURRENT_NOW:
>  		return smb_get_iio_chan(chip, chip->usb_in_i_chan,
>  					 &val->intval);
>  	case POWER_SUPPLY_PROP_VOLTAGE_NOW:
> -		return smb_get_iio_chan(chip, chip->usb_in_v_chan,
> +		ret = smb_get_iio_chan(chip, chip->usb_in_v_chan,
>  					 &val->intval);
> +		if (!ret) {
> +			if (chip->gen == SMB5)
> +				val->intval *= 16;
> +		}
> +		return ret;
>  	case POWER_SUPPLY_PROP_ONLINE:
>  		return smb_get_prop_usb_online(chip, &val->intval);
>  	case POWER_SUPPLY_PROP_STATUS:
>  		return smb_get_prop_status(chip, &val->intval);
> @@ -515,14 +660,10 @@ static int smb_property_is_writable(struct power_supply *psy,
>  
>  static irqreturn_t smb_handle_batt_overvoltage(int irq, void *data)
>  {
>  	struct smb_chip *chip = data;
> -	unsigned int status;
>  
> -	regmap_read(chip->regmap, chip->base + BATTERY_CHARGER_STATUS_2,
> -		    &status);
> -
> -	if (status & CHARGER_ERROR_STATUS_BAT_OV_BIT) {
> +	if (smbx_ov_status(chip) == 1) {
>  		/* The hardware stops charging automatically */
>  		dev_err(chip->dev, "battery overvoltage detected\n");
>  		power_supply_changed(chip->chg_psy);
>  	}
> @@ -566,9 +707,9 @@ static irqreturn_t smb_handle_wdog_bark(int irq, void *data)
>  	return IRQ_HANDLED;
>  }
>  
>  static const struct power_supply_desc smb_psy_desc = {
> -	.name = "pmi8998_charger",
> +	.name = "SMB2_charger",
>  	.type = POWER_SUPPLY_TYPE_USB,
>  	.usb_types = BIT(POWER_SUPPLY_USB_TYPE_SDP) |
>  		     BIT(POWER_SUPPLY_USB_TYPE_CDP) |
>  		     BIT(POWER_SUPPLY_USB_TYPE_DCP) |
> @@ -580,18 +721,100 @@ static const struct power_supply_desc smb_psy_desc = {
>  	.property_is_writeable = smb_property_is_writable,
>  };
>  
>  /* Init sequence derived from vendor downstream driver */
> -static const struct smb_init_register smb_init_seq[] = {
> -	{ .addr = AICL_RERUN_TIME_CFG, .mask = AICL_RERUN_TIME_MASK, .val = 0 },
> +static const struct smb_init_register smb5_init_seq[] = {
> +	{ .addr = USBIN_CMD_IL, .mask = USBIN_SUSPEND_BIT, .val = 0 },
> +	/*
> +	 * By default configure us as an upstream facing port
> +	 * FIXME: This will be handled by the type-c driver
> +	 */

All of this needs to be reworked to cooperate with the type-c driver.
Otherwise it might try to reconfigure the Type-C mode _after_ the TCPM
has negotiated some configuration. So, it can't go in in this way.

> +	{ .addr = SMB5_TYPE_C_MODE_CFG,
> +	  .mask = SMB5_EN_TRY_SNK_BIT | SMB5_EN_SNK_ONLY_BIT,
> +	  .val = SMB5_EN_TRY_SNK_BIT },
> 

-- 
With best wishes
Dmitry

Re: [PATCH 09/11] power: supply: qcom_smbx: add smb5 support

[Caleb Connolly]

On 24/06/2025 03:06, Dmitry Baryshkov wrote:
> On Thu, Jun 19, 2025 at 04:55:17PM +0200, Casey Connolly wrote:
>> Introduce support for the SMB5 charger found on pm8150b and other more
>> modern Qualcomm SoCs.
>>
>> SMB5 is largely similar to SMB2, with a few register differences. The
>> main difference is the new Type-C hardware block which some registers
>> are moved to.
>>
>> Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
>> ---
>>  drivers/power/supply/qcom_smbx.c | 367 +++++++++++++++++++++++++++++++++------
>>  1 file changed, 314 insertions(+), 53 deletions(-)
>>
>> diff --git a/drivers/power/supply/qcom_smbx.c b/drivers/power/supply/qcom_smbx.c
>> index 10ddd33a09599decb23c0f1ccd02fa9b56602543..d902f3f43548191d3d0310ce90e699918ed0f16f 100644
>> --- a/drivers/power/supply/qcom_smbx.c
>> +++ b/drivers/power/supply/qcom_smbx.c
>> @@ -22,18 +22,32 @@
>>  #include <linux/regmap.h>
>>  #include <linux/types.h>
>>  #include <linux/workqueue.h>
>>  
>> +enum smb_generation {
>> +	SMB2,
>> +	SMB5,
>> +};
>> +
>> +#define SMB_REG_OFFSET(smb) (smb->gen == SMB2 ? 0x600 : 0x100)
>> +
>>  /* clang-format off */
>>  #define BATTERY_CHARGER_STATUS_1			0x06
>>  #define BATTERY_CHARGER_STATUS_MASK			GENMASK(2, 0)
>>  
>>  #define BATTERY_CHARGER_STATUS_2			0x07
>> -#define CHARGER_ERROR_STATUS_BAT_OV_BIT			BIT(5)
>> -#define BAT_TEMP_STATUS_HOT_SOFT_LIMIT_BIT		BIT(3)
>> -#define BAT_TEMP_STATUS_COLD_SOFT_LIMIT_BIT		BIT(2)
>> -#define BAT_TEMP_STATUS_TOO_HOT_BIT			BIT(1)
>> -#define BAT_TEMP_STATUS_TOO_COLD_BIT			BIT(0)
>> +#define SMB2_CHARGER_ERROR_STATUS_BAT_OV_BIT		BIT(5)
>> +#define SMB2_BAT_TEMP_STATUS_HOT_SOFT_LIMIT_BIT	BIT(3)
>> +#define SMB2_BAT_TEMP_STATUS_COLD_SOFT_LIMIT_BIT	BIT(2)
>> +#define SMB2_BAT_TEMP_STATUS_TOO_HOT_BIT		BIT(1)
>> +#define SMB5_CHARGER_ERROR_STATUS_BAT_OV_BIT		BIT(1)
>> +#define SMB2_BAT_TEMP_STATUS_TOO_COLD_BIT		BIT(0)
>> +
>> +#define BATTERY_CHARGER_STATUS_7			0x0D
>> +#define SMB5_BAT_TEMP_STATUS_HOT_SOFT_BIT		BIT(5)
>> +#define SMB5_BAT_TEMP_STATUS_COLD_SOFT_BIT		BIT(4)
>> +#define SMB5_BAT_TEMP_STATUS_TOO_HOT_BIT		BIT(3)
>> +#define SMB5_BAT_TEMP_STATUS_TOO_COLD_BIT		BIT(2)
>>  
>>  #define CHARGING_ENABLE_CMD				0x42
>>  #define CHARGING_ENABLE_CMD_BIT				BIT(0)
>>  
>> @@ -55,11 +69,14 @@
>>  
>>  #define FLOAT_VOLTAGE_CFG				0x70
>>  #define FLOAT_VOLTAGE_SETTING_MASK			GENMASK(7, 0)
>>  
>> -#define FG_UPDATE_CFG_2_SEL				0x7D
>> -#define SOC_LT_CHG_RECHARGE_THRESH_SEL_BIT		BIT(2)
>> -#define VBT_LT_CHG_RECHARGE_THRESH_SEL_BIT		BIT(1)
>> +#define SMB2_FG_UPDATE_CFG_2_SEL			0x7D
>> +#define SMB2_SOC_LT_CHG_RECHARGE_THRESH_SEL_BIT		BIT(2)
>> +#define SMB2_VBT_LT_CHG_RECHARGE_THRESH_SEL_BIT		BIT(1)
>> +
>> +#define SMB5_CHARGE_RCHG_SOC_THRESHOLD_CFG_REG		0x7D
>> +#define SMB5_CHARGE_RCHG_SOC_THRESHOLD_CFG_MASK		GENMASK(7, 0)
>>  
>>  #define OTG_CFG						0x153
>>  #define OTG_EN_SRC_CFG_BIT				BIT(1)
>>  
>> @@ -73,36 +90,46 @@
>>  #define CDP_CHARGER_BIT					BIT(2)
>>  #define OCP_CHARGER_BIT					BIT(1)
>>  #define SDP_CHARGER_BIT					BIT(0)
>>  
>> +#define USBIN_CMD_IL					0x340
>> +#define USBIN_SUSPEND_BIT				BIT(0)
>> +
>>  #define CMD_APSD					0x341
>>  #define APSD_RERUN_BIT					BIT(0)
>>  
>> +#define CMD_ICL_OVERRIDE				0x342
>> +#define ICL_OVERRIDE_BIT				BIT(0)
>> +
>>  #define TYPE_C_CFG					0x358
>> +#define APSD_START_ON_CC_BIT				BIT(7)
>>  #define FACTORY_MODE_DETECTION_EN_BIT			BIT(5)
>>  #define VCONN_OC_CFG_BIT				BIT(1)
>>  
>>  #define USBIN_OPTIONS_1_CFG				0x362
>> +#define AUTO_SRC_DETECT_BIT				BIT(3)
>>  #define HVDCP_EN_BIT					BIT(2)
>>  
>> +#define USBIN_LOAD_CFG					0x65
>> +#define ICL_OVERRIDE_AFTER_APSD_BIT			BIT(4)
>> +
>>  #define USBIN_ICL_OPTIONS				0x366
>>  #define USB51_MODE_BIT					BIT(1)
>>  #define USBIN_MODE_CHG_BIT				BIT(0)
>>  
>>  /* PMI8998 only */
>>  #define TYPE_C_INTRPT_ENB_SOFTWARE_CTRL			0x368
>> -#define VCONN_EN_SRC_BIT				BIT(4)
>> +#define SMB2_VCONN_EN_SRC_BIT				BIT(4)
>>  #define VCONN_EN_VALUE_BIT				BIT(3)
>>  #define TYPEC_POWER_ROLE_CMD_MASK			GENMASK(2, 0)
>> -#define UFP_EN_CMD_BIT					BIT(2)
>> -#define DFP_EN_CMD_BIT					BIT(1)
>> -#define TYPEC_DISABLE_CMD_BIT				BIT(0)
>> +#define SMB5_EN_SNK_ONLY_BIT				BIT(1)
>>  
>>  #define USBIN_CURRENT_LIMIT_CFG				0x370
>>  
>>  #define USBIN_AICL_OPTIONS_CFG				0x380
>>  #define SUSPEND_ON_COLLAPSE_USBIN_BIT			BIT(7)
>>  #define USBIN_AICL_START_AT_MAX_BIT			BIT(5)
>> +#define USBIN_AICL_PERIODIC_RERUN_EN_BIT		BIT(4)
>>  #define USBIN_AICL_ADC_EN_BIT				BIT(3)
>>  #define USBIN_AICL_EN_BIT				BIT(2)
>>  #define USBIN_HV_COLLAPSE_RESPONSE_BIT			BIT(1)
>>  #define USBIN_LV_COLLAPSE_RESPONSE_BIT			BIT(0)
>> @@ -113,15 +140,41 @@
>>  
>>  #define USBIN_CONT_AICL_THRESHOLD_CFG			0x384
>>  #define USBIN_CONT_AICL_THRESHOLD_CFG_MASK		GENMASK(5, 0)
>>  
>> -#define ICL_STATUS					0x607
>> +#define ICL_STATUS(smb)					(SMB_REG_OFFSET(smb) + 0x07)
>>  #define INPUT_CURRENT_LIMIT_MASK			GENMASK(7, 0)
>>  
>> -#define POWER_PATH_STATUS				0x60B
>> +#define POWER_PATH_STATUS(smb)				(SMB_REG_OFFSET(smb) + 0x0B)
>>  #define P_PATH_USE_USBIN_BIT				BIT(4)
>>  #define P_PATH_VALID_INPUT_POWER_SOURCE_STS_BIT		BIT(0)
>>  
>> +/* 0x5xx region is PM8150b only Type-C registers */
>> +
>> +/* Bits 2:0 match PMI8998 TYPE_C_INTRPT_ENB_SOFTWARE_CTRL */
>> +#define SMB5_TYPE_C_MODE_CFG				0x544
>> +#define SMB5_EN_TRY_SNK_BIT				BIT(4)
>> +#define SMB5_EN_SNK_ONLY_BIT				BIT(1)
>> +
>> +#define SMB5_TYPEC_TYPE_C_VCONN_CONTROL			0x546
>> +#define SMB5_VCONN_EN_ORIENTATION_BIT			BIT(2)
>> +#define SMB5_VCONN_EN_VALUE_BIT				BIT(1)
>> +#define SMB5_VCONN_EN_SRC_BIT				BIT(0)
>> +
>> +
>> +#define SMB5_TYPE_C_DEBUG_ACCESS_SINK			0x54a
>> +#define SMB5_TYPEC_DEBUG_ACCESS_SINK_MASK		GENMASK(4, 0)
>> +
>> +#define SMB5_DEBUG_ACCESS_SRC_CFG			0x54C
>> +#define SMB5_EN_UNORIENTED_DEBUG_ACCESS_SRC_BIT	BIT(0)
>> +
>> +#define SMB5_TYPE_C_EXIT_STATE_CFG			0x550
>> +#define SMB5_BYPASS_VSAFE0V_DURING_ROLE_SWAP_BIT	BIT(3)
>> +#define SMB5_SEL_SRC_UPPER_REF_BIT			BIT(2)
>> +#define SMB5_EXIT_SNK_BASED_ON_CC_BIT			BIT(0)
>> +
>> +/* Common */
>> +
>>  #define BARK_BITE_WDOG_PET				0x643
>>  #define BARK_BITE_WDOG_PET_BIT				BIT(0)
>>  
>>  #define WD_CFG						0x651
>> @@ -184,8 +237,9 @@ struct smb_chip {
>>  	const char *name;
>>  	unsigned int base;
>>  	struct regmap *regmap;
>>  	struct power_supply_battery_info *batt_info;
>> +	enum smb_generation gen;
>>  
>>  	struct delayed_work status_change_work;
>>  	int cable_irq;
>>  	bool wakeup_enabled;
>> @@ -195,8 +249,15 @@ struct smb_chip {
>>  
>>  	struct power_supply *chg_psy;
>>  };
>>  
>> +struct smb_match_data {
>> +	const char *name;
>> +	enum smb_generation gen;
>> +	size_t init_seq_len;
>> +	const struct smb_init_register __counted_by(init_seq_len) *init_seq;
>> +};
>> +
>>  static enum power_supply_property smb_properties[] = {
>>  	POWER_SUPPLY_PROP_MANUFACTURER,
>>  	POWER_SUPPLY_PROP_MODEL_NAME,
>>  	POWER_SUPPLY_PROP_CURRENT_MAX,
>> @@ -212,9 +273,9 @@ static int smb_get_prop_usb_online(struct smb_chip *chip, int *val)
>>  {
>>  	unsigned int stat;
>>  	int rc;
>>  
>> -	rc = regmap_read(chip->regmap, chip->base + POWER_PATH_STATUS, &stat);
>> +	rc = regmap_read(chip->regmap, chip->base + POWER_PATH_STATUS(chip), &stat);
>>  	if (rc < 0) {
>>  		dev_err(chip->dev, "Couldn't read power path status: %d\n", rc);
>>  		return rc;
>>  	}
>> @@ -267,11 +328,37 @@ static int smb_apsd_get_charger_type(struct smb_chip *chip, int *val)
>>  
>>  	return 0;
>>  }
>>  
>> +/* Return 1 when in overvoltage state, else 0 or -errno */
>> +static int smbx_ov_status(struct smb_chip *chip)
>> +{
>> +	u16 reg;
>> +	u8 mask;
>> +	int rc;
>> +	u32 val;
>> +
>> +	switch (chip->gen) {
>> +	case SMB2:
>> +		reg = BATTERY_CHARGER_STATUS_2;
>> +		mask = SMB2_CHARGER_ERROR_STATUS_BAT_OV_BIT;
>> +		break;
>> +	case SMB5:
>> +		reg = BATTERY_CHARGER_STATUS_7;
>> +		mask = SMB5_CHARGER_ERROR_STATUS_BAT_OV_BIT;
>> +		break;
>> +	}
>> +
>> +	rc = regmap_read(chip->regmap, chip->base + reg, &val);
>> +	if (rc)
>> +		return rc;
>> +
>> +	return !!(reg & mask);
>> +}
>> +
>>  static int smb_get_prop_status(struct smb_chip *chip, int *val)
>>  {
>> -	unsigned char stat[2];
>> +	u32 stat;
>>  	int usb_online = 0;
>>  	int rc;
>>  
>>  	rc = smb_get_prop_usb_online(chip, &usb_online);
>> @@ -279,24 +366,29 @@ static int smb_get_prop_status(struct smb_chip *chip, int *val)
>>  		*val = POWER_SUPPLY_STATUS_DISCHARGING;
>>  		return rc;
>>  	}
>>  
>> -	rc = regmap_bulk_read(chip->regmap,
>> -			      chip->base + BATTERY_CHARGER_STATUS_1, &stat, 2);
>> +	rc = regmap_read(chip->regmap,
>> +			      chip->base + BATTERY_CHARGER_STATUS_1, &stat);
>>  	if (rc < 0) {
>>  		dev_err(chip->dev, "Failed to read charging status ret=%d\n",
>>  			rc);
>>  		return rc;
>>  	}
>>  
>> -	if (stat[1] & CHARGER_ERROR_STATUS_BAT_OV_BIT) {
>> +	rc = smbx_ov_status(chip);
>> +	if (rc < 0)
>> +		return rc;
>> +
>> +	/* In overvoltage state */
>> +	if (rc == 1) {
>>  		*val = POWER_SUPPLY_STATUS_NOT_CHARGING;
>>  		return 0;
>>  	}
>>  
>> -	stat[0] = stat[0] & BATTERY_CHARGER_STATUS_MASK;
>> +	stat = stat & BATTERY_CHARGER_STATUS_MASK;
>>  
>> -	switch (stat[0]) {
>> +	switch (stat) {
>>  	case TRICKLE_CHARGE:
>>  	case PRE_CHARGE:
>>  	case FAST_CHARGE:
>>  	case FULLON_CHARGE:
>> @@ -318,9 +410,9 @@ static int smb_get_prop_status(struct smb_chip *chip, int *val)
>>  
>>  static inline int smb_get_current_limit(struct smb_chip *chip,
>>  					 unsigned int *val)
>>  {
>> -	int rc = regmap_read(chip->regmap, chip->base + ICL_STATUS, val);
>> +	int rc = regmap_read(chip->regmap, chip->base + ICL_STATUS(chip), val);
>>  
>>  	if (rc >= 0)
>>  		*val *= CURRENT_SCALE_FACTOR;
>>  	return rc;
>> @@ -413,9 +505,46 @@ static int smb_get_iio_chan(struct smb_chip *chip, struct iio_channel *chan,
>>  
>>  	return iio_read_channel_processed(chan, val);
>>  }
>>  
>> -static int smb_get_prop_health(struct smb_chip *chip, int *val)
>> +static int smb5_get_prop_health(struct smb_chip *chip, int *val)
>> +{
>> +	int rc;
>> +	unsigned int stat;
>> +
>> +	rc = smbx_ov_status(chip);
>> +
>> +	/* Treat any error as if we are in the overvoltage state */
>> +	if (rc < 0)
>> +		dev_err(chip->dev, "Couldn't determine overvoltage status!");
>> +	if (rc) {
>> +		dev_err(chip->dev, "battery over-voltage");
>> +		*val = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
>> +		return 0;
>> +	}
>> +
>> +	rc = regmap_read(chip->regmap, chip->base + BATTERY_CHARGER_STATUS_7,
>> +			 &stat);
>> +	if (rc < 0) {
>> +		dev_err(chip->dev, "Couldn't read charger status 7 rc=%d\n", rc);
>> +		return rc;
>> +	}
>> +
>> +	if (stat & SMB5_BAT_TEMP_STATUS_TOO_COLD_BIT)
>> +		*val = POWER_SUPPLY_HEALTH_COLD;
>> +	else if (stat & SMB5_BAT_TEMP_STATUS_TOO_HOT_BIT)
>> +		*val = POWER_SUPPLY_HEALTH_OVERHEAT;
>> +	else if (stat & SMB5_BAT_TEMP_STATUS_COLD_SOFT_BIT)
>> +		*val = POWER_SUPPLY_HEALTH_COOL;
>> +	else if (stat & SMB5_BAT_TEMP_STATUS_HOT_SOFT_BIT)
>> +		*val = POWER_SUPPLY_HEALTH_WARM;
>> +	else
>> +		*val = POWER_SUPPLY_HEALTH_GOOD;
>> +
>> +	return 0;
>> +}
>> +
>> +static int smb2_get_prop_health(struct smb_chip *chip, int *val)
>>  {
>>  	int rc;
>>  	unsigned int stat;
>>  
>> @@ -426,34 +555,45 @@ static int smb_get_prop_health(struct smb_chip *chip, int *val)
>>  		return rc;
>>  	}
>>  
>>  	switch (stat) {
>> -	case CHARGER_ERROR_STATUS_BAT_OV_BIT:
>> +	case SMB2_CHARGER_ERROR_STATUS_BAT_OV_BIT:
>>  		*val = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
>>  		return 0;
>> -	case BAT_TEMP_STATUS_TOO_COLD_BIT:
>> +	case SMB2_BAT_TEMP_STATUS_TOO_COLD_BIT:
>>  		*val = POWER_SUPPLY_HEALTH_COLD;
>>  		return 0;
>> -	case BAT_TEMP_STATUS_TOO_HOT_BIT:
>> +	case SMB2_BAT_TEMP_STATUS_TOO_HOT_BIT:
>>  		*val = POWER_SUPPLY_HEALTH_OVERHEAT;
>>  		return 0;
>> -	case BAT_TEMP_STATUS_COLD_SOFT_LIMIT_BIT:
>> +	case SMB2_BAT_TEMP_STATUS_COLD_SOFT_LIMIT_BIT:
>>  		*val = POWER_SUPPLY_HEALTH_COOL;
>>  		return 0;
>> -	case BAT_TEMP_STATUS_HOT_SOFT_LIMIT_BIT:
>> +	case SMB2_BAT_TEMP_STATUS_HOT_SOFT_LIMIT_BIT:
>>  		*val = POWER_SUPPLY_HEALTH_WARM;
>>  		return 0;
>>  	default:
>>  		*val = POWER_SUPPLY_HEALTH_GOOD;
>>  		return 0;
>>  	}
>>  }
>>  
>> +static int smb_get_prop_health(struct smb_chip *chip, int *val)
>> +{
>> +	switch (chip->gen) {
>> +	case SMB2:
>> +		return smb2_get_prop_health(chip, val);
>> +	case SMB5:
>> +		return smb5_get_prop_health(chip, val);
>> +	}
>> +}
>> +
>>  static int smb_get_property(struct power_supply *psy,
>>  			     enum power_supply_property psp,
>>  			     union power_supply_propval *val)
>>  {
>>  	struct smb_chip *chip = power_supply_get_drvdata(psy);
>> +	int ret;
>>  
>>  	switch (psp) {
>>  	case POWER_SUPPLY_PROP_MANUFACTURER:
>>  		val->strval = "Qualcomm";
>> @@ -466,10 +606,15 @@ static int smb_get_property(struct power_supply *psy,
>>  	case POWER_SUPPLY_PROP_CURRENT_NOW:
>>  		return smb_get_iio_chan(chip, chip->usb_in_i_chan,
>>  					 &val->intval);
>>  	case POWER_SUPPLY_PROP_VOLTAGE_NOW:
>> -		return smb_get_iio_chan(chip, chip->usb_in_v_chan,
>> +		ret = smb_get_iio_chan(chip, chip->usb_in_v_chan,
>>  					 &val->intval);
>> +		if (!ret) {
>> +			if (chip->gen == SMB5)
>> +				val->intval *= 16;
>> +		}
>> +		return ret;
>>  	case POWER_SUPPLY_PROP_ONLINE:
>>  		return smb_get_prop_usb_online(chip, &val->intval);
>>  	case POWER_SUPPLY_PROP_STATUS:
>>  		return smb_get_prop_status(chip, &val->intval);
>> @@ -515,14 +660,10 @@ static int smb_property_is_writable(struct power_supply *psy,
>>  
>>  static irqreturn_t smb_handle_batt_overvoltage(int irq, void *data)
>>  {
>>  	struct smb_chip *chip = data;
>> -	unsigned int status;
>>  
>> -	regmap_read(chip->regmap, chip->base + BATTERY_CHARGER_STATUS_2,
>> -		    &status);
>> -
>> -	if (status & CHARGER_ERROR_STATUS_BAT_OV_BIT) {
>> +	if (smbx_ov_status(chip) == 1) {
>>  		/* The hardware stops charging automatically */
>>  		dev_err(chip->dev, "battery overvoltage detected\n");
>>  		power_supply_changed(chip->chg_psy);
>>  	}
>> @@ -566,9 +707,9 @@ static irqreturn_t smb_handle_wdog_bark(int irq, void *data)
>>  	return IRQ_HANDLED;
>>  }
>>  
>>  static const struct power_supply_desc smb_psy_desc = {
>> -	.name = "pmi8998_charger",
>> +	.name = "SMB2_charger",
>>  	.type = POWER_SUPPLY_TYPE_USB,
>>  	.usb_types = BIT(POWER_SUPPLY_USB_TYPE_SDP) |
>>  		     BIT(POWER_SUPPLY_USB_TYPE_CDP) |
>>  		     BIT(POWER_SUPPLY_USB_TYPE_DCP) |
>> @@ -580,18 +721,100 @@ static const struct power_supply_desc smb_psy_desc = {
>>  	.property_is_writeable = smb_property_is_writable,
>>  };
>>  
>>  /* Init sequence derived from vendor downstream driver */
>> -static const struct smb_init_register smb_init_seq[] = {
>> -	{ .addr = AICL_RERUN_TIME_CFG, .mask = AICL_RERUN_TIME_MASK, .val = 0 },
>> +static const struct smb_init_register smb5_init_seq[] = {
>> +	{ .addr = USBIN_CMD_IL, .mask = USBIN_SUSPEND_BIT, .val = 0 },
>> +	/*
>> +	 * By default configure us as an upstream facing port
>> +	 * FIXME: This will be handled by the type-c driver
>> +	 */
> 
> All of this needs to be reworked to cooperate with the type-c driver.
> Otherwise it might try to reconfigure the Type-C mode _after_ the TCPM
> has negotiated some configuration. So, it can't go in in this way.

Hi Dmitry,

this is the smb2/pmi8998 init sequence, we don't have any type-c support
for this yet hence this. When we add role switching/type-c support it
will make sense to rework this but until then we need this.

Kind regards,

> 
>> +	{ .addr = SMB5_TYPE_C_MODE_CFG,
>> +	  .mask = SMB5_EN_TRY_SNK_BIT | SMB5_EN_SNK_ONLY_BIT,
>> +	  .val = SMB5_EN_TRY_SNK_BIT },
>>
> 

-- 
// Casey (she/her)

Re: [PATCH 09/11] power: supply: qcom_smbx: add smb5 support

[Dmitry Baryshkov]

On Mon, Jun 30, 2025 at 01:06:24AM +0200, Caleb Connolly wrote:
> 
> 
> On 24/06/2025 03:06, Dmitry Baryshkov wrote:
> > On Thu, Jun 19, 2025 at 04:55:17PM +0200, Casey Connolly wrote:
> >> Introduce support for the SMB5 charger found on pm8150b and other more
> >> modern Qualcomm SoCs.
> >>
> >> SMB5 is largely similar to SMB2, with a few register differences. The
> >> main difference is the new Type-C hardware block which some registers
> >> are moved to.
> >>
> >> Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
> >> ---
> >>  drivers/power/supply/qcom_smbx.c | 367 +++++++++++++++++++++++++++++++++------
> >>  1 file changed, 314 insertions(+), 53 deletions(-)
> >>
> >> diff --git a/drivers/power/supply/qcom_smbx.c b/drivers/power/supply/qcom_smbx.c
> >> index 10ddd33a09599decb23c0f1ccd02fa9b56602543..d902f3f43548191d3d0310ce90e699918ed0f16f 100644
> >> --- a/drivers/power/supply/qcom_smbx.c
> >> +++ b/drivers/power/supply/qcom_smbx.c

> >> @@ -580,18 +721,100 @@ static const struct power_supply_desc smb_psy_desc = {
> >>  	.property_is_writeable = smb_property_is_writable,
> >>  };
> >>  
> >>  /* Init sequence derived from vendor downstream driver */
> >> -static const struct smb_init_register smb_init_seq[] = {
> >> -	{ .addr = AICL_RERUN_TIME_CFG, .mask = AICL_RERUN_TIME_MASK, .val = 0 },
> >> +static const struct smb_init_register smb5_init_seq[] = {
> >> +	{ .addr = USBIN_CMD_IL, .mask = USBIN_SUSPEND_BIT, .val = 0 },
> >> +	/*
> >> +	 * By default configure us as an upstream facing port
> >> +	 * FIXME: This will be handled by the type-c driver
> >> +	 */
> > 
> > All of this needs to be reworked to cooperate with the type-c driver.
> > Otherwise it might try to reconfigure the Type-C mode _after_ the TCPM
> > has negotiated some configuration. So, it can't go in in this way.
> 
> Hi Dmitry,
> 
> this is the smb2/pmi8998 init sequence, we don't have any type-c support
> for this yet hence this. When we add role switching/type-c support it
> will make sense to rework this but until then we need this.

No, it is not. It is smb5_init_seq, which is then being used for PM8150B
and PM7250.

> 
> Kind regards,
> 
> > 
> >> +	{ .addr = SMB5_TYPE_C_MODE_CFG,
> >> +	  .mask = SMB5_EN_TRY_SNK_BIT | SMB5_EN_SNK_ONLY_BIT,
> >> +	  .val = SMB5_EN_TRY_SNK_BIT },
> >>
> > 
> 
> -- 
> // Casey (she/her)
> 

-- 
With best wishes
Dmitry

[PATCH 10/11] MAINTAINERS: add myself as smbx charger driver maintainer

[Casey Connolly]

Missed when this originally went upstream, add myself to the MAINTAINERS
file for this driver.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
---
 MAINTAINERS | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index c2b570ed5f2f28341a3bcb7b699cbb250ffa2a88..a32e53d89c29cacf6e456258c4c7c0206cf8abf2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20565,8 +20565,15 @@ L:	linux-arm-msm@vger.kernel.org
 S:	Maintained
 F:	Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
 F:	drivers/mtd/nand/raw/qcom_nandc.c
 
+QUALCOMM SMB2 CHARGER DRIVER
+M:	Casey Connolly <casey.connolly@linaro.org>
+L:	linux-arm-msm@vger.kernel.org
+S:	Maintained
+F:	Documentation/devicetree/bindings/power/supply/qcom,pmi8998-charger.yaml
+F:	drivers/power/supply/qcom_smbx_charger.c
+
 QUALCOMM QSEECOM DRIVER
 M:	Maximilian Luz <luzmaximilian@gmail.com>
 L:	linux-arm-msm@vger.kernel.org
 S:	Maintained

-- 
2.49.0

Re: [PATCH 10/11] MAINTAINERS: add myself as smbx charger driver maintainer

[Luca Weiss]

Hi Casey,

On Thu Jun 19, 2025 at 4:55 PM CEST, Casey Connolly wrote:
> Missed when this originally went upstream, add myself to the MAINTAINERS
> file for this driver.
>
> Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
> ---
>  MAINTAINERS | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index c2b570ed5f2f28341a3bcb7b699cbb250ffa2a88..a32e53d89c29cacf6e456258c4c7c0206cf8abf2 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -20565,8 +20565,15 @@ L:	linux-arm-msm@vger.kernel.org
>  S:	Maintained
>  F:	Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
>  F:	drivers/mtd/nand/raw/qcom_nandc.c
>  
> +QUALCOMM SMB2 CHARGER DRIVER

SMB2/SMB5 or SMBX probably?

Regards
Luca

> +M:	Casey Connolly <casey.connolly@linaro.org>
> +L:	linux-arm-msm@vger.kernel.org
> +S:	Maintained
> +F:	Documentation/devicetree/bindings/power/supply/qcom,pmi8998-charger.yaml
> +F:	drivers/power/supply/qcom_smbx_charger.c
> +
>  QUALCOMM QSEECOM DRIVER
>  M:	Maximilian Luz <luzmaximilian@gmail.com>
>  L:	linux-arm-msm@vger.kernel.org
>  S:	Maintained

[PATCH 11/11] power: supply: qcom_smbx: program aicl rerun time

[Casey Connolly]

We don't know what the bootloader programmed here, but we want to have a
consistent value. Program the automatic input current limit detection to
re-run every 3 seconds. This seems to be necessary at least for smb5.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
---
 drivers/power/supply/qcom_smbx.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/power/supply/qcom_smbx.c b/drivers/power/supply/qcom_smbx.c
index d902f3f43548191d3d0310ce90e699918ed0f16f..b723dba5b86daefb238ee6aae19b1b7e5236fce3 100644
--- a/drivers/power/supply/qcom_smbx.c
+++ b/drivers/power/supply/qcom_smbx.c
@@ -1091,8 +1091,14 @@ static int smb_probe(struct platform_device *pdev)
 	if (rc < 0)
 		return dev_err_probe(chip->dev, rc,
 				     "Couldn't write fast charge current cfg");
 
+	rc = regmap_write_bits(chip->regmap, chip->base + AICL_RERUN_TIME_CFG,
+			       AICL_RERUN_TIME_MASK, AIC_RERUN_TIME_3_SECS);
+	if (rc < 0)
+		return dev_err_probe(chip->dev, rc,
+				     "Couldn't write fast AICL rerun time");
+
 	/* Initialise charger state */
 	schedule_delayed_work(&chip->status_change_work, 0);
 
 	return 0;

-- 
2.49.0

Re: [PATCH 11/11] power: supply: qcom_smbx: program aicl rerun time

[Konrad Dybcio]

On 6/19/25 4:55 PM, Casey Connolly wrote:
> We don't know what the bootloader programmed here, but we want to have a
> consistent value. Program the automatic input current limit detection to
> re-run every 3 seconds. This seems to be necessary at least for smb5.
> 
> Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
> ---
>  drivers/power/supply/qcom_smbx.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/power/supply/qcom_smbx.c b/drivers/power/supply/qcom_smbx.c
> index d902f3f43548191d3d0310ce90e699918ed0f16f..b723dba5b86daefb238ee6aae19b1b7e5236fce3 100644
> --- a/drivers/power/supply/qcom_smbx.c
> +++ b/drivers/power/supply/qcom_smbx.c
> @@ -1091,8 +1091,14 @@ static int smb_probe(struct platform_device *pdev)
>  	if (rc < 0)
>  		return dev_err_probe(chip->dev, rc,
>  				     "Couldn't write fast charge current cfg");
>  
> +	rc = regmap_write_bits(chip->regmap, chip->base + AICL_RERUN_TIME_CFG,
> +			       AICL_RERUN_TIME_MASK, AIC_RERUN_TIME_3_SECS);

FWIW a random downstream clone I have sets 0x01 which is claimed to
mean "every 12s" instead

Konrad

Re: [PATCH 11/11] power: supply: qcom_smbx: program aicl rerun time

[Casey Connolly]

On 6/20/25 19:00, Konrad Dybcio wrote:
> On 6/19/25 4:55 PM, Casey Connolly wrote:
>> We don't know what the bootloader programmed here, but we want to have a
>> consistent value. Program the automatic input current limit detection to
>> re-run every 3 seconds. This seems to be necessary at least for smb5.
>>
>> Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
>> ---
>>   drivers/power/supply/qcom_smbx.c | 6 ++++++
>>   1 file changed, 6 insertions(+)
>>
>> diff --git a/drivers/power/supply/qcom_smbx.c b/drivers/power/supply/qcom_smbx.c
>> index d902f3f43548191d3d0310ce90e699918ed0f16f..b723dba5b86daefb238ee6aae19b1b7e5236fce3 100644
>> --- a/drivers/power/supply/qcom_smbx.c
>> +++ b/drivers/power/supply/qcom_smbx.c
>> @@ -1091,8 +1091,14 @@ static int smb_probe(struct platform_device *pdev)
>>   	if (rc < 0)
>>   		return dev_err_probe(chip->dev, rc,
>>   				     "Couldn't write fast charge current cfg");
>>   
>> +	rc = regmap_write_bits(chip->regmap, chip->base + AICL_RERUN_TIME_CFG,
>> +			       AICL_RERUN_TIME_MASK, AIC_RERUN_TIME_3_SECS);
> 
> FWIW a random downstream clone I have sets 0x01 which is claimed to
> mean "every 12s" instead

hmm I saw that too, I think more documentation would be needed to 
understand this properly (I'm not exactly clear on what this actually 
means, when the AICL would re-run, etc).

I have reports that this works ok, so I'd just leave it unless we have 
info to suggest otherwise.

> 
> Konrad
-- 
Casey (she/they)

Re: [PATCH 11/11] power: supply: qcom_smbx: program aicl rerun time

[Konrad Dybcio]

On 6/23/25 6:33 PM, Casey Connolly wrote:
> 
> 
> On 6/20/25 19:00, Konrad Dybcio wrote:
>> On 6/19/25 4:55 PM, Casey Connolly wrote:
>>> We don't know what the bootloader programmed here, but we want to have a
>>> consistent value. Program the automatic input current limit detection to
>>> re-run every 3 seconds. This seems to be necessary at least for smb5.
>>>
>>> Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
>>> ---
>>>   drivers/power/supply/qcom_smbx.c | 6 ++++++
>>>   1 file changed, 6 insertions(+)
>>>
>>> diff --git a/drivers/power/supply/qcom_smbx.c b/drivers/power/supply/qcom_smbx.c
>>> index d902f3f43548191d3d0310ce90e699918ed0f16f..b723dba5b86daefb238ee6aae19b1b7e5236fce3 100644
>>> --- a/drivers/power/supply/qcom_smbx.c
>>> +++ b/drivers/power/supply/qcom_smbx.c
>>> @@ -1091,8 +1091,14 @@ static int smb_probe(struct platform_device *pdev)
>>>       if (rc < 0)
>>>           return dev_err_probe(chip->dev, rc,
>>>                        "Couldn't write fast charge current cfg");
>>>   +    rc = regmap_write_bits(chip->regmap, chip->base + AICL_RERUN_TIME_CFG,
>>> +                   AICL_RERUN_TIME_MASK, AIC_RERUN_TIME_3_SECS);
>>
>> FWIW a random downstream clone I have sets 0x01 which is claimed to
>> mean "every 12s" instead
> 
> hmm I saw that too, I think more documentation would be needed to understand this properly (I'm not exactly clear on what this actually means, when the AICL would re-run, etc).
> 
> I have reports that this works ok, so I'd just leave it unless we have info to suggest otherwise.

Well, in case of such lack of understanding I'd much prefer to see
a magic number that shipped on hundreds of millions of devices than
a magic number that was confirmed working on a couple dozen.. especially
since this looks like an improvement that people who had their hand in
the hw design wouldn't generally overlook unless there was reasons
(e.g. compatibility or some sort of a quirk)

Konrad

Re: (subset) [PATCH 00/11] power: supply: pmi8998 charger improvements and smb5 support

[Sebastian Reichel]

On Thu, 19 Jun 2025 16:55:08 +0200, Casey Connolly wrote:
> This series contains fixes and cleanups for the pmi8998 charger driver,
> as well as introducing support for the newer smb5 charger found in the
> pm8150b and other newer Qualcomm PMICs..
> 
> A bug is fixed where wakeirq enable/disable refcounting wasn't respected
> when the driver was unloaded and reloaded.
> 
> [...]

Applied, thanks!

[03/11] power: supply: qcom_pmi8998_charger: fix wakeirq
        commit: 6c5393771c50fac30f08dfb6d2f65f4f2cfeb8c7
[04/11] power: supply: pmi8998_charger: rename to qcom_smbx
        commit: 5ec53bcc7fce6801977a0c125fb726d7b0e9102c
[05/11] power: supply: qcom_smbx: allow disabling charging
        (no commit info)
[10/11] MAINTAINERS: add myself as smbx charger driver maintainer
        commit: 4deeea4b07414e7dd766005d8e28b1ef878cd417

Best regards,
-- 
Sebastian Reichel <sebastian.reichel@collabora.com>

Re: (subset) [PATCH 00/11] power: supply: pmi8998 charger improvements and smb5 support

[Bjorn Andersson]

On Thu, 19 Jun 2025 16:55:08 +0200, Casey Connolly wrote:
> This series contains fixes and cleanups for the pmi8998 charger driver,
> as well as introducing support for the newer smb5 charger found in the
> pm8150b and other newer Qualcomm PMICs..
> 
> A bug is fixed where wakeirq enable/disable refcounting wasn't respected
> when the driver was unloaded and reloaded.
> 
> [...]

Applied, thanks!

[02/11] arm64: dts: qcom: sdm845-oneplus-*: set constant-charge-current-max-microamp
        commit: cb2347ed822f77c6b04011ee3140f7483d206018

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>