From: Borislav Petkov <bp@alien8.de>
To: Huang Rui <ray.huang@amd.com>
Cc: "Limonciello, Mario" <Mario.Limonciello@amd.com>,
"Yuan, Perry" <Perry.Yuan@amd.com>,
"rafael.j.wysocki@intel.com" <rafael.j.wysocki@intel.com>,
"viresh.kumar@linaro.org" <viresh.kumar@linaro.org>,
"Sharma, Deepak" <Deepak.Sharma@amd.com>,
"Fontenot, Nathan" <Nathan.Fontenot@amd.com>,
"Deucher, Alexander" <Alexander.Deucher@amd.com>,
"Huang, Shimmer" <Shimmer.Huang@amd.com>,
"Du, Xiaojian" <Xiaojian.Du@amd.com>,
"Meng, Li (Jassmine)" <Li.Meng@amd.com>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [RESEND PATCH V2 4/9] x86/msr: Add the MSR definition for AMD CPPC boost state
Date: Fri, 21 Oct 2022 11:37:54 +0200 [thread overview]
Message-ID: <Y1JoXmC+sOSxZffT@zn.tnic> (raw)
In-Reply-To: <Y1Isg4q9Vsl8zNPe@amd.com>
On Fri, Oct 21, 2022 at 01:22:11PM +0800, Huang Rui wrote:
> > > If I rename that the MSR definition string, that will cause lots of driver file
> > > change.
> > > So I suggest to add one new MSR macro for the CPPC, the MSR_K7_HWCR is
> > > mismatching in the CPPC Pstate driver.
> > > If you refuse to use this new one, I will reuse that old one.
> >
> > To avoid changing too much stuff at once how about if you give an alias?
> > IE something like:
> >
> > #define MSR_AMD_CPPC_HW_CTL MSR_K7_HWCR
Why would you all even think about adding a new name and not use
MSR_K7_HWCR?
The other code uses it just fine, do git grep MSR_K7_HWCR.
We have waaay too many MSRs, no need to unnecessarily confuse people
with an alias or rename stuff. Just use MSR_K7_HWCR like everything else
does.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
next prev parent reply other threads:[~2022-10-21 9:38 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-10 16:22 [RESEND PATCH V2 0/9] Implement AMD Pstate EPP Driver Perry Yuan
2022-10-10 16:22 ` [RESEND PATCH V2 1/9] ACPI: CPPC: Add AMD pstate energy performance preference cppc control Perry Yuan
2022-10-17 9:43 ` Huang Rui
2022-10-10 16:22 ` [RESEND PATCH V2 2/9] cpufreq: amd_pstate: add module parameter to load amd pstate EPP driver Perry Yuan
2022-10-17 9:47 ` Huang Rui
2022-10-20 15:56 ` Yuan, Perry
2022-10-10 16:22 ` [RESEND PATCH V2 3/9] cpufreq: cpufreq: export cpufreq cpu release and acquire Perry Yuan
2022-10-10 16:22 ` [RESEND PATCH V2 4/9] x86/msr: Add the MSR definition for AMD CPPC boost state Perry Yuan
2022-10-17 9:56 ` Huang Rui
2022-10-20 16:01 ` Yuan, Perry
2022-10-20 16:05 ` Limonciello, Mario
2022-10-20 16:08 ` Yuan, Perry
2022-10-21 5:22 ` Huang Rui
2022-10-21 9:37 ` Borislav Petkov [this message]
2022-10-24 2:58 ` Yuan, Perry
2022-10-24 2:56 ` Yuan, Perry
2022-10-25 0:32 ` Huang Rui
2022-10-25 13:23 ` Yuan, Perry
2022-10-10 16:22 ` [RESEND PATCH V2 5/9] Documentation: amd-pstate: add EPP profiles introduction Perry Yuan
2022-10-10 16:22 ` [RESEND PATCH V2 6/9] cpufreq: amd_pstate: add AMD pstate EPP support for shared memory type processor Perry Yuan
2022-10-17 10:54 ` Huang Rui
2022-10-20 16:04 ` Yuan, Perry
2022-10-25 0:25 ` Huang Rui
2022-10-10 16:22 ` [RESEND PATCH V2 7/9] cpufreq: amd_pstate: add AMD Pstate EPP support for the MSR based processors Perry Yuan
2022-10-11 2:54 ` Viresh Kumar
2022-10-11 5:45 ` Yuan, Perry
2022-10-17 11:17 ` Huang Rui
2022-10-10 16:22 ` [RESEND PATCH V2 8/9] cpufreq: amd_pstate: implement amd pstate cpu online and offline callback Perry Yuan
2022-10-10 16:22 ` [RESEND PATCH V2 9/9] cpufreq: amd-pstate: implement suspend and resume callbacks Perry Yuan
2022-10-12 12:06 ` [RESEND PATCH V2 0/9] Implement AMD Pstate EPP Driver Russell Haley
2022-10-17 7:40 ` Huang Rui
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