From: Huang Rui <ray.huang@amd.com>
To: "Yuan, Perry" <Perry.Yuan@amd.com>
Cc: "rafael.j.wysocki@intel.com" <rafael.j.wysocki@intel.com>,
"Limonciello, Mario" <Mario.Limonciello@amd.com>,
"viresh.kumar@linaro.org" <viresh.kumar@linaro.org>,
"Sharma, Deepak" <Deepak.Sharma@amd.com>,
"Fontenot, Nathan" <Nathan.Fontenot@amd.com>,
"Deucher, Alexander" <Alexander.Deucher@amd.com>,
"Huang, Shimmer" <Shimmer.Huang@amd.com>,
"Du, Xiaojian" <Xiaojian.Du@amd.com>,
"Meng, Li (Jassmine)" <Li.Meng@amd.com>,
"Karny, Wyes" <Wyes.Karny@amd.com>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v10 01/12] ACPI: CPPC: Add AMD pstate energy performance preference cppc control
Date: Tue, 17 Jan 2023 19:10:25 +0800 [thread overview]
Message-ID: <Y8aCIdrozMPUd5Vy@amd.com> (raw)
In-Reply-To: <20230106061420.95715-2-perry.yuan@amd.com>
On Fri, Jan 06, 2023 at 02:14:09PM +0800, Yuan, Perry wrote:
> From: Perry Yuan <Perry.Yuan@amd.com>
>
> Add support for setting and querying EPP preferences to the generic
> CPPC driver. This enables downstream drivers such as amd-pstate to discover
> and use these values.
>
> Downstream drivers that want to use the new symbols cppc_get_epp_caps
> and cppc_set_epp_perf for querying and setting EPP preferences will need
> to call cppc_set_epp_perf to enable the EPP function firstly.
>
> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
> Reviewed-by: Wyes Karny <wyes.karny@amd.com>
> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
> ---
> drivers/acpi/cppc_acpi.c | 67 ++++++++++++++++++++++++++++++++++++++++
> include/acpi/cppc_acpi.h | 12 +++++++
> 2 files changed, 79 insertions(+)
>
> diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
> index 093675b1a1ff..0ce6c55a76ca 100644
> --- a/drivers/acpi/cppc_acpi.c
> +++ b/drivers/acpi/cppc_acpi.c
> @@ -1153,6 +1153,19 @@ int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf)
> return cppc_get_perf(cpunum, NOMINAL_PERF, nominal_perf);
> }
>
> +/**
> + * cppc_get_epp_perf - Get the epp register value.
> + * @cpunum: CPU from which to get epp preference value.
> + * @epp_perf: Return address.
> + *
> + * Return: 0 for success, -EIO otherwise.
> + */
> +int cppc_get_epp_perf(int cpunum, u64 *epp_perf)
> +{
> + return cppc_get_perf(cpunum, ENERGY_PERF, epp_perf);
> +}
> +EXPORT_SYMBOL_GPL(cppc_get_epp_perf);
> +
> /**
> * cppc_get_perf_caps - Get a CPU's performance capabilities.
> * @cpunum: CPU from which to get capabilities info.
> @@ -1365,6 +1378,60 @@ int cppc_get_perf_ctrs(int cpunum, struct cppc_perf_fb_ctrs *perf_fb_ctrs)
> }
> EXPORT_SYMBOL_GPL(cppc_get_perf_ctrs);
>
> +/*
> + * Set Energy Performance Preference Register value through
> + * Performance Controls Interface
> + */
> +int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable)
> +{
> + int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu);
> + struct cpc_register_resource *epp_set_reg;
> + struct cpc_register_resource *auto_sel_reg;
> + struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu);
> + struct cppc_pcc_data *pcc_ss_data = NULL;
> + int ret;
> +
> + if (!cpc_desc) {
> + pr_debug("No CPC descriptor for CPU:%d\n", cpu);
> + return -ENODEV;
> + }
> +
> + auto_sel_reg = &cpc_desc->cpc_regs[AUTO_SEL_ENABLE];
> + epp_set_reg = &cpc_desc->cpc_regs[ENERGY_PERF];
> +
> + if (CPC_IN_PCC(epp_set_reg) || CPC_IN_PCC(auto_sel_reg)) {
> + if (pcc_ss_id < 0) {
> + pr_debug("Invalid pcc_ss_id for CPU:%d\n", cpu);
> + return -ENODEV;
> + }
> +
> + if (CPC_SUPPORTED(auto_sel_reg)) {
> + ret = cpc_write(cpu, auto_sel_reg, enable);
> + if (ret)
> + return ret;
> + }
> +
> + if (CPC_SUPPORTED(epp_set_reg)) {
> + ret = cpc_write(cpu, epp_set_reg, perf_ctrls->energy_perf);
> + if (ret)
> + return ret;
> + }
> +
> + pcc_ss_data = pcc_data[pcc_ss_id];
> +
> + down_write(&pcc_ss_data->pcc_lock);
> + /* after writing CPC, transfer the ownership of PCC to platform */
> + ret = send_pcc_cmd(pcc_ss_id, CMD_WRITE);
> + up_write(&pcc_ss_data->pcc_lock);
> + } else {
> + ret = -ENOTSUPP;
> + pr_debug("_CPC in PCC is not supported\n");
> + }
> +
> + return ret;
> +}
> +EXPORT_SYMBOL_GPL(cppc_set_epp_perf);
> +
> /**
> * cppc_set_enable - Set to enable CPPC on the processor by writing the
> * Continuous Performance Control package EnableRegister field.
> diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h
> index c5614444031f..6b487a5bd638 100644
> --- a/include/acpi/cppc_acpi.h
> +++ b/include/acpi/cppc_acpi.h
> @@ -108,12 +108,14 @@ struct cppc_perf_caps {
> u32 lowest_nonlinear_perf;
> u32 lowest_freq;
> u32 nominal_freq;
> + u32 energy_perf;
> };
>
> struct cppc_perf_ctrls {
> u32 max_perf;
> u32 min_perf;
> u32 desired_perf;
> + u32 energy_perf;
> };
>
> struct cppc_perf_fb_ctrs {
> @@ -149,6 +151,8 @@ extern bool cpc_ffh_supported(void);
> extern bool cpc_supported_by_cpu(void);
> extern int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val);
> extern int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val);
> +extern int cppc_get_epp_perf(int cpunum, u64 *epp_perf);
> +extern int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable);
> #else /* !CONFIG_ACPI_CPPC_LIB */
> static inline int cppc_get_desired_perf(int cpunum, u64 *desired_perf)
> {
> @@ -202,6 +206,14 @@ static inline int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val)
> {
> return -ENOTSUPP;
> }
> +static inline int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable)
> +{
> + return -ENOTSUPP;
> +}
> +static inline int cppc_get_epp_perf(int cpunum, u64 *epp_perf)
> +{
> + return -ENOTSUPP;
> +}
> #endif /* !CONFIG_ACPI_CPPC_LIB */
>
> #endif /* _CPPC_ACPI_H*/
> --
> 2.34.1
>
next prev parent reply other threads:[~2023-01-17 11:11 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-06 6:14 [PATCH v10 00/12] Implement AMD Pstate EPP Driver Perry Yuan
2023-01-06 6:14 ` [PATCH v10 01/12] ACPI: CPPC: Add AMD pstate energy performance preference cppc control Perry Yuan
2023-01-17 11:10 ` Huang Rui [this message]
2023-01-06 6:14 ` [PATCH v10 02/12] Documentation: amd-pstate: add EPP profiles introduction Perry Yuan
2023-01-17 11:45 ` Huang Rui
2023-01-06 6:14 ` [PATCH v10 03/12] cpufreq: intel_pstate: use common macro definition for Energy Preference Performance(EPP) Perry Yuan
2023-01-06 6:14 ` [PATCH v10 04/12] cpufreq: amd-pstate: optimize driver working mode selection in amd_pstate_param() Perry Yuan
2023-01-17 11:57 ` Huang Rui
2023-01-06 6:14 ` [PATCH v10 05/12] cpufreq: amd-pstate: implement Pstate EPP support for the AMD processors Perry Yuan
2023-01-06 11:19 ` Wyes Karny
2023-01-10 15:21 ` Yuan, Perry
2023-01-17 13:34 ` Huang Rui
2023-01-06 6:14 ` [PATCH v10 06/12] cpufreq: amd-pstate: implement amd pstate cpu online and offline callback Perry Yuan
2023-01-06 6:14 ` [PATCH v10 07/12] cpufreq: amd-pstate: implement suspend and resume callbacks Perry Yuan
2023-01-06 6:14 ` [PATCH v10 08/12] cpufreq: amd-pstate: add driver working mode switch support Perry Yuan
2023-01-17 13:56 ` Huang Rui
2023-01-18 6:34 ` Wyes Karny
2023-01-18 7:27 ` Yuan, Perry
2023-01-06 6:14 ` [PATCH v10 09/12] Documentation: amd-pstate: add amd pstate driver mode introduction Perry Yuan
2023-01-06 6:14 ` [PATCH v10 10/12] Documentation: introduce amd pstate active mode kernel command line options Perry Yuan
2023-01-06 6:14 ` [PATCH v10 11/12] cpufreq: amd-pstate: convert sprintf with sysfs_emit() Perry Yuan
2023-01-06 6:14 ` [PATCH v10 12/12] Documentation: amd-pstate: introduce new global sysfs attributes Perry Yuan
2023-01-17 14:11 ` Huang Rui
2023-01-10 18:00 ` [PATCH v10 00/12] Implement AMD Pstate EPP Driver Wyes Karny
2023-01-17 14:03 ` Huang Rui
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