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[34.70.23.30]) by smtp.gmail.com with UTF8SMTPSA id r8-20020a92ac08000000b0030c68d38255sm9142749ilh.38.2023.01.17.09.47.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 17 Jan 2023 09:47:14 -0800 (PST) Date: Tue, 17 Jan 2023 17:47:14 +0000 From: Matthias Kaehlcke To: Krzysztof Kozlowski Cc: Rajendra Nayak , Georgi Djakov , agross@kernel.org, andersson@kernel.org, konrad.dybcio@somainline.org, robh+dt@kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Douglas Anderson , Stephen Boyd Subject: Re: [PATCH v2 4/4] arm64: dts: qcom: sc7280: Add cpu and llcc BWMON (=> interconnect issue) Message-ID: References: <20220902043511.17130-1-quic_rjendra@quicinc.com> <20220902043511.17130-5-quic_rjendra@quicinc.com> <754f8193-09ec-8bbf-e0d4-898525dc242f@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <754f8193-09ec-8bbf-e0d4-898525dc242f@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org On Tue, Jan 17, 2023 at 06:33:41PM +0100, Krzysztof Kozlowski wrote: > On 17/01/2023 18:27, Matthias Kaehlcke wrote: > > > >>> which would set the initially bandwidths to 0 and determine the actually > >>> needed bandwidth. But since the driver isn't probed the initial > >>> bandwidths stay at INT_MAX. > >>> > >>> This isn't actually an issue with this patch, but how the interconnect > >>> framework deals with devices that are registered on the bus, but aren't > >>> probed (yet). Not sure how this would be best fixed. Georgi, do you have > >>> any ideas? > >> > >> Why the device is not probed (yet)? If it is registered, it will come > >> soon during boot up. > > > > Because CONFIG_QCOM_ICC_BWMON is not enabled for the board in question (see > > above). It could be enabled as a short term mitigtion, however we shouldn't > > require drivers to be enabled just because the DT has a corresponding node. > > It's the same case as with all other interconnect leafs/consumers. The > same behavior if you do not have it enabled, right? If not, I wonder > what is here different? Right, this is a general issue. The problem on sc7280 (and probably other Qualcomm SoCs) is that the interconnect link at full throttle prevents the SoC from entering its low power mode (AOSS sleep) during system suspend. On many boards this might go unnoticed, on herobrine the condition is detected by the embedded controller (EC) and considered a failed suspend, which results in waking up the system.