Re: [PATCH v6 2/2] cpuidle: teo: Introduce util-awareness

Christian Loehle
2024-05-28T10:35:38Z

On 5/28/24 10:29, Vincent Guittot wrote:
> Hi All,
>
> I'm quite late on this thread but this patchset creates a major
> regression for psci cpuidle driver when using the OSI mode (OS
> initiated mode). In such a case, cpuidle driver takes care only of
> CPUs power state and the deeper C-states ,which includes cluster and
> other power domains, are handled with power domain framework. In such
> configuration ,cpuidle has only 2 c-states : WFI and cpu off states
> and others states that include the clusters, are managed by genpd and
> its governor.
>
> This patch selects cpuidle c-state N-1 as soon as the utilization is
> above CPU capacity / 64 which means at most a level of 16 on the big
> core but can be as low as 4 on little cores. These levels are very low
> and the main result is that as soon as there is very little activity
> on a CPU, cpuidle always selects WFI states whatever the estimated
> sleep duration and which prevents any deeper states. Another effect is
> that it also keeps the tick firing every 1ms in my case.
>
> IMO, we should at least increase the utilization level
>
> Regards,
> Vincent

I looked at teo too and what you describe looks reasonable within my
expectation.
Could you describe your workload a bit and details about the (I assume)
power regression?
Maybe compare with 64/32/16 as a divisor and a hack that doesn't override
tick_stop on utilization?
While /64 might seem aggressive (maybe it is too aggressive) I think it
tries to avoid cpu_idle_miss on c1 (too deep state selected) much more than
c0 (too shallow selected), because the latter only costs us some (small?)
energy while the former costs us performance and energy.
Basically WFI should already be really efficient and thus selecting
anything deeper be avoided as long as there is still some utilization.
But I'd be curious on your numbers.

Kind Regards,
Christian