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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id w28-20020ac2599c000000b004f61a57797fsm1759751lfn.60.2023.06.13.05.12.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 13 Jun 2023 05:12:59 -0700 (PDT) Message-ID: Date: Tue, 13 Jun 2023 14:12:57 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.2 Subject: Re: [PATCH v3 07/23] interconnect: qcom: icc-rpm: Allow negative QoS offset Content-Language: en-US To: Stephan Gerhold Cc: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org References: <20230526-topic-smd_icc-v3-0-5fb7d39b874f@linaro.org> <20230526-topic-smd_icc-v3-7-5fb7d39b874f@linaro.org> From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org On 12.06.2023 22:27, Stephan Gerhold wrote: > On Mon, Jun 12, 2023 at 08:24:24PM +0200, Konrad Dybcio wrote: >> In some very very very very unfortunate cases, the correct offset of >> the QoS registers will be.. negative. One such case is MSM8998, where >> The DDR BWMON occupies what-would-be-the-BIMC-base which we usually >> take into account with the register calculation, making the actual >> BIMC node start at what-would-be-the-BIMC-base+0x300. >> >> In order to keep the calculation code sane, the simplest - however >> ugly it may be - solution is to allow the offset to be negative. >> >> Signed-off-by: Konrad Dybcio > > I'm a bit confused why this patch is part of this series. It doesn't > seem to be directly related. > > Can you send it as part of the series that adds the MSM8998 interconnect > driver? Ack Konrad > > Thanks, > Stephan > >> --- >> drivers/interconnect/qcom/icc-rpm.h | 6 +++--- >> 1 file changed, 3 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h >> index d2c04c400cad..ba840a436cc0 100644 >> --- a/drivers/interconnect/qcom/icc-rpm.h >> +++ b/drivers/interconnect/qcom/icc-rpm.h >> @@ -29,10 +29,10 @@ enum qcom_icc_type { >> * @num_intf_clks: the total number of intf_clks clk_bulk_data entries >> * @type: the ICC provider type >> * @regmap: regmap for QoS registers read/write access >> - * @qos_offset: offset to QoS registers >> * @bus_clk_rate: bus clock rate in Hz >> * @bus_clks: the clk_bulk_data table of bus clocks >> * @intf_clks: a clk_bulk_data array of interface clocks >> + * @qos_offset: offset to QoS registers >> * @keep_alive: whether to always keep a minimum vote on the bus clocks >> * @is_on: whether the bus is powered on >> */ >> @@ -42,7 +42,7 @@ struct qcom_icc_provider { >> int num_intf_clks; >> enum qcom_icc_type type; >> struct regmap *regmap; >> - unsigned int qos_offset; >> + int qos_offset; >> u64 bus_clk_rate[NUM_BUS_CLKS]; >> struct clk_bulk_data bus_clks[NUM_BUS_CLKS]; >> struct clk_bulk_data *intf_clks; >> @@ -108,7 +108,7 @@ struct qcom_icc_desc { >> bool no_clk_scaling; >> enum qcom_icc_type type; >> const struct regmap_config *regmap_cfg; >> - unsigned int qos_offset; >> + int qos_offset; >> }; >> >> /* Valid for all bus types */ >> >> -- >> 2.41.0 >>