From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 462A7C433FE for ; Fri, 24 Dec 2021 07:33:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351815AbhLXHdx (ORCPT ); Fri, 24 Dec 2021 02:33:53 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:54478 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1351813AbhLXHdx (ORCPT ); Fri, 24 Dec 2021 02:33:53 -0500 X-UUID: 642cc6016aae4d9092443f83fa7722ca-20211224 X-UUID: 642cc6016aae4d9092443f83fa7722ca-20211224 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1548116192; Fri, 24 Dec 2021 15:33:48 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 24 Dec 2021 15:33:48 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 24 Dec 2021 15:33:47 +0800 Message-ID: Subject: Re: [PATCH v16 2/7] arm64: dts: mt8183: add svs device information From: Roger Lu To: AngeloGioacchino Del Regno , Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Rob Herring , Nicolas Boichat , Stephen Boyd , Philipp Zabel CC: Fan Chen , HenryC Chen , YT Lee , Xiaoqing Liu , Charles Yang , Angus Lin , Mark Rutland , Nishanth Menon , , , , , , Date: Fri, 24 Dec 2021 15:33:47 +0800 In-Reply-To: <70e71210-6d17-92e3-4e3f-01b83380be42@collabora.com> References: <20210428065440.3704-1-roger.lu@mediatek.com> <20210428065440.3704-3-roger.lu@mediatek.com> <70e71210-6d17-92e3-4e3f-01b83380be42@collabora.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Hi AngeloGioacchino, Sorry for the late reply. On Wed, 2021-10-20 at 17:20 +0200, AngeloGioacchino Del Regno wrote: > Il 28/04/21 08:54, Roger Lu ha scritto: > > add compitable/reg/irq/clock/efuse setting in svs node > > > > Signed-off-by: Roger Lu > > --- > > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 18 ++++++++++++++++++ > > 1 file changed, 18 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > index 80519a145f13..441d617ece43 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > @@ -657,6 +657,18 @@ > > status = "disabled"; > > }; > > > > + svs: svs@1100b000 { > > + compatible = "mediatek,mt8183-svs"; > > + reg = <0 0x1100b000 0 0x1000>; > > + interrupts = ; > > + clocks = <&infracfg CLK_INFRA_THERM>; > > + clock-names = "main"; > > + nvmem-cells = <&svs_calibration>, > > + <&thermal_calibration>; > > + nvmem-cell-names = "svs-calibration-data", > > + "t-calibration-data"; > > + }; > > + > > pwm0: pwm@1100e000 { > > compatible = "mediatek,mt8183-disp-pwm"; > > reg = <0 0x1100e000 0 0x1000>; > > @@ -941,9 +953,15 @@ > > reg = <0 0x11f10000 0 0x1000>; > > #address-cells = <1>; > > #size-cells = <1>; > > + thermal_calibration: calib@180 { > > + reg = <0x180 0xc>; > > + }; > > mipi_tx_calibration: calib@190 { > > reg = <0x190 0xc>; > > }; > > + svs_calibration: calib@580 { > > + reg = <0x580 0x64>; > > + }; > > }; > > > > u3phy: usb-phy@11f40000 { > > > > This patch doesn't apply on the latest linux-next due to some new commits in > mt8183.dtsi, can you please rebase? Okay. I'll rebase it. > Thanks, > - Angelo