Re: [PATCH] arm64: fix cleared E0POE bit after cpu_suspend()/resume()

Yeoreum Yun
2026-01-07T10:51:37Z

Hi Kevin,

> On 07/01/2026 10:57, Yeoreum Yun wrote:
> >>> @@ -97,8 +97,11 @@ SYM_FUNC_START(cpu_do_suspend)
> >>> mrs x9, mdscr_el1
> >>> mrs x10, oslsr_el1
> >>> mrs x11, sctlr_el1
> >>> - get_this_cpu_offset x12
> >>> - mrs x13, sp_el0
> >>> +alternative_if ARM64_HAS_TCR2
> >>> + mrs x12, REG_TCR2_EL1
> >>> +alternative_else_nop_endif
> >>> + get_this_cpu_offset x13
> >>> + mrs x14, sp_el0
> >>> stp x2, x3, [x0]
> >>> stp x4, x5, [x0, #16]
> >>> stp x6, x7, [x0, #32]
> >>> @@ -109,7 +112,7 @@ SYM_FUNC_START(cpu_do_suspend)
> >>> * Save x18 as it may be used as a platform register, e.g. by shadow
> >>> * call stack.
> >>> */
> >>> - str x18, [x0, #96]
> >>> + stp x14, x18, [x0, #96]
> >> If TCR2_EL1 isn't supported, we store and reload an unused arbitrary
> >> value. I think it'd be better to make it all conditional and add it at
> >> the end, something like:
> >>
> >> ï¿½ ï¿½ alternative_if ARM64_HAS_TCR2
> >> ï¿½ ï¿½ ï¿½ ï¿½ mrsï¿½ ï¿½ x2, REG_TCR2_EL1
> >> ï¿½ ï¿½ ï¿½ ï¿½ strï¿½ ï¿½ x2, [x0, #104]
> >> ï¿½ ï¿½ alternative_else_nop_endif
> >>
> >> Same idea on the resume path. This also avoids the noise of renaming
> >> existing registers.
> > IMHO, I think it would be better to sustain the change since
> > it seems more simpler to maintain and x12 is temporary regsiter
> > so leaking whatever was in x12 does not really feel like a concern...
>
> Leaking is not a concern, but I don't think it's really easier to
> maintain. We can have all the conditional registers grouped together,
> like DISR_EL1 and soon SCTLR2_EL1. This avoids renaming a bunch of
> registers every time we save/restore a new register here.

Oh. I overlooked that point.
I'll follow your suggestion.

Thanks!

--
Sincerely,
Yeoreum Yun