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X-CSE-ConnectionGUID: yp+yI/KyQg+5vHQYziEIBA== X-CSE-MsgGUID: HMzCftw/SJSOtLaebODYHg== X-IronPort-AV: E=McAfee;i="6800,10657,11670"; a="69728881" X-IronPort-AV: E=Sophos;i="6.21,225,1763452800"; d="scan'208";a="69728881" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa108.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jan 2026 01:06:01 -0800 X-CSE-ConnectionGUID: pRSBKz3ySZGVDB6pBJwWiQ== X-CSE-MsgGUID: pHSYxn8WS/KQJ7fkbYseMA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,225,1763452800"; d="scan'208";a="209674205" Received: from pgcooper-mobl3.ger.corp.intel.com (HELO localhost) ([10.245.244.83]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jan 2026 01:05:55 -0800 Date: Wed, 14 Jan 2026 11:05:51 +0200 From: Andy Shevchenko To: AngeloGioacchino Del Regno Cc: jic23@kernel.org, dlechner@baylibre.com, nuno.sa@analog.com, andy@kernel.org, arnd@arndb.de, gregkh@linuxfoundation.org, srini@kernel.org, vkoul@kernel.org, neil.armstrong@linaro.org, sre@kernel.org, sboyd@kernel.org, krzk@kernel.org, dmitry.baryshkov@oss.qualcomm.com, quic_wcheng@quicinc.com, melody.olvera@oss.qualcomm.com, quic_nsekar@quicinc.com, ivo.ivanov.ivanov1@gmail.com, abelvesa@kernel.org, luca.weiss@fairphone.com, konrad.dybcio@oss.qualcomm.com, mitltlatltl@gmail.com, krishna.kurapati@oss.qualcomm.com, linux-arm-msm@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-pm@vger.kernel.org, kernel@collabora.com, Jonathan Cameron Subject: Re: [PATCH v7 09/10] iio: adc: qcom-spmi-iadc: Migrate to devm_spmi_subdevice_alloc_and_add() Message-ID: References: <20260114083957.9945-1-angelogioacchino.delregno@collabora.com> <20260114083957.9945-10-angelogioacchino.delregno@collabora.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260114083957.9945-10-angelogioacchino.delregno@collabora.com> Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo On Wed, Jan 14, 2026 at 09:39:56AM +0100, AngeloGioacchino Del Regno wrote: > Some Qualcomm PMICs integrate an Current ADC device, reachable > in a specific address range over SPMI. > > Instead of using the parent SPMI device (the main PMIC) as a kind > of syscon in this driver, register a new SPMI sub-device and > initialize its own regmap with this sub-device's specific base > address, retrieved from the devicetree. > > This allows to stop manually adding the register base address to > every R/W call in this driver, as this can be, and is now, handled > by the regmap API instead. > Reviewed-by: Jonathan Cameron > Tested-by: Neil Armstrong # on SM8650-QRD I see these tags, but just again pointing out that max_register in regmap != MAX! It's MAX - 1, i.e. the last *accessible* register. So, I find personally weird the configurations which has 257 registers instead of 256. This can be easily checked when dumping register contents via debugfs. Plus the same comments applies here as I gave previously. -- With Best Regards, Andy Shevchenko