From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DA54F329E5C; Mon, 26 Jan 2026 13:38:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769434711; cv=none; b=BVRSG5p9YHcibfjLrhJFAZke1fUaPSHvrZo3d1jee7CzqxIw2ZYaub4DOH2yeRC9KSWC2pU70E6rOei0uNKjpkoI5PwtYOaOtG0MCO+EQyBf+EBWvGdVckEpDORitIy/e68H1OeUoQRHIHUXQBXTLEcUncZ/4J39Zjr/TnQ8G+g= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769434711; c=relaxed/simple; bh=Be0TIhWmqT/RZLmooeWWhCuzdKF5DM1tcofGzKCBFLQ=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=uQQN060r2iccGRAxvpMvGfLrn5QEMu08+AUeurj9+u7mlzc+Xu9azCxMpoIU+6OjqwBBGz6NNrIRzfCt6iwnZFaYo8n3seN/6WbqF/3iUroKMINS4OjuKuOc1em/NtmLYoicRmbIXAbR4j30bvvUEfXoX9gPcPNJwwJfq80KkYI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=HnFN7xxC; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="HnFN7xxC" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C6D44C116C6; Mon, 26 Jan 2026 13:38:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1769434711; bh=Be0TIhWmqT/RZLmooeWWhCuzdKF5DM1tcofGzKCBFLQ=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=HnFN7xxCUGHYU/3+sQaxZ9Nl3FzCPpEacGee/Z6HBDRkroJODWb7uaEcptZMhQ6AE pAMyjm2CTMeLLPSDVFaXEvUHuvEJiTYYIzyedJOZeIV2VAfRJZ0P15m1J8rHRrrBHj AyYiGe5DEeZFcycx3EOoTwiWmII1Uq1Fz+ZfLTGCCeKbUMAhWz9YP1Y8EavfUBATmZ p7EXqVmT7uAmD73tZ9fqdD3r+YPd8cVFfd7S5w/DX1NwaIfO5/CVRKZuG6Pm7pWaaT WyE+7UmX0rRkIG1zzTRn/UztujhOvq7u3OTAy3q2cKwTUGw33FUJXhN683OKulf41R eaksh+D7eMdEA== Date: Mon, 26 Jan 2026 14:38:22 +0100 From: Lorenzo Pieralisi To: Shivendra Pratap Cc: Florian Fainelli , Krzysztof Kozlowski , Dmitry Baryshkov , Mukesh Ojha , Andre Draszik , Kathiravan Thirumoorthy , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Srinivas Kandagatla , Umang Chheda , Nirmesh Kumar Singh , Song Xue , Arnd Bergmann , Bjorn Andersson , Sebastian Reichel , Rob Herring , Sudeep Holla , Souvik Chakravarty , Krzysztof Kozlowski , Andy Yan , Matthias Brugger , Moritz Fischer , Mark Rutland , Conor Dooley , Konrad Dybcio , Bartosz Golaszewski Subject: Re: [PATCH v19 00/10] Implement PSCI reboot mode driver for PSCI resets Message-ID: References: <20251228-arm-psci-system_reset2-vendor-reboots-v19-0-ebb956053098@oss.qualcomm.com> <2dcd9e3a-0a40-0dfb-29b8-99b70b73a59a@oss.qualcomm.com> <9e9b9faf-7c5d-2e83-a8ac-37afeffd81d4@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <9e9b9faf-7c5d-2e83-a8ac-37afeffd81d4@oss.qualcomm.com> On Sat, Jan 24, 2026 at 04:08:11PM +0530, Shivendra Pratap wrote: > > > On 1/6/2026 4:38 PM, Shivendra Pratap wrote: > > > > > > On 12/28/2025 10:50 PM, Shivendra Pratap wrote: > >> Userspace should be able to initiate device reboots using the various > >> PSCI SYSTEM_RESET and SYSTEM_RESET2 types defined by PSCI spec. This > >> patch series introduces psci-reboot-mode driver that registers with > >> reboot-mode framework to provide this functionality. > >> > >> The PSCI system reset calls takes two arguments: reset_type and cookie. > >> It defines predefined reset types, such as warm and cold reset, and > >> vendor-specific reset types which are SoC vendor specific. To support > >> these requirements, the reboot-mode framework is enhanced in two key > >> ways: > >> 1. 64-bit magic support: Extend reboot-mode to handle two 32-bit > >> arguments (reset_type and cookie) by encoding them into a single 64-bit > >> magic value. > >> 2. Predefined modes: Add support for predefined reboot modes in the > >> framework. > >> > >> With these enhancements, the patch series enables: > >> - Warm reset and cold reset as predefined reboot modes. > >> - Vendor-specific resets exposed as tunables, configurable via the > >> SoC-specific device tree. > >> > >> Together, these changes allow userspace to trigger all above PSCI resets > >> from userspace. > >> > > > > Hi Lorenzo, > > > > Is this patch series now converging towards the design changes you > > proposed in v17? We’d like to conclude the design so we can move it > > towards closure. > > Hi Lorenzo, > > Can you please review if the design aligns with your proposed changes? I will try to do it this week. Thanks, Lorenzo