From: Jon Hunter <jonathanh@nvidia.com>
To: Myeonghun Pak <mhun512@gmail.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Viresh Kumar <viresh.kumar@linaro.org>,
linux-pm@vger.kernel.org
Cc: Thierry Reding <thierry.reding@kernel.org>,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
Ijae Kim <ae878000@gmail.com>
Subject: Re: [PATCH] cpufreq: tegra124: Disable DFLL clock on removal
Date: Fri, 26 Jun 2026 18:18:04 +0100 [thread overview]
Message-ID: <aadb5ad9-a2b8-42fb-bd3e-e0f0e641ce3e@nvidia.com> (raw)
In-Reply-To: <20260626093014.66092-1-mhun512@gmail.com>
On 26/06/2026 10:30, Myeonghun Pak wrote:
> tegra124_cpu_switch_to_dfll() enables the DFLL clock before switching
> the CPU clock parent to it. If cpufreq_dt_pdev_register() fails after
> that point, or when the driver is removed, the driver only drops clock
> references and never disables the enabled DFLL clock.
So after this change, if we successful switch to the DFLL, but we fail
to register the device, we disable the DFLL. That does not sound good
because the CPU will be using that clock at the time. I am not sure what
the value in this change really is.
Jon
--
nvpublic
prev parent reply other threads:[~2026-06-26 17:18 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-26 9:30 [PATCH] cpufreq: tegra124: Disable DFLL clock on removal Myeonghun Pak
2026-06-26 17:18 ` Jon Hunter [this message]
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