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From: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
To: Qian Cai <cai@lca.pw>, "Rafael J. Wysocki" <rafael@kernel.org>
Cc: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
	Chen Yu <yu.c.chen@intel.com>, Len Brown <lenb@kernel.org>,
	Viresh Kumar <viresh.kumar@linaro.org>,
	Borislav Petkov <bp@alien8.de>,
	Thomas Gleixner <tglx@linutronix.de>,
	Linux PM <linux-pm@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: "Force HWP min perf before offline" triggers unchecked MSR access errors
Date: Tue, 29 Oct 2019 15:15:16 -0700	[thread overview]
Message-ID: <aaff9d379a325e5500651ca2f2e2ec7e21c245e3.camel@linux.intel.com> (raw)
In-Reply-To: <53fc01bf9ef25012a1a43b87954b62a02101d85c.camel@linux.intel.com>

[-- Attachment #1: Type: text/plain, Size: 898 bytes --]

On Tue, 2019-10-29 at 15:13 -0700, Srinivas Pandruvada wrote:
> On Tue, 2019-10-29 at 18:01 -0400, Qian Cai wrote:
> > > On Oct 29, 2019, at 5:47 PM, Rafael J. Wysocki <rafael@kernel.org
> > > >
> > > wrote:
> > > 
> > > The MSR_IA32_ENERGY_PERF_BIAS MSR appears to be not present,
> > > which
> > > should be caught by the X86_FEATURE_EPB check in
> > > intel_pstate_set_epb().
> > > 
> > > Do you run this in a guest perchance?
> > 
> > No, it is a baremetal HPE server. The dmesg does say something like
> > energy perf bias changed from performance to normal, and the
> > cpuflag
> > contains epb which I thought that would pass the feature check? I
> > could upload the whole dmesg a bit later if that helps.
> 
> Try the attached change. You have a Skylake server with no EPP
> support.
> This is odd.
> 
Sorry.
Ignore the previous one. It had some unrelated change.

> Thanks,
> Srinivas
> 

[-- Attachment #2: epb_power.diff --]
[-- Type: text/x-patch, Size: 515 bytes --]

diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index 9f02de9a1b47..eab8b048dc9f 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -851,7 +851,7 @@ static void intel_pstate_hwp_force_min_perf(int cpu)
 	if (boot_cpu_has(X86_FEATURE_HWP_EPP))
 		value |= HWP_ENERGY_PERF_PREFERENCE(HWP_EPP_POWERSAVE);
 	else
-		intel_pstate_set_epb(cpu, HWP_EPP_BALANCE_POWERSAVE);
+		intel_pstate_set_epb(cpu, 0x0F);
 
 	wrmsrl_on_cpu(cpu, MSR_HWP_REQUEST, value);
 }

      reply	other threads:[~2019-10-29 22:15 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-29 20:55 "Force HWP min perf before offline" triggers unchecked MSR access errors Qian Cai
2019-10-29 21:47 ` Rafael J. Wysocki
2019-10-29 22:01   ` Qian Cai
2019-10-29 22:13     ` Srinivas Pandruvada
2019-10-29 22:15       ` Srinivas Pandruvada [this message]

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