From: Thomas Gleixner <tglx@linutronix.de>
To: Tim Chen <tim.c.chen@linux.intel.com>
Cc: rjw@rjwysocki.net, mingo@redhat.com, bp@suse.de, x86@kernel.org,
linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-acpi@vger.kernel.org, peterz@infradead.org,
jolsa@redhat.com,
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Subject: Re: [PATCH v6 1/9] sched: Extend scheduler's asym packing
Date: Wed, 26 Oct 2016 20:23:48 +0200 (CEST) [thread overview]
Message-ID: <alpine.DEB.2.20.1610262012330.5013@nanos> (raw)
In-Reply-To: <1477505446.2680.29.camel@linux.intel.com>
[-- Attachment #1: Type: text/plain, Size: 1739 bytes --]
On Wed, 26 Oct 2016, Tim Chen wrote:
> On Wed, 2016-10-26 at 12:27 +0200, Thomas Gleixner wrote:
> > On Thu, 20 Oct 2016, Tim Chen wrote:
> >
> > >
> > > We generalize the scheduler's asym packing to provide an ordering
> > > of the cpu beyond just the cpu number. This allows the use of the
> > > ASYM_PACKING scheduler machinery to move loads to preferred CPU in a
> > > sched domain. The preference is defined with the cpu priority
> > > given by arch_asym_cpu_priority(cpu).
> > >
> > > We also record the most preferred cpu in a sched group when
> > > we build the cpu's capacity for fast lookup of preferred cpu
> > > during load balancing.
> > >
> > > Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
> > > Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
> > > Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
> > This SOB-chain is bogus. Same for all other patches.
> >
>
> I am the primary author of the patch so I have my sign-off on top. There
> were also much internal discussions/reviews between myself, Peter and Srinivas,
> before we post the first version of this patch.
> I incorporated their inputs into the patch and added their sign-offs.
>
> Can you be more explicit on why you think the sign-offs here are bogus?
Because SOB chains document the way a patch takes from the author to the
kernel. The above says:
You authored the patch and sent it to Peter who sent it to Srinivas. So how
does it end up sent from you in my inbox?
We have no formal tag for co developed patches, but it's common practice to
either acknowledge contributions from others in free text form or use a
non-documented tag like 'Co-developed-by:' or 'Co-authored-by:'.
Thanks,
tglx
next prev parent reply other threads:[~2016-10-26 18:26 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-20 21:59 [PATCH v6 0/9] Support Intel® Turbo Boost Max Technology 3.0 Tim Chen
2016-10-20 21:59 ` [PATCH v6 1/9] sched: Extend scheduler's asym packing Tim Chen
2016-10-26 10:27 ` Thomas Gleixner
2016-10-26 18:10 ` Tim Chen
2016-10-26 18:23 ` Thomas Gleixner [this message]
2016-10-20 21:59 ` [PATCH v6 2/9] x86/topology: Provide topology_num_packages() Tim Chen
2016-10-20 21:59 ` [PATCH v6 3/9] x86/topology: Define x86's arch_update_cpu_topology Tim Chen
2016-10-20 21:59 ` [PATCH v6 4/9] x86: Enable Intel Turbo Boost Max Technology 3.0 Tim Chen
2016-10-20 21:59 ` [PATCH v6 5/9] x86/sysctl: Add sysctl for ITMT scheduling feature Tim Chen
2016-10-26 10:49 ` Thomas Gleixner
2016-10-26 11:25 ` Peter Zijlstra
2016-10-26 11:24 ` Thomas Gleixner
2016-10-26 17:23 ` Tim Chen
2016-10-26 18:09 ` Thomas Gleixner
2016-10-27 19:32 ` Tim Chen
2016-10-26 17:59 ` Tim Chen
2016-10-26 10:52 ` Thomas Gleixner
2016-10-26 18:03 ` Tim Chen
2016-10-26 18:11 ` Thomas Gleixner
2016-10-26 19:38 ` Tim Chen
2016-10-20 22:00 ` [PATCH v6 6/9] x86/sched: Add SD_ASYM_PACKING flags to x86 ITMT CPU Tim Chen
2016-10-20 22:00 ` [PATCH v6 7/9] acpi: bus: Enable HWP CPPC objects Tim Chen
2016-10-20 22:00 ` [PATCH v6 8/9] acpi: bus: Set _OSC for diverse core support Tim Chen
2016-10-20 22:00 ` [PATCH v6 9/9] cpufreq: intel_pstate: Use CPPC to get max performance Tim Chen
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