Re: [PATCH] x86/centaur: Mark TSC invariant

[Thomas Gleixner <tglx@linutronix.de>]

On Mon, 15 Jan 2018, TimGuo wrote:

> Centaur CPU has a constant frequency TSC and that TSC does not stop in C-States.
> But because the flags are not set for that CPU, the TSC is treated as non constant
> frequency and assumed to stop in C-States, which makes it an unreliable and unusable
> clock source. Setting those flags tells the kernel that the TSC is usable, so it
> will select it over HPET. The effect of this is that reading time stamps (from kernel
> or userspace) will be faster and more efficient.
> 
> Signed-off-by: TimGuo <timguo@zhaoxin.com>
> ---
>  arch/x86/kernel/cpu/centaur.c | 4 ++++
>  drivers/acpi/processor_idle.c | 1 +
>  2 files changed, 5 insertions(+)
> 
> diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
> index 68bc6d9..c578cd2 100644
> --- a/arch/x86/kernel/cpu/centaur.c
> +++ b/arch/x86/kernel/cpu/centaur.c
> @@ -106,6 +106,10 @@ static void early_init_centaur(struct cpuinfo_x86 *c)
>  #ifdef CONFIG_X86_64
>         set_cpu_cap(c, X86_FEATURE_SYSENTER32);

This is still white space damaged, i.e. TAB is converted to spaces.

Please talk to your IT departement.

Thanks,

	tglx