From: Len Brown <lenb@kernel.org>
To: Matthew Garrett <mjg59@srcf.ucam.org>
Cc: Linux Power Management List <linux-pm@lists.osdl.org>,
linux-pci@vger.kernel.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] intel_idle: PCI quirk to prevent Lenovo Ideapad s10-3 boot hang
Date: Thu, 30 Sep 2010 18:14:35 -0400 (EDT) [thread overview]
Message-ID: <alpine.LFD.2.00.1009301810380.7033@localhost.localdomain> (raw)
In-Reply-To: <20100927135735.GA856@srcf.ucam.org>
> > When the Lenovo Ideapad S10-3 is booted with HT enabled,
> > it hits a boot hang in the intel_idle driver.
> >
> > This occurs when entering ATM-C4 for the first time,
> > unless BM_STS is first cleared.
> >
> > acpi_idle doesn't see this because it first checks
> > and clears BM_STS, but it would hit the same hang
> > if that check were disabled.
>
> If there's hardware that expects BM_STS to be cleared, and if we've
> previously always cleared BM_STS, shouldn't intel_idle be doing the same
> thing?
No, we don't always clear BM_STS with acpi_idle --
we check (and clear) that bit only if the acpi tables
tell us to do so.
BM_STS is a status bit, not a control bit.
It is a surprise that the NM10 chip-set requires that it be cleared --
apparently once at boot time.
No, I don't want intel_idle to know about this chip-set quirk,
and I don't want to add an IO access to the idle hot path
if we can possibly avoid it.
thanks,
Len Brown, Intel Open Source Technology Center
next prev parent reply other threads:[~2010-09-30 22:14 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-09-25 1:26 [PATCH] intel_idle: PCI quirk to prevent Lenovo Ideapad s10-3 boot hang Len Brown
2010-09-27 13:57 ` Matthew Garrett
2010-09-30 22:14 ` Len Brown [this message]
2010-09-30 22:29 ` Matthew Garrett
2010-10-05 5:06 ` Len Brown
2010-10-05 11:40 ` Matthew Garrett
2010-10-16 8:25 ` Len Brown
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