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Tue, 28 Apr 2026 09:27:59 -0700 (PDT) X-Received: by 2002:a05:6a00:4b0c:b0:82c:db50:ef77 with SMTP id d2e1a72fcca58-834ddc950c7mr3689676b3a.49.1777393678617; Tue, 28 Apr 2026 09:27:58 -0700 (PDT) Received: from [192.168.29.31] ([49.43.227.143]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-834daf69297sm2893898b3a.47.2026.04.28.09.27.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Apr 2026 09:27:58 -0700 (PDT) Message-ID: Date: Tue, 28 Apr 2026 21:57:46 +0530 Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v21 04/13] firmware: psci: Introduce command-based with magic To: Sebastian Reichel , Mark Rutland , Lorenzo Pieralisi , "Rafael J. Wysocki" , Daniel Lezcano , Christian Loehle , Ulf Hansson , Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Arnd Bergmann , Souvik Chakravarty , Andy Yan , Matthias Brugger , John Stultz , Moritz Fischer , Bartosz Golaszewski , Sudeep Holla Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Florian Fainelli , Krzysztof Kozlowski , Dmitry Baryshkov , Mukesh Ojha , Andre Draszik , Greg Kroah-Hartman , Kathiravan Thirumoorthy , Srinivas Kandagatla References: <20260427-arm-psci-system_reset2-vendor-reboots-v21-0-dcf937775e73@oss.qualcomm.com> <20260427-arm-psci-system_reset2-vendor-reboots-v21-4-dcf937775e73@oss.qualcomm.com> Content-Language: en-US From: Shivendra Pratap In-Reply-To: <20260427-arm-psci-system_reset2-vendor-reboots-v21-4-dcf937775e73@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=HbIkiCE8 c=1 sm=1 tr=0 ts=69f0e010 cx=c_pps a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=Gpg95E5bJKK5C7oRfY2+2w==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=219khkIK2FHepI9fHIMA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=IoOABgeZipijB_acs4fv:22 X-Proofpoint-ORIG-GUID: FaW9rO9KDJji4OXAAd1MDVGgmbL3WOnk X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDI4MDE1OCBTYWx0ZWRfX7+fEkXrGpK6A IPRHx/Cz2bkuYhEPp9aQoMjdYjHrr90tjnXK74vTideFBvG7b00tOvNT6QDb8m7uNXj0sgLOrNZ ikskcyJxReahriO05ukxeeqCICUiFaMogjbGhEFvayU81RUc9MtV/kwk1ATGuq6RzM4Munis2VT 8t/MQl/AJGufSHEHXxbeAuYLR7q1+yvRqVULbZUdOaScB0I9FThv3TTm4YmCe3oSUnlAFVb/gYV Cvbdr2O5ciqxGqgdZNu2ehgAK/6XlL3ZcodliVtFUFVASJBw4ih0GFTC6lM1ruRmM/qgSpYt+ZM 8qV0qQXqS+eA8SZeE+hCHfDDdb99ldPwN1IFyBpuaKSlz2sTx3ozOaqaLzoHMf1LWmlQ+Q9dTL5 vyyG93KuaZctWa8SRZHDCTZXLx5zHteWYig5ul6c5MabtxSfKZqJH+eMavPTXLrpqipH3+uEvDn YZrYm5fwAY9eRh+jHvA== X-Proofpoint-GUID: FaW9rO9KDJji4OXAAd1MDVGgmbL3WOnk X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-28_05,2026-04-28_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 adultscore=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 spamscore=0 impostorscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604280158 Correction in commit subject - firmware: psci: Introduce command-based resets On 27-04-2026 23:04, Shivendra Pratap wrote: > PSCI currently supports only two resets - SYSTEM_RESET and SYSTEM_RESET2 > ARCH WARM reset. The reset patch is selected based on the Linux > reboot_mode variable. The PSCI specification now includes SYSTEM_RESET2 > for vendor-specific resets but there's no mechanism to issue these > through psci_sys_reset(). > > Add a command-based reset mechanism that allows external drivers to set > the psci reset command via a exported psci_set_reset_cmd() function. > > Define predefined reset_types - PSCI_RESET_TYPE_SYSTEM_RESET to map to > SYSTEM_RESET, and PSCI_RESET_TYPE_SYSTEM_RESET2_ARCH_WARM to map to > SYSTEM_RESET2 arch warm reset. Interpret zero cmd_reset_type, for > predefined reset-command selection via cmd_cookie. For non-zero > cmd_reset_type, check for valid vendor_reset_type and set the psci > reset_command and cookie accordingly. > > Disable PSCI command-based reset by default and treat invalid reset > commands as no‑op. psci_sys_reset() follows its original flow based on > reboot_mode until a reset command is explicitly set by > psci_set_reset_cmd(). In the device reset flow, psci_set_reset_cmd() is > called in reboot_notifier phase and the device reset happens in > psci_sys_reset() which is called later in the restart_notifier phase. If > a kernel panic occurs in between these two phases, the reboot should > take its original flow based on the value of reboot_mode. Disable the > command-based reset in such case. > > Signed-off-by: Shivendra Pratap > --- > drivers/firmware/psci/psci.c | 75 ++++++++++++++++++++++++++++++++++++++++++-- > include/linux/psci.h | 19 +++++++++++ > 2 files changed, 92 insertions(+), 2 deletions(-) > > diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c > index 38ca190d4a22d6e7e0f06420e8478a2b0ec2fe6f..cb37c39e2b4b1d99f0080f6a5cd6c92a070beda8 100644 > --- a/drivers/firmware/psci/psci.c > +++ b/drivers/firmware/psci/psci.c > @@ -51,6 +51,16 @@ static int resident_cpu = -1; > struct psci_operations psci_ops; > static enum arm_smccc_conduit psci_conduit = SMCCC_CONDUIT_NONE; > > +/* > + * Encoded reset command: > + * bits[63:32] = cookie > + * bits[31:0] = reset_type > + */ > +static u64 reset_cmd; > + > +#define PSCI_RESET_TYPE(reset_cmd) ((u32)(reset_cmd)) > +#define PSCI_RESET_COOKIE(reset_cmd) ((u32)((reset_cmd) >> 32)) > + > bool psci_tos_resident_on(int cpu) > { > return cpu == resident_cpu; > @@ -80,6 +90,35 @@ static u32 psci_cpu_suspend_feature; > static bool psci_system_reset2_supported; > static bool psci_system_off2_hibernate_supported; > > +static u32 psci_fn_from_cookie(u32 cookie) > +{ > + switch (cookie) { > + case PSCI_RESET_TYPE_SYSTEM_RESET2_ARCH_WARM: > + if (psci_system_reset2_supported) > + return PSCI_FN_NATIVE(1_1, SYSTEM_RESET2); > + return 0; > + case PSCI_RESET_TYPE_SYSTEM_RESET: > + return PSCI_0_2_FN_SYSTEM_RESET; > + default: > + return 0; > + } > +} > + > +/** psci_set_reset_cmd() - Configure reset request for psci_sys_reset() > + * @psci_reset_cmd: reset command encoded as cookie[63:32] | reset_type[31:0] > + * > + * Save reset command. > + */ > +void psci_set_reset_cmd(u64 psci_reset_cmd) > +{ > + reset_cmd = psci_reset_cmd; > +} > + > +bool psci_has_system_reset2_support(void) > +{ > + return psci_system_reset2_supported; > +} > + > static inline bool psci_has_ext_power_state(void) > { > return psci_cpu_suspend_feature & > @@ -306,8 +345,24 @@ static int get_set_conduit_method(const struct device_node *np) > return 0; > } > > -static int psci_sys_reset(struct notifier_block *nb, unsigned long action, > - void *data) > +static void psci_handle_reset_cmd(void) > +{ > + u32 psci_sys_reset_fn; > + > + if ((reset_cmd & BIT_ULL(31)) && psci_system_reset2_supported) { > + /* PSCI SYSTEM_RESET2 Vendor-specific reset */ > + invoke_psci_fn(PSCI_FN_NATIVE(1_1, SYSTEM_RESET2), > + PSCI_RESET_TYPE(reset_cmd), > + PSCI_RESET_COOKIE(reset_cmd), 0); > + } else { > + /* cookie part of the reset_cmd decides ARCH WARM RESET vs SYSTEM_RESET */ > + psci_sys_reset_fn = psci_fn_from_cookie(PSCI_RESET_COOKIE(reset_cmd)); > + if (!PSCI_RESET_TYPE(reset_cmd) && psci_sys_reset_fn) > + invoke_psci_fn(psci_sys_reset_fn, 0, 0, 0); > + } > +} > + > +static void psci_handle_reboot_mode(void) > { > if ((reboot_mode == REBOOT_WARM || reboot_mode == REBOOT_SOFT) && > psci_system_reset2_supported) { > @@ -320,6 +375,22 @@ static int psci_sys_reset(struct notifier_block *nb, unsigned long action, > } else { > invoke_psci_fn(PSCI_0_2_FN_SYSTEM_RESET, 0, 0, 0); > } > +} > + > +static int psci_sys_reset(struct notifier_block *nb, unsigned long action, > + void *data) > +{ > + /* > + * Command-based resets are configured at the reboot_notifier phase. > + * If a kernel panic occurs between the reboot_notifier and this final > + * reset, ignore the command-based reset and let reboot_mode drive the > + * reset flow. > + * If reset_cmd is zero, there is no command to handle. > + */ > + if (reset_cmd && !panic_in_progress()) > + psci_handle_reset_cmd(); > + else > + psci_handle_reboot_mode(); > > return NOTIFY_DONE; > } > diff --git a/include/linux/psci.h b/include/linux/psci.h > index 4ca0060a3fc42ba1ca751c7862fb4ad8dda35a4c..c2458291a3faf5ac89b1528dae2c9b805a2dd075 100644 > --- a/include/linux/psci.h > +++ b/include/linux/psci.h > @@ -21,6 +21,21 @@ bool psci_power_state_is_valid(u32 state); > int psci_set_osi_mode(bool enable); > bool psci_has_osi_support(void); > > +/** > + * enum psci_reset_type - PSCI_RESET_TYPE for SYSTEM_RESET. > + * @PSCI_RESET_TYPE_SYSTEM_RESET: Standard SYSTEM_RESET command. > + * @PSCI_RESET_TYPE_SYSTEM_RESET2_ARCH_WARM: SYSTEM_RESET2 architectural warm reset. > + * > + * These enum values map PSCI_RESET_TYPE_SYSTEM_* constants to reset strings > + * issued from user space. When user space requests a reset, the cookie > + * carries one of these values, and the PSCI reset path translates it into > + * the appropriate PSCI system reset call. > + */ > +enum psci_reset_type { > + PSCI_RESET_TYPE_SYSTEM_RESET = 1, > + PSCI_RESET_TYPE_SYSTEM_RESET2_ARCH_WARM, > +}; > + > struct psci_operations { > u32 (*get_version)(void); > int (*cpu_suspend)(u32 state, unsigned long entry_point); > @@ -45,8 +60,12 @@ struct psci_0_1_function_ids get_psci_0_1_function_ids(void); > > #if defined(CONFIG_ARM_PSCI_FW) > int __init psci_dt_init(void); > +void psci_set_reset_cmd(u64 psci_reset_cmd); > +bool psci_has_system_reset2_support(void); > #else > static inline int psci_dt_init(void) { return 0; } > +static inline void psci_set_reset_cmd(u64 psci_reset_cmd) { } > +static inline bool psci_has_system_reset2_support(void) { return false; } > #endif > > #if defined(CONFIG_ARM_PSCI_FW) && defined(CONFIG_ACPI) >