From mboxrd@z Thu Jan 1 00:00:00 1970
From: bugzilla-daemon@bugzilla.kernel.org
Subject: [Bug 103351] Machine check exception on Broadwell quad-core with
SpeedStep enabled
Date: Thu, 15 Oct 2015 18:06:36 +0000
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https://bugzilla.kernel.org/show_bug.cgi?id=103351
--- Comment #71 from kernel@benjam.info ---
(In reply to Henrique de Moraes Holschuh from comment #66)
> Assuming the microcode was *really* applied by the early microcode loader
> (please double-check):
It's really being applied by the early microcode loader:
---
[ 0.000000] microcode: CPU0 microcode updated early to revision 0x13, date =
2015-08-03
[ 0.078198] microcode: CPU1 microcode updated early to revision 0x13, date =
2015-08-03
[ 0.096059] microcode: CPU2 microcode updated early to revision 0x13, date =
2015-08-03
[ 0.113892] microcode: CPU3 microcode updated early to revision 0x13, date =
2015-08-03
[ 0.590510] microcode: CPU0 sig=0x40671, pf=0x2, revision=0x13
[ 0.590515] microcode: CPU1 sig=0x40671, pf=0x2, revision=0x13
[ 0.590519] microcode: CPU2 sig=0x40671, pf=0x2, revision=0x13
[ 0.590522] microcode: CPU3 sig=0x40671, pf=0x2, revision=0x13
[ 0.590549] microcode: Microcode Update Driver: v2.00
, Peter Oruba
---
I don't understand it either, and I'm as frustrated as everyone else by the
lack of communication from Intel.
Thanks for the warning about applying the updates after early boot. I still
want to support the normal installation mechanism, because it's easier for some
people, but I'll certainly look into adding more specific disclaimers and
tweaking the way the installation works.
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