PowerOp-x86-centrino-speedstep.patch

[david singleton <dsingleton@mvista.com>]

This patch adds operating points that mirror the CPUFREQ frequency 
table.
It also adds the routine necessary to transition to a new frequency on
the centrino-speedstep.

Each operating point has function pointers to the routines that prepare 
transition,
transition and finish the transition.  For CPUFREQ and Dynamic Power 
Mangement
the prepare and finish transition routines are commonly shared across 
platforms,
and in fact are the same notifier list of functions to call when 
changing to a new
operating point wether the transition comes through the CPUFREQ 
interface or
the PowerOp interface in /sys/power/state.

The transition routine itself is usually platform specific.

David

Signed-Off-by: David Singleton dsingleton@mvista.com

  arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c |  108 
++++++++++++++++++++++
  1 files changed, 108 insertions(+)

Index: linux-2.6.17/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
===================================================================
--- linux-2.6.17.orig/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
+++ linux-2.6.17/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
@@ -20,6 +20,7 @@
  #include <linux/sched.h>       /* current */
  #include <linux/delay.h>
  #include <linux/compiler.h>
+#include <linux/pm.h>

  #ifdef CONFIG_X86_SPEEDSTEP_CENTRINO_ACPI
  #include <linux/acpi.h>
@@ -160,6 +161,80 @@ static struct cpufreq_frequency_table ba
         OP(1400, 1484),
         { .frequency = CPUFREQ_TABLE_END }
  };
+#ifdef CONFIG_PM
+/*
+ * this is the formula for OP.  We need the perfctl
+ * msr value to change to a new frequency.
+ * We'll save it in the machine dependent variable md_data.
+ */
+static void set_perfctl_msr(struct power_op *pm)
+{
+       unsigned int msr = pm->frequency/100;
+       unsigned int v = pm->voltage - 700;
+
+       msr = (unsigned int)(msr << 8);
+       msr |= (unsigned int)(v / 16);
+       pm->md_data = (void *)msr;
+}
+
+static int centrino_transition(struct power_op *cur, struct power_op 
*new);
+
+static struct power_op mhz600 = {
+        .name = "600MHz",
+        .description = "Low Frequency state",
+        .type = PM_FREQ_CHANGE,
+        .frequency = 600,
+        .voltage = 956,
+       .latency = 100,
+       .prepare_transition  = cpufreq_prepare_transition,
+       .transition = centrino_transition,
+       .finish_transition = cpufreq_finish_transition,
+};
+static struct power_op mhz800 = {
+        .name = "800MHz",
+        .description = "Lower Frequency state",
+        .type = PM_FREQ_CHANGE,
+        .frequency = 800,
+        .voltage = 1180,
+       .latency = 100,
+       .prepare_transition  = cpufreq_prepare_transition,
+       .transition = centrino_transition,
+       .finish_transition = cpufreq_finish_transition,
+};
+static struct power_op ghz1 = {
+        .name = "1GHz",
+        .description = "Med Frequency state",
+        .type = PM_FREQ_CHANGE,
+        .frequency = 1000,
+        .voltage = 1308,
+       .latency = 100,
+       .prepare_transition  = cpufreq_prepare_transition,
+       .transition = centrino_transition,
+       .finish_transition = cpufreq_finish_transition,
+};
+static struct power_op ghz12 = {
+        .name = "1.2GHz",
+        .description = "High Frequency state",
+        .type = PM_FREQ_CHANGE,
+        .frequency = 1200,
+        .voltage = 1436,
+       .latency = 100,
+       .prepare_transition  = cpufreq_prepare_transition,
+       .transition = centrino_transition,
+       .finish_transition = cpufreq_finish_transition,
+};
+static struct power_op ghz14 = {
+        .name = "1.4GHz",
+        .description = "Highest Frequency state",
+        .type = PM_FREQ_CHANGE,
+        .frequency = 1400,
+        .voltage = 1484,
+       .latency = 100,
+       .prepare_transition  = cpufreq_prepare_transition,
+       .transition = centrino_transition,
+       .finish_transition = cpufreq_finish_transition,
+};
+#endif

  /* Intel Pentium M processor 1.50GHz (Banias) */
  static struct cpufreq_frequency_table banias_1500[] =
@@ -266,6 +341,19 @@ static int centrino_cpu_init_table(struc
         dprintk("found \"%s\": max frequency: %dkHz\n",
                model->model_name, model->max_freq);

+#ifdef CONFIG_PM
+       list_add_tail(&mhz600.list, &pm_states.list);
+       set_perfctl_msr(&mhz600);
+       list_add_tail(&mhz800.list, &pm_states.list);
+       set_perfctl_msr(&mhz800);
+       list_add_tail(&ghz1.list, &pm_states.list);
+       set_perfctl_msr(&ghz1);
+       list_add_tail(&ghz12.list, &pm_states.list);
+       set_perfctl_msr(&ghz12);
+       list_add_tail(&ghz14.list, &pm_states.list);
+       set_perfctl_msr(&ghz14);
+       current_state = &ghz14;
+#endif
         return 0;
  }

@@ -620,6 +708,26 @@ static int centrino_verify (struct cpufr
         return cpufreq_frequency_table_verify(policy, 
centrino_model[policy->cpu]->op_points);
  }

+static int centrino_transition(struct power_op *cur, struct power_op 
*new)
+{
+       unsigned int msr, oldmsr = 0, h = 0;
+
+       if (cur == new)
+               return 0;
+
+       msr = (unsigned int)new->md_data;
+       rdmsr(MSR_IA32_PERF_CTL, oldmsr, h);
+
+       /* all but 16 LSB are reserved, treat them with care */
+       oldmsr &= ~0xffff;
+       msr &= 0xffff;
+       oldmsr |= msr;
+
+       wrmsr(MSR_IA32_PERF_CTL, oldmsr, h);
+
+       return 0;
+}
+
  /**
   * centrino_setpolicy - set a new CPUFreq policy
   * @policy: new policy