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From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Xi Pardee <xi.pardee@linux.intel.com>
Cc: irenic.rajneesh@gmail.com, david.e.box@linux.intel.com,
	 platform-driver-x86@vger.kernel.org,
	LKML <linux-kernel@vger.kernel.org>,
	 linux-pm@vger.kernel.org
Subject: Re: [PATCH 2/6] platform/x86/intel/pmc: Enable Pkgc blocking residency counter
Date: Fri, 20 Mar 2026 12:27:49 +0200 (EET)	[thread overview]
Message-ID: <c78bc413-d946-9a2e-ec90-670320e3a8a0@linux.intel.com> (raw)
In-Reply-To: <20260302223214.484585-3-xi.pardee@linux.intel.com>

[-- Attachment #1: Type: text/plain, Size: 5133 bytes --]

On Mon, 2 Mar 2026, Xi Pardee wrote:

> Enable the Package C-state blocking counter in the PMT telemetry
> region. This counter reports the number of 10 µs intervals during
> which a Package C-state 10.2/3 entry was blocked for the specified
> reasons.
> 
> Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com>
> ---
>  drivers/platform/x86/intel/pmc/core.c | 27 +++++++++++++++++++++++++++
>  drivers/platform/x86/intel/pmc/core.h |  8 ++++++++
>  2 files changed, 35 insertions(+)
> 
> diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/intel/pmc/core.c
> index bf95a1f2ba428..e5b48a68cf495 100644
> --- a/drivers/platform/x86/intel/pmc/core.c
> +++ b/drivers/platform/x86/intel/pmc/core.c
> @@ -1093,6 +1093,28 @@ static int pmc_core_pkgc_ltr_blocker_show(struct seq_file *s, void *unused)
>  }
>  DEFINE_SHOW_ATTRIBUTE(pmc_core_pkgc_ltr_blocker);
>  
> +static int pmc_core_pkgc_blocker_residency_show(struct seq_file *s, void *unused)
> +{
> +	struct pmc_dev *pmcdev = s->private;
> +	const char **pkgc_blocker_counters;
> +	u32 counter, offset;
> +	unsigned int i;
> +	int ret;
> +
> +	offset = pmcdev->pkgc_blocker_offset;
> +	pkgc_blocker_counters = pmcdev->pkgc_blocker_counters;
> +	for (i = 0; pkgc_blocker_counters[i]; i++, offset++) {
> +		ret = pmt_telem_read32(pmcdev->pc_ep, offset,
> +				       &counter, 1);
> +		if (ret)
> +			return ret;
> +		seq_printf(s, "%-30s %-30u\n", pkgc_blocker_counters[i], counter);
> +	}
> +
> +	return 0;

I wonder if it would be create a common helper as this looks practically 
the same as pmc_core_pkgc_ltr_blocker_show() added in the previous patch?

> +}
> +DEFINE_SHOW_ATTRIBUTE(pmc_core_pkgc_blocker_residency);
> +
>  static int pmc_core_lpm_latch_mode_show(struct seq_file *s, void *unused)
>  {
>  	struct pmc_dev *pmcdev = s->private;
> @@ -1380,6 +1402,8 @@ void pmc_core_punit_pmt_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_de
>  		pmcdev->pc_ep = ep;
>  		pmcdev->pkgc_ltr_blocker_counters = pmc_dev_info->pkgc_ltr_blocker_counters;
>  		pmcdev->pkgc_ltr_blocker_offset = pmc_dev_info->pkgc_ltr_blocker_offset;
> +		pmcdev->pkgc_blocker_counters = pmc_dev_info->pkgc_blocker_counters;
> +		pmcdev->pkgc_blocker_offset = pmc_dev_info->pkgc_blocker_offset;
>  	}
>  
>  release_dev:
> @@ -1512,6 +1536,9 @@ static void pmc_core_dbgfs_register(struct pmc_dev *pmcdev, struct pmc_dev_info
>  		debugfs_create_file("pkgc_ltr_blocker_show", 0444,
>  				    pmcdev->dbgfs_dir, pmcdev,
>  				    &pmc_core_pkgc_ltr_blocker_fops);
> +		debugfs_create_file("pkgc_blocker_residency_show", 0444,
> +				    pmcdev->dbgfs_dir, pmcdev,
> +				    &pmc_core_pkgc_blocker_residency_fops);
>  	}
>  
>  }
> diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h
> index a20aab73c1409..829b1dee3f636 100644
> --- a/drivers/platform/x86/intel/pmc/core.h
> +++ b/drivers/platform/x86/intel/pmc/core.h
> @@ -455,6 +455,8 @@ struct pmc {
>   *
>   * @pkgc_ltr_blocker_counters: Array of PKGC LTR blocker counters
>   * @pkgc_ltr_blocker_offset: Offset to PKGC LTR blockers in telemetry region
> + * @pkgc_blocker_counters: Array of PKGC blocker counters
> + * @pkgc_blocker_offset: Offset to PKGC blocker in telemetry region
>   *
>   * pmc_dev contains info about power management controller device.
>   */
> @@ -480,6 +482,8 @@ struct pmc_dev {
>  
>  	const char **pkgc_ltr_blocker_counters;
>  	u32 pkgc_ltr_blocker_offset;
> +	const char **pkgc_blocker_counters;
> +	u32 pkgc_blocker_offset;
>  };
>  
>  enum pmc_index {
> @@ -495,6 +499,7 @@ enum pmc_index {
>   * @dmu_guids:		List of Die Management Unit GUID
>   * @pc_guid:		GUID for telemetry region to read PKGC blocker info
>   * @pkgc_ltr_blocker_offset: Offset to PKGC LTR blockers in telemetry region
> + * @pkgc_blocker_offset:Offset to PKGC blocker in telemetry region
>   * @regmap_list:	Pointer to a list of pmc_info structure that could be
>   *			available for the platform. When set, this field implies
>   *			SSRAM support.
> @@ -502,6 +507,7 @@ enum pmc_index {
>   *			specific attributes of the primary PMC
>   * @sub_req_show:	File operations to show substate requirements
>   * @pkgc_ltr_blocker_counters: Array of PKGC LTR blocker counters
> + * @pkgc_blocker_counters: Array of PKGC blocker counters
>   * @suspend:		Function to perform platform specific suspend
>   * @resume:		Function to perform platform specific resume
>   * @init:		Function to perform platform specific init action
> @@ -512,10 +518,12 @@ struct pmc_dev_info {
>  	u32 *dmu_guids;
>  	u32 pc_guid;
>  	u32 pkgc_ltr_blocker_offset;
> +	u32 pkgc_blocker_offset;
>  	struct pmc_info *regmap_list;
>  	const struct pmc_reg_map *map;
>  	const struct file_operations *sub_req_show;
>  	const char **pkgc_ltr_blocker_counters;
> +	const char **pkgc_blocker_counters;
>  	void (*suspend)(struct pmc_dev *pmcdev);
>  	int (*resume)(struct pmc_dev *pmcdev);
>  	int (*init)(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_info);
> 

-- 
 i.

  reply	other threads:[~2026-03-20 10:27 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-02 22:32 [PATCH 0/6] Enable NVL support in intel_pmc_core Xi Pardee
2026-03-02 22:32 ` [PATCH 1/6] platform/x86/intel/pmc: Enable PkgC LTR blocking counter Xi Pardee
2026-03-20 10:25   ` Ilpo Järvinen
2026-03-02 22:32 ` [PATCH 2/6] platform/x86/intel/pmc: Enable Pkgc blocking residency counter Xi Pardee
2026-03-20 10:27   ` Ilpo Järvinen [this message]
2026-03-02 22:32 ` [PATCH 3/6] platform/x86/intel/pmc: Use PCI DID for PMC SSRAM device discovery Xi Pardee
2026-03-20 10:45   ` Ilpo Järvinen
2026-03-02 22:32 ` [PATCH 4/6] platform/x86/intel/pmc: Add support for variable DMU offsets Xi Pardee
2026-03-20 10:50   ` Ilpo Järvinen
2026-03-02 22:32 ` [PATCH 5/6] platform/x86/intel/pmc: Retrieve PMC info only for available PMCs Xi Pardee
2026-03-20 10:58   ` Ilpo Järvinen
2026-03-02 22:32 ` [PATCH 6/6] platform/x86/intel/pmc: Add Nova Lake support to intel_pmc_core driver Xi Pardee
2026-03-20 11:08   ` Ilpo Järvinen

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