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From: "Pandruvada, Srinivas" <srinivas.pandruvada@intel.com>
To: "Zhang, Rui" <rui.zhang@intel.com>,
	"daniel.lezcano@linaro.org" <daniel.lezcano@linaro.org>
Cc: "linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>
Subject: Re: powercap ABI clarification
Date: Tue, 28 May 2024 06:40:00 +0000	[thread overview]
Message-ID: <c7c033a64ec6fc2247bf7c922612e6f889c86597.camel@intel.com> (raw)
In-Reply-To: <5cb71aef90ebd2d613f0643446b8a1db049f4d50.camel@intel.com>

On Tue, 2024-05-28 at 04:59 +0000, Zhang, Rui wrote:
> On Mon, 2024-05-27 at 17:50 +0200, Daniel Lezcano wrote:
> > On 27/05/2024 16:19, Zhang, Rui wrote:
> > > On Mon, 2024-05-27 at 14:55 +0200, Daniel Lezcano wrote:
> > > > 
> > > > Hi Srinivas,
> > > > 
> > > > the powercap ABI exports some constraint files. Even if I
> > > > suspect
> > > > their
> > > > semantic it is not really clear how they should behave.
> > > > 
> > > >         │   ├──constraint_0_name
> > > >         │   ├──constraint_0_power_limit_uw
> > > >         │   ├──constraint_0_time_window_us
> > > >         │   ├──constraint_1_name
> > > >         │   ├──constraint_1_power_limit_uw
> > > >         │   ├──constraint_1_time_window_us
> > > > 
> > > > Are the constraints controller specific? I mean, each
> > > > controller
> > > > defines
> > > > their constraints? Or is it supposed to behave the same way
> > > > whatever
> > > > the
> > > > controller?
> > > 
> > > Currently we have three controllers, MSR RAPL, MMIO RAPL and TPMI
> > > RAPL.
> > > They are actually the same feature (RAPL) via different register
> > > Interfaces.
> > > So their behaviors are consistent.
> > 
> > They are consistent because they are RAPL based
> 
> right.
> 
> >  but there are more 
> > controllers, like DTPM and SCMI.
> 
> so you want to deploy constraints support for some of these
> controllers
> or maybe a new controller?
> 
> > 
> > Are the constraints semantic defined or is it up to the backend to 
> > decide the behavior ?
> > 
> I've never thought of this before.
> Maybe we need to understand the new requirement and see if they're
> aligned with current constraints behavior.
> 
Not sure this is specific to RAPL behavior. You have a time window in
which you want to limit to certain power.

Thanks,
Srinivas


> > > > Is the time window giving the duration of the power_limit_uw
> > > > constraint?
> > > > Or is it an average power during this time window?
> > > 
> > > The average power during this time window.
> > > The constraint is always effective after we set it.
> > 
> > Thanks for confirming.
> > 
> > > > What is the purpose of min|max_time_window_us?
> > > 
> > > It is the upper/lower limit for users to set a meaningful time
> > > window.
> > 
> > I'm not sure to get it.
> > 
> > For example, on my laptop, there is:
> > 
> > constraint_0_max_power_uw = 15000000
> > constraint_0_power_limit_uw = 200000000
> > constraint_0_time_windows_us = 31981569
> > constraint_0_name = long_term
> > 
> > There is no constraint_0_max_time_window_us
> 
> because the backend driver (RAPL) doesn't implement the callbacks.
> 
> But I think these sysfs interfaces are designed for this purpose.
> 
> > 
> > How to interpret this constraint 0 ?
> > 
> > What means "long_term" ?
> 
> the meaning of each constraint is per controller.
> 
> On Intel hardware, rapl driver constraint 0 is mapped to RAPL Power
> Limti 1.
> 
> "MSR_PKG_POWER_LIMIT allows a software agent to define power
> limitation
> for the package domain. Power limitation is defined in terms of
> average
> power usage (Watts) over a time window specified in
> NSR_PKG_POWER_LIMIT.
> Two power limits can be specified, corresponding to time windows of
> different sizes. Each power limit provides inde-
> pendent clamping control that would permit the processor cores to go
> below OS-requested state to meet the power
> limits."
> 
> > 
> > Is it possible to give an example ?
> > 
> 
> The PL1 is usually the TDP limitation. When we set constraint 0, the
> package will not run above the specified power.
> 
> > > > Can we set several constraints or are they mutually exclusive?
> > > 
> > > My understanding is that they can both take effect.
> > > "Two power limits can be specified, corresponding to time windows
> > > of
> > > different sizes. Each power limit provides inde-
> > > pendent clamping control that would permit the processor cores to
> > > go
> > > below OS-requested state to meet the power
> > > limits."
> > > 
> > > > 
> > > > Is there any documentation describing with more details the
> > > > ABIs?
> > > > 
> > > Interesting, I just found this one,
> > > Documentation/ABI/testing/sysfs-class-powercap, should we move it
> > > to
> > > stable? Other than that, I don't know.
> > 
> > Yes, I've seen this documentation but it does not really help. It 
> > describes the ABI but fails to give some details. May I refer to
> > the 
> > RAPL documentation to understand the powercap framework ?
> > 
> To better understand how RAPL works, you can download Intel SDM and
> check this section, "15.10 PLATFORM SPECIFIC POWER MANAGEMENT
> SUPPORT".
> 
> Thanks,
> rui


      reply	other threads:[~2024-05-28  6:40 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-27 12:55 powercap ABI clarification Daniel Lezcano
2024-05-27 14:19 ` Zhang, Rui
2024-05-27 15:19   ` Pandruvada, Srinivas
2024-05-27 15:50   ` Daniel Lezcano
2024-05-28  4:59     ` Zhang, Rui
2024-05-28  6:40       ` Pandruvada, Srinivas [this message]

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