[PATCH Resend 0/8] enable x86_energy_perf_policy for AMD CPU

[PATCH Resend 0/8] enable x86_energy_perf_policy for AMD CPU

[Perry Yuan]

Hi all,
This patch series introduces support for the x86_energy_perf_policy utility on AMD processors that
utilize the CPPC (Collaborative Processor Performance Control) interface for frequency scaling,
using the amd_pstate driver module. AMD processors already support various
Energy Performance Preference (EPP) profiles. With this utility, users can now seamlessly
switch between these EPP profiles using the provided commands. And check the CPPC capabilities
with this tool.
This enhancement aims to improve power efficiency and performance management for AMD processors,
providing users with more control over their system's energy-performance behavior.

There are some EPP profile already support by AMD processors, user can
switch EPP profile listed below with the utility commands.

User can change EPP profile like this:
$ sudo x86_energy_perf_policy --hwp-epp performance
$ sudo x86_energy_perf_policy --hwp-epp balance-performance
$ sudo x86_energy_perf_policy --hwp-epp balance_power
$ sudo x86_energy_perf_policy --hwp-epp power

0 performance
128 balance_performance (default)
192 balance_power
255 power


It also supports to check CPPC capabilities and change EPP profiles
at runtime.

$ sudo x86_energy_perf_policy
cpu0: [AMD HWP_REQ]: lowest 13 highest 166 desired 0 epp 128 window 0x7829a7d0 (80*10^7us) use_pkg 87
cpu0: [AMD HWP_CAP]: low 13 lowest_non 68 nominal 77 highest 166

cpu1: [AMD HWP_REQ]: lowest 13 highest 166 desired 0 epp 128 window 0x7829a7d0 (80*10^7us) use_pkg 87
cpu1: [AMD HWP_CAP]: low 13 lowest_non 68 nominal 77 highest 166

cpu2: [AMD HWP_REQ]: lowest 13 highest 166 desired 0 epp 128 window 0x7829a7d0 (80*10^7us) use_pkg 87
cpu2: [AMD HWP_CAP]: low 13 lowest_non 68 nominal 77 highest 166

cpu3: [AMD HWP_REQ]: lowest 13 highest 166 desired 0 epp 128 window 0x7829a7d0 (80*10^7us) use_pkg 87
cpu3: [AMD HWP_CAP]: low 13 lowest_non 68 nominal 77 highest 166

cpu4: [AMD HWP_REQ]: lowest 13 highest 166 desired 0 epp 128 window 0x7829a7d0 (80*10^7us) use_pkg 87
cpu4: [AMD HWP_CAP]: low 13 lowest_non 68 nominal 77 highest 166

Your feedback and review effort are greatly appreciated!

Perry.

Perry Yuan (8):
  tools/power x86_energy_perf_policy: add info show support for AMD
    Pstate EPP driver
  tools/power x86_energy_perf_policy: enable AMD pstate EPP profile
    switching on MSR based system
  tools/power x86_energy_perf_policy: rename get_msr() and put_msr()
    with intel prefix
  tools/power x86_energy_perf_policy: rename get_cpuid_or_exit() with
    intel prefix
  tools/power x86_energy_perf_policy: add nominal and lowest nonlinear
    perf values showing support
  tools/power x86_energy_perf_policy: remove the invalid feature options
    for AMD processors
  tools/power x86_energy_perf_policy: rename some perf output strings
    for AMD processors
  tools/power x86_energy_perf_policy: change intel msr functions to be
    static

 .../x86_energy_perf_policy.c                  | 355 +++++++++++++-----
 1 file changed, 271 insertions(+), 84 deletions(-)

-- 
2.34.1

[PATCH Resend 1/8] tools/power x86_energy_perf_policy: add info show support for AMD Pstate EPP driver

[Perry Yuan]

From: Perry Yuan <Perry.Yuan@amd.com>

With the amd pstate epp driver implemented, the x86_energy_perf_policy
will need to implemented the utility support to display hardware energy
and performance policy hint information on the AMD processors.

Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>
---
 .../x86_energy_perf_policy.c                  | 211 ++++++++++++++----
 1 file changed, 167 insertions(+), 44 deletions(-)

diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
index 5fd9e594079c..5daf1c2bb601 100644
--- a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
+++ b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
@@ -76,6 +76,8 @@ unsigned long long pkg_selected_set;
 cpu_set_t *cpu_present_set;
 cpu_set_t *cpu_selected_set;
 int genuine_intel;
+unsigned int authentic_amd;
+unsigned int max_level;
 
 size_t cpu_setsize;
 
@@ -724,6 +726,53 @@ int put_msr(int cpu, int offset, unsigned long long new_msr)
 	return 0;
 }
 
+static int amd_put_msr(int cpu, off_t offset, unsigned long msr)
+{
+	ssize_t retval;
+	int fd;
+	char pathname[32];
+
+	sprintf(pathname, "/dev/cpu/%d/msr", cpu);
+	fd = open(pathname, O_RDWR);
+	if (fd < 0) {
+		err(-EACCES, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
+		goto out;
+	}
+	retval = pwrite(fd, &msr, sizeof(msr), offset);
+	if (retval != sizeof(msr))
+		err(-EFAULT, "cpu%d: msr offset 0x%lx write failed ret = %ld fd = %d", cpu, (unsigned long)offset, retval, fd);
+
+	if (debug > 1)
+		fprintf(stderr, "amd_put_msr(cpu%d, 0x%lx, 0x%lX)\n", cpu, offset, msr);
+
+	close(fd);
+
+out:
+	return (retval == sizeof(msr)) ? 0 : -1;;
+}
+
+
+static int amd_get_msr(int cpu, off_t offset, unsigned long *msr)
+{
+	ssize_t retval;
+	char pathname[32];
+	int fd;
+
+	sprintf(pathname, "/dev/cpu/%d/msr", cpu);
+	fd = open(pathname, O_RDONLY);
+	if (fd < 0) {
+		err(-EACCES, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
+		goto out;
+	}
+	retval = pread(fd, msr, sizeof(*msr), offset);
+	if (retval != sizeof *msr)
+		err(-EFAULT, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
+
+	close(fd);
+out:
+	return (retval == sizeof *msr) ? 0 : -1;;
+}
+
 static unsigned int read_sysfs(const char *path, char *buf, size_t buflen)
 {
 	ssize_t numread;
@@ -777,13 +826,21 @@ void print_hwp_cap(int cpu, struct msr_hwp_cap *cap, char *str)
 void read_hwp_cap(int cpu, struct msr_hwp_cap *cap, unsigned int msr_offset)
 {
 	unsigned long long msr;
+	int ret;
 
-	get_msr(cpu, msr_offset, &msr);
-
-	cap->highest = msr_perf_2_ratio(HWP_HIGHEST_PERF(msr));
-	cap->guaranteed = msr_perf_2_ratio(HWP_GUARANTEED_PERF(msr));
-	cap->efficient = msr_perf_2_ratio(HWP_MOSTEFFICIENT_PERF(msr));
-	cap->lowest = msr_perf_2_ratio(HWP_LOWEST_PERF(msr));
+	if (genuine_intel) {
+		get_msr(cpu, msr_offset, &msr);
+		cap->highest = msr_perf_2_ratio(HWP_HIGHEST_PERF(msr));
+		cap->guaranteed = msr_perf_2_ratio(HWP_GUARANTEED_PERF(msr));
+		cap->efficient = msr_perf_2_ratio(HWP_MOSTEFFICIENT_PERF(msr));
+		cap->lowest = msr_perf_2_ratio(HWP_LOWEST_PERF(msr));
+	} else if (authentic_amd) {
+		ret = amd_get_msr(cpu, msr_offset, (unsigned long *)(&msr));
+		if (ret < 0)
+			errx(-1, "failed to get msr with return %d", ret);
+		cap->highest = msr_perf_2_ratio(AMD_CPPC_HIGHEST_PERF(msr));
+		cap->lowest = msr_perf_2_ratio(AMD_CPPC_LOWEST_PERF(msr));
+	}
 }
 
 void print_hwp_request(int cpu, struct msr_hwp_request *h, char *str)
@@ -812,15 +869,27 @@ void print_hwp_request_pkg(int pkg, struct msr_hwp_request *h, char *str)
 void read_hwp_request(int cpu, struct msr_hwp_request *hwp_req, unsigned int msr_offset)
 {
 	unsigned long long msr;
+	int ret;
 
-	get_msr(cpu, msr_offset, &msr);
-
-	hwp_req->hwp_min = msr_perf_2_ratio((((msr) >> 0) & 0xff));
-	hwp_req->hwp_max = msr_perf_2_ratio((((msr) >> 8) & 0xff));
-	hwp_req->hwp_desired = msr_perf_2_ratio((((msr) >> 16) & 0xff));
-	hwp_req->hwp_epp = (((msr) >> 24) & 0xff);
-	hwp_req->hwp_window = (((msr) >> 32) & 0x3ff);
-	hwp_req->hwp_use_pkg = (((msr) >> 42) & 0x1);
+	if (genuine_intel) {
+		get_msr(cpu, msr_offset, &msr);
+
+		hwp_req->hwp_min = msr_perf_2_ratio((((msr) >> 0) & 0xff));
+		hwp_req->hwp_max = msr_perf_2_ratio((((msr) >> 8) & 0xff));
+		hwp_req->hwp_desired = msr_perf_2_ratio((((msr) >> 16) & 0xff));
+		hwp_req->hwp_epp = (((msr) >> 24) & 0xff);
+		hwp_req->hwp_window = (((msr) >> 32) & 0x3ff);
+		hwp_req->hwp_use_pkg = (((msr) >> 42) & 0x1);
+	} else if (authentic_amd) {
+		ret = amd_get_msr(cpu, msr_offset, (unsigned long *)(&msr));
+		if (ret < 0)
+			errx(-1, "failed to get msr with return %d", ret);
+		hwp_req->hwp_min = msr_perf_2_ratio((((msr) >> 8) & 0xff));
+		hwp_req->hwp_max = msr_perf_2_ratio((((msr) >> 0) & 0xff));
+
+		hwp_req->hwp_desired = msr_perf_2_ratio((((msr) >> 16) & 0xff));
+		hwp_req->hwp_epp = (((msr) >> 24) & 0xff);
+	}
 }
 
 void write_hwp_request(int cpu, struct msr_hwp_request *hwp_req, unsigned int msr_offset)
@@ -895,18 +964,28 @@ int print_cpu_msrs(int cpu)
 	struct msr_hwp_cap cap;
 	int epb;
 
-	epb = get_epb(cpu);
-	if (epb >= 0)
-		printf("cpu%d: EPB %u\n", cpu, (unsigned int) epb);
+	if (genuine_intel) {
+		epb = get_epb(cpu);
+		if (epb >= 0)
+			printf("cpu%d: EPB %u\n", cpu, (unsigned int) epb);
+	}
 
 	if (!has_hwp)
 		return 0;
 
-	read_hwp_request(cpu, &req, MSR_HWP_REQUEST);
-	print_hwp_request(cpu, &req, "");
+	if (genuine_intel) {
+		read_hwp_request(cpu, &req, MSR_HWP_REQUEST);
+		print_hwp_request(cpu, &req, "");
 
-	read_hwp_cap(cpu, &cap, MSR_HWP_CAPABILITIES);
-	print_hwp_cap(cpu, &cap, "");
+		read_hwp_cap(cpu, &cap, MSR_HWP_CAPABILITIES);
+		print_hwp_cap(cpu, &cap, "");
+	} else if (authentic_amd) {
+		read_hwp_request(cpu, &req, MSR_AMD_CPPC_REQ);//MSR_HWP_REQUEST
+		print_hwp_request(cpu, &req, "");
+
+		read_hwp_cap(cpu, &cap, MSR_AMD_CPPC_CAP1);//MSR_HWP_CAPABILITIES
+		print_hwp_cap(cpu, &cap, "");
+	}
 
 	return 0;
 }
@@ -1330,12 +1409,19 @@ void init_data_structures(void)
 void verify_hwp_is_enabled(void)
 {
 	unsigned long long msr;
+	int ret;
 
 	if (!has_hwp)	/* set in early_cpuid() */
 		return;
 
 	/* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
-	get_msr(base_cpu, MSR_PM_ENABLE, &msr);
+	if (genuine_intel)
+		get_msr(base_cpu, MSR_PM_ENABLE, &msr);
+	else if (authentic_amd) {
+		ret = amd_get_msr(base_cpu, MSR_AMD_CPPC_ENABLE, (unsigned long *)(&msr));
+		if (ret < 0)
+			errx(-1, "failed to get msr with return %d", ret);
+	}
 	if ((msr & 1) == 0) {
 		fprintf(stderr, "HWP can be enabled using '--hwp-enable'\n");
 		has_hwp = 0;
@@ -1398,6 +1484,17 @@ static void get_cpuid_or_exit(unsigned int leaf,
 		errx(1, "Processor not supported\n");
 }
 
+static void amd_get_cpuid_or_exit(unsigned int leaf,
+			     unsigned int *eax, unsigned int *ebx,
+			     unsigned int *ecx, unsigned int *edx)
+{
+	unsigned int leaf_index;
+
+	leaf_index =  leaf | 0x80000000;
+	if (!__get_cpuid(leaf_index, eax, ebx, ecx, edx))
+		errx(1, "Processor not supported\n");
+}
+
 /*
  * early_cpuid()
  * initialize turbo_is_enabled, has_hwp, has_epb
@@ -1408,24 +1505,39 @@ void early_cpuid(void)
 	unsigned int eax, ebx, ecx, edx;
 	unsigned int fms, family, model;
 
-	get_cpuid_or_exit(1, &fms, &ebx, &ecx, &edx);
-	family = (fms >> 8) & 0xf;
-	model = (fms >> 4) & 0xf;
-	if (family == 6 || family == 0xf)
-		model += ((fms >> 16) & 0xf) << 4;
+	eax = ebx = ecx = edx = 0;
+	__cpuid(0, max_level, ebx, ecx, edx);
+	if (ebx == 0x756e6547 && ecx == 0x6c65746e && edx == 0x49656e69)
+		genuine_intel = 1;
+	else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
+		authentic_amd = 1;
 
-	if (model == 0x4F) {
-		unsigned long long msr;
+	if (genuine_intel) {
+		get_cpuid_or_exit(1, &fms, &ebx, &ecx, &edx);
+		family = (fms >> 8) & 0xf;
+		model = (fms >> 4) & 0xf;
+		if (family == 6 || family == 0xf)
+			model += ((fms >> 16) & 0xf) << 4;
 
-		get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
+		if (model == 0x4F) {
+			unsigned long long msr;
 
-		bdx_highest_ratio = msr & 0xFF;
-	}
+			get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
+
+			bdx_highest_ratio = msr & 0xFF;
+		}
 
-	get_cpuid_or_exit(0x6, &eax, &ebx, &ecx, &edx);
-	turbo_is_enabled = (eax >> 1) & 1;
-	has_hwp = (eax >> 7) & 1;
-	has_epb = (ecx >> 3) & 1;
+		get_cpuid_or_exit(0x6, &eax, &ebx, &ecx, &edx);
+		turbo_is_enabled = (eax >> 1) & 1;
+		has_hwp = (eax >> 7) & 1;
+		has_epb = (ecx >> 3) & 1;
+	} else if (authentic_amd) {
+		/* AMD Processors CPUID info */
+		amd_get_cpuid_or_exit(0x8, &eax, &ebx, &ecx, &edx);
+		turbo_is_enabled = (eax >> 1) & 1;
+		has_hwp = (ebx >> 27) & 1;
+		has_hwp_epp = (ebx >> 27) & 1;
+	}
 }
 
 /*
@@ -1444,6 +1556,8 @@ void parse_cpuid(void)
 
 	if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
 		genuine_intel = 1;
+	else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
+		authentic_amd = 1;
 
 	if (debug)
 		fprintf(stderr, "CPUID(0): %.4s%.4s%.4s ",
@@ -1456,6 +1570,11 @@ void parse_cpuid(void)
 	if (family == 6 || family == 0xf)
 		model += ((fms >> 16) & 0xf) << 4;
 
+	if (authentic_amd) {
+		if (family == 0xf)
+			family += (fms >> 20) & 0xff;
+	}
+
 	if (debug) {
 		fprintf(stderr, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
 			max_level, family, model, stepping, family, model, stepping);
@@ -1473,14 +1592,18 @@ void parse_cpuid(void)
 	if (!(edx & (1 << 5)))
 		errx(1, "CPUID: no MSR");
 
-
-	get_cpuid_or_exit(0x6, &eax, &ebx, &ecx, &edx);
-	/* turbo_is_enabled already set */
-	/* has_hwp already set */
-	has_hwp_notify = eax & (1 << 8);
-	has_hwp_activity_window = eax & (1 << 9);
-	has_hwp_epp = eax & (1 << 10);
-	has_hwp_request_pkg = eax & (1 << 11);
+	if (genuine_intel) {
+		get_cpuid_or_exit(0x6, &eax, &ebx, &ecx, &edx);
+		/* turbo_is_enabled already set */
+		/* has_hwp already set */
+		has_hwp_notify = eax & (1 << 8);
+		has_hwp_activity_window = eax & (1 << 9);
+		has_hwp_epp = eax & (1 << 10);
+		has_hwp_request_pkg = eax & (1 << 11);
+	} else if (authentic_amd) {
+		amd_get_cpuid_or_exit(0x8, &eax, &ebx, &ecx, &edx);
+		has_hwp_epp = (ebx >> 27) & 1;
+	}
 
 	if (!has_hwp_request_pkg && update_hwp_use_pkg)
 		errx(1, "--hwp-use-pkg is not available on this hardware");
-- 
2.34.1

[PATCH Resend 2/8] tools/power x86_energy_perf_policy: enable AMD pstate EPP profile switching on MSR based system

[Perry Yuan]

From: Perry Yuan <Perry.Yuan@amd.com>

x86_energy_perf_policy adds AMD EPP profiles switch support,the EPP
driver also has four EPP profiles implemented under power
firmware autonomous mode.
(performance, balance-performance, balance-power, power)
User can choose the new profile to use with this utility support while
`amd_pstate_epp` driver instance loaded for the MSR support systems.

for example:
$ sudo x86_energy_perf_policy -d --hwp-epp balance-performance
cpu0: old: HWP_REQ: min 13 max 166 des 0 epp 128 window 0x9 (9*10^0us) use_pkg 0
cpu0: HWP_CAP: low 13 eff 157 guar 0 high 231
cpu0: new: HWP_REQ: min 13 max 166 des 0 epp 128 window 0x9 (9*10^0us) use_pkg 0
cpu1: old: HWP_REQ: min 13 max 166 des 0 epp 128 window 0x9 (9*10^0us) use_pkg 0
cpu1: HWP_CAP: low 13 eff 157 guar 0 high 236
cpu1: new: HWP_REQ: min 13 max 166 des 0 epp 128 window 0x9 (9*10^0us) use_pkg 0
cpu2: old: HWP_REQ: min 13 max 166 des 0 epp 128 window 0x9 (9*10^0us) use_pkg 0
cpu2: HWP_CAP: low 13 eff 157 guar 0 high 211
cpu2: new: HWP_REQ: min 13 max 166 des 0 epp 128 window 0x9 (9*10^0us) use_pkg 0
cpu3: old: HWP_REQ: min 13 max 166 des 0 epp 128 window 0x9 (9*10^0us) use_pkg 0
cpu3: HWP_CAP: low 13 eff 157 guar 0 high 206
cpu3: new: HWP_REQ: min 13 max 166 des 0 epp 128 window 0x9 (9*10^0us) use_pkg 0

Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>
---
 .../x86_energy_perf_policy.c                  | 69 +++++++++++++++----
 1 file changed, 54 insertions(+), 15 deletions(-)

diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
index 5daf1c2bb601..da9087873915 100644
--- a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
+++ b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
@@ -902,14 +902,23 @@ void write_hwp_request(int cpu, struct msr_hwp_request *hwp_req, unsigned int ms
 			hwp_req->hwp_desired, hwp_req->hwp_epp,
 			hwp_req->hwp_window, hwp_req->hwp_use_pkg);
 
-	msr |= HWP_MIN_PERF(ratio_2_msr_perf(hwp_req->hwp_min));
-	msr |= HWP_MAX_PERF(ratio_2_msr_perf(hwp_req->hwp_max));
-	msr |= HWP_DESIRED_PERF(ratio_2_msr_perf(hwp_req->hwp_desired));
-	msr |= HWP_ENERGY_PERF_PREFERENCE(hwp_req->hwp_epp);
-	msr |= HWP_ACTIVITY_WINDOW(hwp_req->hwp_window);
-	msr |= HWP_PACKAGE_CONTROL(hwp_req->hwp_use_pkg);
-
-	put_msr(cpu, msr_offset, msr);
+	if (genuine_intel) {
+		msr |= HWP_MIN_PERF(ratio_2_msr_perf(hwp_req->hwp_min));
+		msr |= HWP_MAX_PERF(ratio_2_msr_perf(hwp_req->hwp_max));
+		msr |= HWP_DESIRED_PERF(ratio_2_msr_perf(hwp_req->hwp_desired));
+		msr |= HWP_ENERGY_PERF_PREFERENCE(hwp_req->hwp_epp);
+		msr |= HWP_ACTIVITY_WINDOW(hwp_req->hwp_window);
+		msr |= HWP_PACKAGE_CONTROL(hwp_req->hwp_use_pkg);
+		put_msr(cpu, msr_offset, msr);
+	} else if (authentic_amd) {
+		/* AMD EPP need to set desired perf with zero */
+		hwp_req->hwp_desired = 0;
+		msr |= AMD_CPPC_MIN_PERF(hwp_req->hwp_min);
+		msr |= AMD_CPPC_MAX_PERF(hwp_req->hwp_max);
+		msr |= AMD_CPPC_DES_PERF(hwp_req->hwp_desired);
+		msr |= AMD_CPPC_ENERGY_PERF_PREF(hwp_req->hwp_epp);
+		amd_put_msr(cpu, msr_offset, (unsigned int)msr);
+	}
 }
 
 static int get_epb(int cpu)
@@ -1157,8 +1166,12 @@ int update_hwp_request(int cpu)
 {
 	struct msr_hwp_request req;
 	struct msr_hwp_cap cap;
+	int msr_offset = 0;
 
-	int msr_offset = MSR_HWP_REQUEST;
+	if (genuine_intel)
+		msr_offset = MSR_HWP_REQUEST;
+	else if (authentic_amd)
+		msr_offset = MSR_AMD_CPPC_REQ;
 
 	read_hwp_request(cpu, &req, msr_offset);
 	if (debug)
@@ -1181,7 +1194,11 @@ int update_hwp_request(int cpu)
 
 	req.hwp_use_pkg = req_update.hwp_use_pkg;
 
-	read_hwp_cap(cpu, &cap, MSR_HWP_CAPABILITIES);
+	if (genuine_intel)
+		read_hwp_cap(cpu, &cap, MSR_HWP_CAPABILITIES);
+	else if (authentic_amd)
+		read_hwp_cap(cpu, &cap, MSR_AMD_CPPC_CAP1);
+
 	if (debug)
 		print_hwp_cap(cpu, &cap, "");
 
@@ -1203,8 +1220,12 @@ int update_hwp_request_pkg(int pkg)
 	struct msr_hwp_request req;
 	struct msr_hwp_cap cap;
 	int cpu = first_cpu_in_pkg[pkg];
+	int msr_offset = 0;
 
-	int msr_offset = MSR_HWP_REQUEST_PKG;
+	if (genuine_intel)
+		msr_offset = MSR_HWP_REQUEST_PKG;
+	else if (authentic_amd)
+		msr_offset = MSR_AMD_CPPC_REQ;
 
 	read_hwp_request(cpu, &req, msr_offset);
 	if (debug)
@@ -1225,7 +1246,11 @@ int update_hwp_request_pkg(int pkg)
 	if (update_hwp_epp)
 		req.hwp_epp = req_update.hwp_epp;
 
-	read_hwp_cap(cpu, &cap, MSR_HWP_CAPABILITIES);
+	if (genuine_intel)
+		read_hwp_cap(cpu, &cap, MSR_HWP_CAPABILITIES);
+	else if (authentic_amd)
+		read_hwp_cap(cpu, &cap, MSR_AMD_CPPC_CAP1);
+
 	if (debug)
 		print_hwp_cap(cpu, &cap, "");
 
@@ -1246,13 +1271,27 @@ int update_hwp_request_pkg(int pkg)
 int enable_hwp_on_cpu(int cpu)
 {
 	unsigned long long msr;
+	int ret;
+
+	if (genuine_intel) {
+		get_msr(cpu, MSR_PM_ENABLE, &msr);
+		put_msr(cpu, MSR_PM_ENABLE, 1);
+	} else if (authentic_amd) {
+		ret = amd_get_msr(cpu, MSR_AMD_CPPC_ENABLE, (unsigned long *)(&msr));
+		if (ret < 0)
+			errx(-1, "failed to get msr with return %d", ret);
 
-	get_msr(cpu, MSR_PM_ENABLE, &msr);
-	put_msr(cpu, MSR_PM_ENABLE, 1);
+		ret = amd_put_msr(cpu, MSR_AMD_CPPC_ENABLE, 1);
+		if (ret < 0)
+			errx(-1, "failed to put msr with return %d", ret);
+	}
 
-	if (verbose)
+	if (verbose && genuine_intel)
 		printf("cpu%d: MSR_PM_ENABLE old: %d new: %d\n", cpu, (unsigned int) msr, 1);
 
+	if (verbose && authentic_amd)
+		printf("cpu%d: MSR_AMD_CPPC_ENABLE old: %d new: %d\n", cpu, (unsigned int) msr, 1);
+
 	return 0;
 }
 
-- 
2.34.1

[PATCH Resend 3/8] tools/power x86_energy_perf_policy: rename get_msr() and put_msr() with intel prefix

[Perry Yuan]

From: Perry Yuan <Perry.Yuan@amd.com>

Rename the get_msr() and put_msr() function with Intel prefix,that will
better help to differentiate with other processor msr operation.

No functional impact.

Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>
Suggested-by: Fontenot Nathan <Nathan.Fontenot@amd.com>
---
 .../x86_energy_perf_policy.c                  | 32 +++++++++----------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
index da9087873915..3f09c12f24fa 100644
--- a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
+++ b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
@@ -679,7 +679,7 @@ void err_on_hypervisor(void)
 		    "not supported on this virtual machine");
 }
 
-int get_msr(int cpu, int offset, unsigned long long *msr)
+int intel_get_msr(int cpu, int offset, unsigned long long *msr)
 {
 	int retval;
 	char pathname[32];
@@ -697,13 +697,13 @@ int get_msr(int cpu, int offset, unsigned long long *msr)
 	}
 
 	if (debug > 1)
-		fprintf(stderr, "get_msr(cpu%d, 0x%X, 0x%llX)\n", cpu, offset, *msr);
+		fprintf(stderr, "intel_get_msr(cpu%d, 0x%X, 0x%llX)\n", cpu, offset, *msr);
 
 	close(fd);
 	return 0;
 }
 
-int put_msr(int cpu, int offset, unsigned long long new_msr)
+int intel_put_msr(int cpu, int offset, unsigned long long new_msr)
 {
 	char pathname[32];
 	int retval;
@@ -721,7 +721,7 @@ int put_msr(int cpu, int offset, unsigned long long new_msr)
 	close(fd);
 
 	if (debug > 1)
-		fprintf(stderr, "put_msr(cpu%d, 0x%X, 0x%llX)\n", cpu, offset, new_msr);
+		fprintf(stderr, "intel_put_msr(cpu%d, 0x%X, 0x%llX)\n", cpu, offset, new_msr);
 
 	return 0;
 }
@@ -829,7 +829,7 @@ void read_hwp_cap(int cpu, struct msr_hwp_cap *cap, unsigned int msr_offset)
 	int ret;
 
 	if (genuine_intel) {
-		get_msr(cpu, msr_offset, &msr);
+		intel_get_msr(cpu, msr_offset, &msr);
 		cap->highest = msr_perf_2_ratio(HWP_HIGHEST_PERF(msr));
 		cap->guaranteed = msr_perf_2_ratio(HWP_GUARANTEED_PERF(msr));
 		cap->efficient = msr_perf_2_ratio(HWP_MOSTEFFICIENT_PERF(msr));
@@ -872,7 +872,7 @@ void read_hwp_request(int cpu, struct msr_hwp_request *hwp_req, unsigned int msr
 	int ret;
 
 	if (genuine_intel) {
-		get_msr(cpu, msr_offset, &msr);
+		intel_get_msr(cpu, msr_offset, &msr);
 
 		hwp_req->hwp_min = msr_perf_2_ratio((((msr) >> 0) & 0xff));
 		hwp_req->hwp_max = msr_perf_2_ratio((((msr) >> 8) & 0xff));
@@ -909,7 +909,7 @@ void write_hwp_request(int cpu, struct msr_hwp_request *hwp_req, unsigned int ms
 		msr |= HWP_ENERGY_PERF_PREFERENCE(hwp_req->hwp_epp);
 		msr |= HWP_ACTIVITY_WINDOW(hwp_req->hwp_window);
 		msr |= HWP_PACKAGE_CONTROL(hwp_req->hwp_use_pkg);
-		put_msr(cpu, msr_offset, msr);
+		intel_put_msr(cpu, msr_offset, msr);
 	} else if (authentic_amd) {
 		/* AMD EPP need to set desired perf with zero */
 		hwp_req->hwp_desired = 0;
@@ -1011,14 +1011,14 @@ int print_pkg_msrs(int pkg)
 	print_hwp_request_pkg(pkg, &req, "");
 
 	if (has_hwp_notify) {
-		get_msr(first_cpu_in_pkg[pkg], MSR_HWP_INTERRUPT, &msr);
+		intel_get_msr(first_cpu_in_pkg[pkg], MSR_HWP_INTERRUPT, &msr);
 		fprintf(stderr,
 		"pkg%d: MSR_HWP_INTERRUPT: 0x%08llx (Excursion_Min-%sabled, Guaranteed_Perf_Change-%sabled)\n",
 		pkg, msr,
 		((msr) & 0x2) ? "EN" : "Dis",
 		((msr) & 0x1) ? "EN" : "Dis");
 	}
-	get_msr(first_cpu_in_pkg[pkg], MSR_HWP_STATUS, &msr);
+	intel_get_msr(first_cpu_in_pkg[pkg], MSR_HWP_STATUS, &msr);
 	fprintf(stderr,
 		"pkg%d: MSR_HWP_STATUS: 0x%08llx (%sExcursion_Min, %sGuaranteed_Perf_Change)\n",
 		pkg, msr,
@@ -1274,8 +1274,8 @@ int enable_hwp_on_cpu(int cpu)
 	int ret;
 
 	if (genuine_intel) {
-		get_msr(cpu, MSR_PM_ENABLE, &msr);
-		put_msr(cpu, MSR_PM_ENABLE, 1);
+		intel_get_msr(cpu, MSR_PM_ENABLE, &msr);
+		intel_put_msr(cpu, MSR_PM_ENABLE, 1);
 	} else if (authentic_amd) {
 		ret = amd_get_msr(cpu, MSR_AMD_CPPC_ENABLE, (unsigned long *)(&msr));
 		if (ret < 0)
@@ -1312,14 +1312,14 @@ int update_cpu_msrs(int cpu)
 	if (update_turbo) {
 		int turbo_is_present_and_disabled;
 
-		get_msr(cpu, MSR_IA32_MISC_ENABLE, &msr);
+		intel_get_msr(cpu, MSR_IA32_MISC_ENABLE, &msr);
 
 		turbo_is_present_and_disabled = ((msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE) != 0);
 
 		if (turbo_update_value == 1)	{
 			if (turbo_is_present_and_disabled) {
 				msr &= ~MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
-				put_msr(cpu, MSR_IA32_MISC_ENABLE, msr);
+				intel_put_msr(cpu, MSR_IA32_MISC_ENABLE, msr);
 				if (verbose)
 					printf("cpu%d: turbo ENABLE\n", cpu);
 			}
@@ -1330,7 +1330,7 @@ int update_cpu_msrs(int cpu)
 			 * but cpu may be in a different package, so we always write.
 			 */
 			msr |= MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
-			put_msr(cpu, MSR_IA32_MISC_ENABLE, msr);
+			intel_put_msr(cpu, MSR_IA32_MISC_ENABLE, msr);
 			if (verbose)
 				printf("cpu%d: turbo DISABLE\n", cpu);
 		}
@@ -1455,7 +1455,7 @@ void verify_hwp_is_enabled(void)
 
 	/* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
 	if (genuine_intel)
-		get_msr(base_cpu, MSR_PM_ENABLE, &msr);
+		intel_get_msr(base_cpu, MSR_PM_ENABLE, &msr);
 	else if (authentic_amd) {
 		ret = amd_get_msr(base_cpu, MSR_AMD_CPPC_ENABLE, (unsigned long *)(&msr));
 		if (ret < 0)
@@ -1561,7 +1561,7 @@ void early_cpuid(void)
 		if (model == 0x4F) {
 			unsigned long long msr;
 
-			get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
+			intel_get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
 
 			bdx_highest_ratio = msr & 0xFF;
 		}
-- 
2.34.1

[PATCH Resend 4/8] tools/power x86_energy_perf_policy: rename get_cpuid_or_exit() with intel prefix

[Perry Yuan]

From: Perry Yuan <Perry.Yuan@amd.com>

Rename the get_cpuid_or_exit() function with intel string prefix, that
will help to know the function are used on Intel processors.

No functional impact.

Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>
Suggested-by: Fontenot Nathan <Nathan.Fontenot@amd.com>
---
 .../x86_energy_perf_policy/x86_energy_perf_policy.c  | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
index 3f09c12f24fa..a08403ab219a 100644
--- a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
+++ b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
@@ -1515,7 +1515,7 @@ void probe_dev_msr(void)
 			err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
 }
 
-static void get_cpuid_or_exit(unsigned int leaf,
+static void intel_get_cpuid_or_exit(unsigned int leaf,
 			     unsigned int *eax, unsigned int *ebx,
 			     unsigned int *ecx, unsigned int *edx)
 {
@@ -1552,7 +1552,7 @@ void early_cpuid(void)
 		authentic_amd = 1;
 
 	if (genuine_intel) {
-		get_cpuid_or_exit(1, &fms, &ebx, &ecx, &edx);
+		intel_get_cpuid_or_exit(1, &fms, &ebx, &ecx, &edx);
 		family = (fms >> 8) & 0xf;
 		model = (fms >> 4) & 0xf;
 		if (family == 6 || family == 0xf)
@@ -1566,7 +1566,7 @@ void early_cpuid(void)
 			bdx_highest_ratio = msr & 0xFF;
 		}
 
-		get_cpuid_or_exit(0x6, &eax, &ebx, &ecx, &edx);
+		intel_get_cpuid_or_exit(0x6, &eax, &ebx, &ecx, &edx);
 		turbo_is_enabled = (eax >> 1) & 1;
 		has_hwp = (eax >> 7) & 1;
 		has_epb = (ecx >> 3) & 1;
@@ -1591,7 +1591,7 @@ void parse_cpuid(void)
 
 	eax = ebx = ecx = edx = 0;
 
-	get_cpuid_or_exit(0, &max_level, &ebx, &ecx, &edx);
+	intel_get_cpuid_or_exit(0, &max_level, &ebx, &ecx, &edx);
 
 	if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
 		genuine_intel = 1;
@@ -1602,7 +1602,7 @@ void parse_cpuid(void)
 		fprintf(stderr, "CPUID(0): %.4s%.4s%.4s ",
 			(char *)&ebx, (char *)&edx, (char *)&ecx);
 
-	get_cpuid_or_exit(1, &fms, &ebx, &ecx, &edx);
+	intel_get_cpuid_or_exit(1, &fms, &ebx, &ecx, &edx);
 	family = (fms >> 8) & 0xf;
 	model = (fms >> 4) & 0xf;
 	stepping = fms & 0xf;
@@ -1632,7 +1632,7 @@ void parse_cpuid(void)
 		errx(1, "CPUID: no MSR");
 
 	if (genuine_intel) {
-		get_cpuid_or_exit(0x6, &eax, &ebx, &ecx, &edx);
+		intel_get_cpuid_or_exit(0x6, &eax, &ebx, &ecx, &edx);
 		/* turbo_is_enabled already set */
 		/* has_hwp already set */
 		has_hwp_notify = eax & (1 << 8);
-- 
2.34.1

[PATCH Resend 5/8] tools/power x86_energy_perf_policy: add nominal and lowest nonlinear perf values showing support

[Perry Yuan]

Add nominal_perf and lowest_nonlinear_perf read and print the values. It
will help user to check each core all perf values of CPPC and change the
EPP profile as need.

cpu0: [AMD HWP_CAP]: low 12 lowest_non 86 nominal 121 highest 196
cpu1: [AMD HWP_CAP]: low 12 lowest_non 86 nominal 121 highest 176
cpu2: [AMD HWP_CAP]: low 12 lowest_non 86 nominal 121 highest 201
cpu3: [AMD HWP_CAP]: low 12 lowest_non 86 nominal 121 highest 181

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
---
 .../x86_energy_perf_policy/x86_energy_perf_policy.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
index a08403ab219a..7bc668d22728 100644
--- a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
+++ b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
@@ -38,6 +38,8 @@ struct msr_hwp_cap {
 	unsigned char guaranteed;
 	unsigned char efficient;
 	unsigned char lowest;
+	unsigned char nominal_perf;
+	unsigned char lowest_nonlinear_perf;
 };
 
 struct msr_hwp_request {
@@ -820,8 +822,13 @@ void print_hwp_cap(int cpu, struct msr_hwp_cap *cap, char *str)
 	if (cpu != -1)
 		printf("cpu%d: ", cpu);
 
-	printf("HWP_CAP: low %d eff %d guar %d high %d\n",
-		cap->lowest, cap->efficient, cap->guaranteed, cap->highest);
+	if (genuine_intel) {
+		printf("HWP_CAP: low %d eff %d guar %d high %d\n",
+			cap->lowest, cap->efficient, cap->guaranteed, cap->highest);
+	} else if (authentic_amd) {
+		printf("[AMD HWP_CAP]: low %d lowest_non %d nominal %d highest %d\n\n",
+			cap->lowest, cap->lowest_nonlinear_perf, cap->nominal_perf, cap->highest);
+	}
 }
 void read_hwp_cap(int cpu, struct msr_hwp_cap *cap, unsigned int msr_offset)
 {
@@ -840,6 +847,8 @@ void read_hwp_cap(int cpu, struct msr_hwp_cap *cap, unsigned int msr_offset)
 			errx(-1, "failed to get msr with return %d", ret);
 		cap->highest = msr_perf_2_ratio(AMD_CPPC_HIGHEST_PERF(msr));
 		cap->lowest = msr_perf_2_ratio(AMD_CPPC_LOWEST_PERF(msr));
+		cap->nominal_perf = msr_perf_2_ratio(AMD_CPPC_NOMINAL_PERF(msr));
+		cap->lowest_nonlinear_perf = msr_perf_2_ratio(AMD_CPPC_LOWNONLIN_PERF(msr));
 	}
 }
 
-- 
2.34.1

[PATCH Resend 6/8] tools/power x86_energy_perf_policy: remove the invalid feature options for AMD processors

[Perry Yuan]

EPB feature is not supported by AMD CPU, remove the unsupported options
to advoid confusion for the failure result when using the parameters.

Here is the new help output with  below command.
$ sudo ./x86_energy_perf_policy -h

./x86_energy_perf_policy [options] [scope][field value]
scope: --cpu cpu-list [--hwp-use-pkg #] | --pkg pkg-list
field: --all | --hwp-epp | --hwp-min | --hwp-max | --hwp-desired
other: --hwp-enable | --turbo-enable (0 | 1) | --help | --force
value: ( # | "normal" | "performance" | "balance-performance" |
"balance-power"| "power")
--hwp-window usec
./x86_energy_perf_policy: [-c cpu] [-v] (-r | policy-value )

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
---
 .../x86_energy_perf_policy.c                      | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
index 7bc668d22728..ada1aaabad8c 100644
--- a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
+++ b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
@@ -105,13 +105,18 @@ void usage(void)
 {
 	fprintf(stderr, "%s [options] [scope][field value]\n", progname);
 	fprintf(stderr, "scope: --cpu cpu-list [--hwp-use-pkg #] | --pkg pkg-list\n");
-	fprintf(stderr, "field: --all | --epb | --hwp-epp | --hwp-min | --hwp-max | --hwp-desired\n");
+
+	if (genuine_intel)
+		fprintf(stderr, "field: --all | --epb | --hwp-epp | --hwp-min | --hwp-max | --hwp-desired\n");
+	else if (authentic_amd)
+		fprintf(stderr, "field: --all | --hwp-epp | --hwp-min | --hwp-max | --hwp-desired\n");
+
 	fprintf(stderr, "other: --hwp-enable | --turbo-enable (0 | 1) | --help | --force\n");
 	fprintf(stderr,
 		"value: ( # | \"normal\" | \"performance\" | \"balance-performance\" | \"balance-power\"| \"power\")\n");
 	fprintf(stderr, "--hwp-window usec\n");
-
-	fprintf(stderr, "Specify only Energy Performance BIAS (legacy usage):\n");
+	if (genuine_intel)
+		fprintf(stderr, "Specify only Energy Performance BIAS (legacy usage):\n");
 	fprintf(stderr, "%s: [-c cpu] [-v] (-r | policy-value )\n", progname);
 
 	exit(1);
@@ -1309,7 +1314,7 @@ int update_cpu_msrs(int cpu)
 	unsigned long long msr;
 	int epb;
 
-	if (update_epb) {
+	if (update_epb && genuine_intel) {
 		epb = get_epb(cpu);
 		set_epb(cpu, new_epb);
 
@@ -1318,7 +1323,7 @@ int update_cpu_msrs(int cpu)
 				cpu, epb, (unsigned int) new_epb);
 	}
 
-	if (update_turbo) {
+	if (update_turbo && genuine_intel) {
 		int turbo_is_present_and_disabled;
 
 		intel_get_msr(cpu, MSR_IA32_MISC_ENABLE, &msr);
-- 
2.34.1

[PATCH Resend 7/8] tools/power x86_energy_perf_policy: rename some perf output strings for AMD processors

[Perry Yuan]

rename some perf strings using same definition for AMD CPPC performance
capabilities.

cpu0: [AMD HWP_REQ]: lowest 12 highest 166 desired 0 epp 128 window
0x131497d0 (80*10^7us) use_pkg 89

cpu1: [AMD HWP_REQ]: lowest 12 highest 166 desired 0 epp 128 window
0x131497d0 (80*10^7us) use_pkg 89

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
---
 .../x86_energy_perf_policy.c                  | 23 ++++++++++++++-----
 1 file changed, 17 insertions(+), 6 deletions(-)

diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
index ada1aaabad8c..845cfedab06e 100644
--- a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
+++ b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
@@ -864,10 +864,15 @@ void print_hwp_request(int cpu, struct msr_hwp_request *h, char *str)
 
 	if (str)
 		printf("%s", str);
+	if (genuine_intel)
+		printf("HWP_REQ: min %d max %d des %d epp %d window 0x%x (%d*10^%dus) use_pkg %d\n",
+			h->hwp_min, h->hwp_max, h->hwp_desired, h->hwp_epp,
+			h->hwp_window, h->hwp_window & 0x7F, (h->hwp_window >> 7) & 0x7, h->hwp_use_pkg);
+	else if (authentic_amd)
+		printf("[AMD HWP_REQ]: lowest %d highest %d desired %d epp %d window 0x%x (%d*10^%dus) use_pkg %d\n",
+			h->hwp_min, h->hwp_max, h->hwp_desired, h->hwp_epp,
+			h->hwp_window, h->hwp_window & 0x7F, (h->hwp_window >> 7) & 0x7, h->hwp_use_pkg);
 
-	printf("HWP_REQ: min %d max %d des %d epp %d window 0x%x (%d*10^%dus) use_pkg %d\n",
-		h->hwp_min, h->hwp_max, h->hwp_desired, h->hwp_epp,
-		h->hwp_window, h->hwp_window & 0x7F, (h->hwp_window >> 7) & 0x7, h->hwp_use_pkg);
 }
 void print_hwp_request_pkg(int pkg, struct msr_hwp_request *h, char *str)
 {
@@ -876,9 +881,15 @@ void print_hwp_request_pkg(int pkg, struct msr_hwp_request *h, char *str)
 	if (str)
 		printf("%s", str);
 
-	printf("HWP_REQ_PKG: min %d max %d des %d epp %d window 0x%x (%d*10^%dus)\n",
-		h->hwp_min, h->hwp_max, h->hwp_desired, h->hwp_epp,
-		h->hwp_window, h->hwp_window & 0x7F, (h->hwp_window >> 7) & 0x7);
+	if (genuine_intel) {
+		printf("HWP_REQ_PKG: min %d max %d des %d epp %d window 0x%x (%d*10^%dus)\n",
+			h->hwp_min, h->hwp_max, h->hwp_desired, h->hwp_epp,
+			h->hwp_window, h->hwp_window & 0x7F, (h->hwp_window >> 7) & 0x7);
+	} else if (authentic_amd) {
+		printf("AMD HWP_REQ_PKG: lowest %d highest %d desired %d epp %d window 0x%x (%d*10^%dus)\n",
+			h->hwp_min, h->hwp_max, h->hwp_desired, h->hwp_epp,
+			h->hwp_window, h->hwp_window & 0x7F, (h->hwp_window >> 7) & 0x7);
+	}
 }
 void read_hwp_request(int cpu, struct msr_hwp_request *hwp_req, unsigned int msr_offset)
 {
-- 
2.34.1

[PATCH Resend 8/8] tools/power x86_energy_perf_policy: change intel msr functions to be static

[Perry Yuan]

change the intel_get_msr and intel_put_msr functions to be static.

No functional change intended.

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
---
 .../power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
index 845cfedab06e..a5f2f96fa383 100644
--- a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
+++ b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
@@ -686,7 +686,7 @@ void err_on_hypervisor(void)
 		    "not supported on this virtual machine");
 }
 
-int intel_get_msr(int cpu, int offset, unsigned long long *msr)
+static int intel_get_msr(int cpu, int offset, unsigned long long *msr)
 {
 	int retval;
 	char pathname[32];
@@ -710,7 +710,7 @@ int intel_get_msr(int cpu, int offset, unsigned long long *msr)
 	return 0;
 }
 
-int intel_put_msr(int cpu, int offset, unsigned long long new_msr)
+static int intel_put_msr(int cpu, int offset, unsigned long long new_msr)
 {
 	char pathname[32];
 	int retval;
-- 
2.34.1

Re: [PATCH Resend 7/8] tools/power x86_energy_perf_policy: rename some perf output strings for AMD processors

[Mario Limonciello]

On 1/29/2024 23:56, Perry Yuan wrote:
> rename some perf strings using same definition for AMD CPPC performance
> capabilities.

I'm not sure I get why these need to deviate.  The nomenclature is 
clearer for everyone this way isn't it?  So why not just make the same 
change for everyone (IE min->lowest, max->highest, des->desired)?

> 
> cpu0: [AMD HWP_REQ]: lowest 12 highest 166 desired 0 epp 128 window
> 0x131497d0 (80*10^7us) use_pkg 89
> 
> cpu1: [AMD HWP_REQ]: lowest 12 highest 166 desired 0 epp 128 window
> 0x131497d0 (80*10^7us) use_pkg 89
> 
> Signed-off-by: Perry Yuan <perry.yuan@amd.com>
> ---
>   .../x86_energy_perf_policy.c                  | 23 ++++++++++++++-----
>   1 file changed, 17 insertions(+), 6 deletions(-)
> 
> diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> index ada1aaabad8c..845cfedab06e 100644
> --- a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> +++ b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> @@ -864,10 +864,15 @@ void print_hwp_request(int cpu, struct msr_hwp_request *h, char *str)
>   
>   	if (str)
>   		printf("%s", str);
> +	if (genuine_intel)
> +		printf("HWP_REQ: min %d max %d des %d epp %d window 0x%x (%d*10^%dus) use_pkg %d\n",
> +			h->hwp_min, h->hwp_max, h->hwp_desired, h->hwp_epp,
> +			h->hwp_window, h->hwp_window & 0x7F, (h->hwp_window >> 7) & 0x7, h->hwp_use_pkg);
> +	else if (authentic_amd)
> +		printf("[AMD HWP_REQ]: lowest %d highest %d desired %d epp %d window 0x%x (%d*10^%dus) use_pkg %d\n",
> +			h->hwp_min, h->hwp_max, h->hwp_desired, h->hwp_epp,
> +			h->hwp_window, h->hwp_window & 0x7F, (h->hwp_window >> 7) & 0x7, h->hwp_use_pkg);
>   
> -	printf("HWP_REQ: min %d max %d des %d epp %d window 0x%x (%d*10^%dus) use_pkg %d\n",
> -		h->hwp_min, h->hwp_max, h->hwp_desired, h->hwp_epp,
> -		h->hwp_window, h->hwp_window & 0x7F, (h->hwp_window >> 7) & 0x7, h->hwp_use_pkg);
>   }
>   void print_hwp_request_pkg(int pkg, struct msr_hwp_request *h, char *str)
>   {
> @@ -876,9 +881,15 @@ void print_hwp_request_pkg(int pkg, struct msr_hwp_request *h, char *str)
>   	if (str)
>   		printf("%s", str);
>   
> -	printf("HWP_REQ_PKG: min %d max %d des %d epp %d window 0x%x (%d*10^%dus)\n",
> -		h->hwp_min, h->hwp_max, h->hwp_desired, h->hwp_epp,
> -		h->hwp_window, h->hwp_window & 0x7F, (h->hwp_window >> 7) & 0x7);
> +	if (genuine_intel) {
> +		printf("HWP_REQ_PKG: min %d max %d des %d epp %d window 0x%x (%d*10^%dus)\n",
> +			h->hwp_min, h->hwp_max, h->hwp_desired, h->hwp_epp,
> +			h->hwp_window, h->hwp_window & 0x7F, (h->hwp_window >> 7) & 0x7);
> +	} else if (authentic_amd) {
> +		printf("AMD HWP_REQ_PKG: lowest %d highest %d desired %d epp %d window 0x%x (%d*10^%dus)\n",
> +			h->hwp_min, h->hwp_max, h->hwp_desired, h->hwp_epp,
> +			h->hwp_window, h->hwp_window & 0x7F, (h->hwp_window >> 7) & 0x7);
> +	}
>   }
>   void read_hwp_request(int cpu, struct msr_hwp_request *hwp_req, unsigned int msr_offset)
>   {

Re: [PATCH Resend 6/8] tools/power x86_energy_perf_policy: remove the invalid feature options for AMD processors

[Mario Limonciello]

On 1/29/2024 23:56, Perry Yuan wrote:
> EPB feature is not supported by AMD CPU, remove the unsupported options
> to advoid confusion for the failure result when using the parameters.
> 
> Here is the new help output with  below command.
> $ sudo ./x86_energy_perf_policy -h
> 
> ./x86_energy_perf_policy [options] [scope][field value]
> scope: --cpu cpu-list [--hwp-use-pkg #] | --pkg pkg-list
> field: --all | --hwp-epp | --hwp-min | --hwp-max | --hwp-desired
> other: --hwp-enable | --turbo-enable (0 | 1) | --help | --force
> value: ( # | "normal" | "performance" | "balance-performance" |
> "balance-power"| "power")
> --hwp-window usec
> ./x86_energy_perf_policy: [-c cpu] [-v] (-r | policy-value )
> 
> Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
>   .../x86_energy_perf_policy.c                      | 15 ++++++++++-----
>   1 file changed, 10 insertions(+), 5 deletions(-)
> 
> diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> index 7bc668d22728..ada1aaabad8c 100644
> --- a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> +++ b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> @@ -105,13 +105,18 @@ void usage(void)
>   {
>   	fprintf(stderr, "%s [options] [scope][field value]\n", progname);
>   	fprintf(stderr, "scope: --cpu cpu-list [--hwp-use-pkg #] | --pkg pkg-list\n");
> -	fprintf(stderr, "field: --all | --epb | --hwp-epp | --hwp-min | --hwp-max | --hwp-desired\n");
> +
> +	if (genuine_intel)
> +		fprintf(stderr, "field: --all | --epb | --hwp-epp | --hwp-min | --hwp-max | --hwp-desired\n");
> +	else if (authentic_amd)
> +		fprintf(stderr, "field: --all | --hwp-epp | --hwp-min | --hwp-max | --hwp-desired\n");
> +
>   	fprintf(stderr, "other: --hwp-enable | --turbo-enable (0 | 1) | --help | --force\n");
>   	fprintf(stderr,
>   		"value: ( # | \"normal\" | \"performance\" | \"balance-performance\" | \"balance-power\"| \"power\")\n");
>   	fprintf(stderr, "--hwp-window usec\n");
> -
> -	fprintf(stderr, "Specify only Energy Performance BIAS (legacy usage):\n");
> +	if (genuine_intel)
> +		fprintf(stderr, "Specify only Energy Performance BIAS (legacy usage):\n");
>   	fprintf(stderr, "%s: [-c cpu] [-v] (-r | policy-value )\n", progname);
>   
>   	exit(1);
> @@ -1309,7 +1314,7 @@ int update_cpu_msrs(int cpu)
>   	unsigned long long msr;
>   	int epb;
>   
> -	if (update_epb) {
> +	if (update_epb && genuine_intel) {
>   		epb = get_epb(cpu);
>   		set_epb(cpu, new_epb);
>   
> @@ -1318,7 +1323,7 @@ int update_cpu_msrs(int cpu)
>   				cpu, epb, (unsigned int) new_epb);
>   	}
>   
> -	if (update_turbo) {
> +	if (update_turbo && genuine_intel) {
>   		int turbo_is_present_and_disabled;
>   
>   		intel_get_msr(cpu, MSR_IA32_MISC_ENABLE, &msr);

Re: [PATCH Resend 8/8] tools/power x86_energy_perf_policy: change intel msr functions to be static

[Mario Limonciello]

On 1/29/2024 23:56, Perry Yuan wrote:
> change the intel_get_msr and intel_put_msr functions to be static.

Was this wrong from the beginning, or is it because of changes in your 
series?  You already have the "what" in the title.  I think the "why" 
should be described here.

> 
> No functional change intended.
> 
> Signed-off-by: Perry Yuan <perry.yuan@amd.com>
> ---
>   .../power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> index 845cfedab06e..a5f2f96fa383 100644
> --- a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> +++ b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> @@ -686,7 +686,7 @@ void err_on_hypervisor(void)
>   		    "not supported on this virtual machine");
>   }
>   
> -int intel_get_msr(int cpu, int offset, unsigned long long *msr)
> +static int intel_get_msr(int cpu, int offset, unsigned long long *msr)
>   {
>   	int retval;
>   	char pathname[32];
> @@ -710,7 +710,7 @@ int intel_get_msr(int cpu, int offset, unsigned long long *msr)
>   	return 0;
>   }
>   
> -int intel_put_msr(int cpu, int offset, unsigned long long new_msr)
> +static int intel_put_msr(int cpu, int offset, unsigned long long new_msr)
>   {
>   	char pathname[32];
>   	int retval;

Re: [PATCH Resend 5/8] tools/power x86_energy_perf_policy: add nominal and lowest nonlinear perf values showing support

[Mario Limonciello]

On 1/29/2024 23:56, Perry Yuan wrote:
> Add nominal_perf and lowest_nonlinear_perf read and print the values. It
> will help user to check each core all perf values of CPPC and change the
> EPP profile as need.
> 
> cpu0: [AMD HWP_CAP]: low 12 lowest_non 86 nominal 121 highest 196
> cpu1: [AMD HWP_CAP]: low 12 lowest_non 86 nominal 121 highest 176
> cpu2: [AMD HWP_CAP]: low 12 lowest_non 86 nominal 121 highest 201
> cpu3: [AMD HWP_CAP]: low 12 lowest_non 86 nominal 121 highest 181
> 
> Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
>   .../x86_energy_perf_policy/x86_energy_perf_policy.c | 13 +++++++++++--
>   1 file changed, 11 insertions(+), 2 deletions(-)
> 
> diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> index a08403ab219a..7bc668d22728 100644
> --- a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> +++ b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> @@ -38,6 +38,8 @@ struct msr_hwp_cap {
>   	unsigned char guaranteed;
>   	unsigned char efficient;
>   	unsigned char lowest;
> +	unsigned char nominal_perf;
> +	unsigned char lowest_nonlinear_perf;
>   };
>   
>   struct msr_hwp_request {
> @@ -820,8 +822,13 @@ void print_hwp_cap(int cpu, struct msr_hwp_cap *cap, char *str)
>   	if (cpu != -1)
>   		printf("cpu%d: ", cpu);
>   
> -	printf("HWP_CAP: low %d eff %d guar %d high %d\n",
> -		cap->lowest, cap->efficient, cap->guaranteed, cap->highest);
> +	if (genuine_intel) {
> +		printf("HWP_CAP: low %d eff %d guar %d high %d\n",
> +			cap->lowest, cap->efficient, cap->guaranteed, cap->highest);
> +	} else if (authentic_amd) {
> +		printf("[AMD HWP_CAP]: low %d lowest_non %d nominal %d highest %d\n\n",
> +			cap->lowest, cap->lowest_nonlinear_perf, cap->nominal_perf, cap->highest);
> +	}
>   }
>   void read_hwp_cap(int cpu, struct msr_hwp_cap *cap, unsigned int msr_offset)
>   {
> @@ -840,6 +847,8 @@ void read_hwp_cap(int cpu, struct msr_hwp_cap *cap, unsigned int msr_offset)
>   			errx(-1, "failed to get msr with return %d", ret);
>   		cap->highest = msr_perf_2_ratio(AMD_CPPC_HIGHEST_PERF(msr));
>   		cap->lowest = msr_perf_2_ratio(AMD_CPPC_LOWEST_PERF(msr));
> +		cap->nominal_perf = msr_perf_2_ratio(AMD_CPPC_NOMINAL_PERF(msr));
> +		cap->lowest_nonlinear_perf = msr_perf_2_ratio(AMD_CPPC_LOWNONLIN_PERF(msr));
>   	}
>   }
>   

Re: [PATCH Resend 4/8] tools/power x86_energy_perf_policy: rename get_cpuid_or_exit() with intel prefix

[Mario Limonciello]

On 1/29/2024 23:56, Perry Yuan wrote:
> From: Perry Yuan <Perry.Yuan@amd.com>
> 
> Rename the get_cpuid_or_exit() function with intel string prefix, that
> will help to know the function are used on Intel processors.
> 
> No functional impact.
> 
> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>
> Suggested-by: Fontenot Nathan <Nathan.Fontenot@amd.com>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
>   .../x86_energy_perf_policy/x86_energy_perf_policy.c  | 12 ++++++------
>   1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> index 3f09c12f24fa..a08403ab219a 100644
> --- a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> +++ b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> @@ -1515,7 +1515,7 @@ void probe_dev_msr(void)
>   			err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
>   }
>   
> -static void get_cpuid_or_exit(unsigned int leaf,
> +static void intel_get_cpuid_or_exit(unsigned int leaf,
>   			     unsigned int *eax, unsigned int *ebx,
>   			     unsigned int *ecx, unsigned int *edx)
>   {
> @@ -1552,7 +1552,7 @@ void early_cpuid(void)
>   		authentic_amd = 1;
>   
>   	if (genuine_intel) {
> -		get_cpuid_or_exit(1, &fms, &ebx, &ecx, &edx);
> +		intel_get_cpuid_or_exit(1, &fms, &ebx, &ecx, &edx);
>   		family = (fms >> 8) & 0xf;
>   		model = (fms >> 4) & 0xf;
>   		if (family == 6 || family == 0xf)
> @@ -1566,7 +1566,7 @@ void early_cpuid(void)
>   			bdx_highest_ratio = msr & 0xFF;
>   		}
>   
> -		get_cpuid_or_exit(0x6, &eax, &ebx, &ecx, &edx);
> +		intel_get_cpuid_or_exit(0x6, &eax, &ebx, &ecx, &edx);
>   		turbo_is_enabled = (eax >> 1) & 1;
>   		has_hwp = (eax >> 7) & 1;
>   		has_epb = (ecx >> 3) & 1;
> @@ -1591,7 +1591,7 @@ void parse_cpuid(void)
>   
>   	eax = ebx = ecx = edx = 0;
>   
> -	get_cpuid_or_exit(0, &max_level, &ebx, &ecx, &edx);
> +	intel_get_cpuid_or_exit(0, &max_level, &ebx, &ecx, &edx);
>   
>   	if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
>   		genuine_intel = 1;
> @@ -1602,7 +1602,7 @@ void parse_cpuid(void)
>   		fprintf(stderr, "CPUID(0): %.4s%.4s%.4s ",
>   			(char *)&ebx, (char *)&edx, (char *)&ecx);
>   
> -	get_cpuid_or_exit(1, &fms, &ebx, &ecx, &edx);
> +	intel_get_cpuid_or_exit(1, &fms, &ebx, &ecx, &edx);
>   	family = (fms >> 8) & 0xf;
>   	model = (fms >> 4) & 0xf;
>   	stepping = fms & 0xf;
> @@ -1632,7 +1632,7 @@ void parse_cpuid(void)
>   		errx(1, "CPUID: no MSR");
>   
>   	if (genuine_intel) {
> -		get_cpuid_or_exit(0x6, &eax, &ebx, &ecx, &edx);
> +		intel_get_cpuid_or_exit(0x6, &eax, &ebx, &ecx, &edx);
>   		/* turbo_is_enabled already set */
>   		/* has_hwp already set */
>   		has_hwp_notify = eax & (1 << 8);

Re: [PATCH Resend 3/8] tools/power x86_energy_perf_policy: rename get_msr() and put_msr() with intel prefix

[Mario Limonciello]

On 1/29/2024 23:56, Perry Yuan wrote:
> From: Perry Yuan <Perry.Yuan@amd.com>
> 
> Rename the get_msr() and put_msr() function with Intel prefix,that will
> better help to differentiate with other processor msr operation.
> 
> No functional impact.
> 
> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>
> Suggested-by: Fontenot Nathan <Nathan.Fontenot@amd.com>

Maybe this should squash with patch 8 since the same lines get changed.
> ---
>   .../x86_energy_perf_policy.c                  | 32 +++++++++----------
>   1 file changed, 16 insertions(+), 16 deletions(-)
> 
> diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> index da9087873915..3f09c12f24fa 100644
> --- a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> +++ b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> @@ -679,7 +679,7 @@ void err_on_hypervisor(void)
>   		    "not supported on this virtual machine");
>   }
>   
> -int get_msr(int cpu, int offset, unsigned long long *msr)
> +int intel_get_msr(int cpu, int offset, unsigned long long *msr)
>   {
>   	int retval;
>   	char pathname[32];
> @@ -697,13 +697,13 @@ int get_msr(int cpu, int offset, unsigned long long *msr)
>   	}
>   
>   	if (debug > 1)
> -		fprintf(stderr, "get_msr(cpu%d, 0x%X, 0x%llX)\n", cpu, offset, *msr);
> +		fprintf(stderr, "intel_get_msr(cpu%d, 0x%X, 0x%llX)\n", cpu, offset, *msr);
>   
>   	close(fd);
>   	return 0;
>   }
>   
> -int put_msr(int cpu, int offset, unsigned long long new_msr)
> +int intel_put_msr(int cpu, int offset, unsigned long long new_msr)
>   {
>   	char pathname[32];
>   	int retval;
> @@ -721,7 +721,7 @@ int put_msr(int cpu, int offset, unsigned long long new_msr)
>   	close(fd);
>   
>   	if (debug > 1)
> -		fprintf(stderr, "put_msr(cpu%d, 0x%X, 0x%llX)\n", cpu, offset, new_msr);
> +		fprintf(stderr, "intel_put_msr(cpu%d, 0x%X, 0x%llX)\n", cpu, offset, new_msr);
>   
>   	return 0;
>   }
> @@ -829,7 +829,7 @@ void read_hwp_cap(int cpu, struct msr_hwp_cap *cap, unsigned int msr_offset)
>   	int ret;
>   
>   	if (genuine_intel) {
> -		get_msr(cpu, msr_offset, &msr);
> +		intel_get_msr(cpu, msr_offset, &msr);
>   		cap->highest = msr_perf_2_ratio(HWP_HIGHEST_PERF(msr));
>   		cap->guaranteed = msr_perf_2_ratio(HWP_GUARANTEED_PERF(msr));
>   		cap->efficient = msr_perf_2_ratio(HWP_MOSTEFFICIENT_PERF(msr));
> @@ -872,7 +872,7 @@ void read_hwp_request(int cpu, struct msr_hwp_request *hwp_req, unsigned int msr
>   	int ret;
>   
>   	if (genuine_intel) {
> -		get_msr(cpu, msr_offset, &msr);
> +		intel_get_msr(cpu, msr_offset, &msr);
>   
>   		hwp_req->hwp_min = msr_perf_2_ratio((((msr) >> 0) & 0xff));
>   		hwp_req->hwp_max = msr_perf_2_ratio((((msr) >> 8) & 0xff));
> @@ -909,7 +909,7 @@ void write_hwp_request(int cpu, struct msr_hwp_request *hwp_req, unsigned int ms
>   		msr |= HWP_ENERGY_PERF_PREFERENCE(hwp_req->hwp_epp);
>   		msr |= HWP_ACTIVITY_WINDOW(hwp_req->hwp_window);
>   		msr |= HWP_PACKAGE_CONTROL(hwp_req->hwp_use_pkg);
> -		put_msr(cpu, msr_offset, msr);
> +		intel_put_msr(cpu, msr_offset, msr);
>   	} else if (authentic_amd) {
>   		/* AMD EPP need to set desired perf with zero */
>   		hwp_req->hwp_desired = 0;
> @@ -1011,14 +1011,14 @@ int print_pkg_msrs(int pkg)
>   	print_hwp_request_pkg(pkg, &req, "");
>   
>   	if (has_hwp_notify) {
> -		get_msr(first_cpu_in_pkg[pkg], MSR_HWP_INTERRUPT, &msr);
> +		intel_get_msr(first_cpu_in_pkg[pkg], MSR_HWP_INTERRUPT, &msr);
>   		fprintf(stderr,
>   		"pkg%d: MSR_HWP_INTERRUPT: 0x%08llx (Excursion_Min-%sabled, Guaranteed_Perf_Change-%sabled)\n",
>   		pkg, msr,
>   		((msr) & 0x2) ? "EN" : "Dis",
>   		((msr) & 0x1) ? "EN" : "Dis");
>   	}
> -	get_msr(first_cpu_in_pkg[pkg], MSR_HWP_STATUS, &msr);
> +	intel_get_msr(first_cpu_in_pkg[pkg], MSR_HWP_STATUS, &msr);
>   	fprintf(stderr,
>   		"pkg%d: MSR_HWP_STATUS: 0x%08llx (%sExcursion_Min, %sGuaranteed_Perf_Change)\n",
>   		pkg, msr,
> @@ -1274,8 +1274,8 @@ int enable_hwp_on_cpu(int cpu)
>   	int ret;
>   
>   	if (genuine_intel) {
> -		get_msr(cpu, MSR_PM_ENABLE, &msr);
> -		put_msr(cpu, MSR_PM_ENABLE, 1);
> +		intel_get_msr(cpu, MSR_PM_ENABLE, &msr);
> +		intel_put_msr(cpu, MSR_PM_ENABLE, 1);
>   	} else if (authentic_amd) {
>   		ret = amd_get_msr(cpu, MSR_AMD_CPPC_ENABLE, (unsigned long *)(&msr));
>   		if (ret < 0)
> @@ -1312,14 +1312,14 @@ int update_cpu_msrs(int cpu)
>   	if (update_turbo) {
>   		int turbo_is_present_and_disabled;
>   
> -		get_msr(cpu, MSR_IA32_MISC_ENABLE, &msr);
> +		intel_get_msr(cpu, MSR_IA32_MISC_ENABLE, &msr);
>   
>   		turbo_is_present_and_disabled = ((msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE) != 0);
>   
>   		if (turbo_update_value == 1)	{
>   			if (turbo_is_present_and_disabled) {
>   				msr &= ~MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
> -				put_msr(cpu, MSR_IA32_MISC_ENABLE, msr);
> +				intel_put_msr(cpu, MSR_IA32_MISC_ENABLE, msr);
>   				if (verbose)
>   					printf("cpu%d: turbo ENABLE\n", cpu);
>   			}
> @@ -1330,7 +1330,7 @@ int update_cpu_msrs(int cpu)
>   			 * but cpu may be in a different package, so we always write.
>   			 */
>   			msr |= MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
> -			put_msr(cpu, MSR_IA32_MISC_ENABLE, msr);
> +			intel_put_msr(cpu, MSR_IA32_MISC_ENABLE, msr);
>   			if (verbose)
>   				printf("cpu%d: turbo DISABLE\n", cpu);
>   		}
> @@ -1455,7 +1455,7 @@ void verify_hwp_is_enabled(void)
>   
>   	/* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
>   	if (genuine_intel)
> -		get_msr(base_cpu, MSR_PM_ENABLE, &msr);
> +		intel_get_msr(base_cpu, MSR_PM_ENABLE, &msr);
>   	else if (authentic_amd) {
>   		ret = amd_get_msr(base_cpu, MSR_AMD_CPPC_ENABLE, (unsigned long *)(&msr));
>   		if (ret < 0)
> @@ -1561,7 +1561,7 @@ void early_cpuid(void)
>   		if (model == 0x4F) {
>   			unsigned long long msr;
>   
> -			get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
> +			intel_get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
>   
>   			bdx_highest_ratio = msr & 0xFF;
>   		}

Re: [PATCH Resend 2/8] tools/power x86_energy_perf_policy: enable AMD pstate EPP profile switching on MSR based system

[Mario Limonciello]

On 1/29/2024 23:56, Perry Yuan wrote:
> From: Perry Yuan <Perry.Yuan@amd.com>
> 
> x86_energy_perf_policy adds AMD EPP profiles switch support,the EPP
> driver also has four EPP profiles implemented under power
> firmware autonomous mode.
> (performance, balance-performance, balance-power, power)
> User can choose the new profile to use with this utility support while
> `amd_pstate_epp` driver instance loaded for the MSR support systems.
> 
> for example:
> $ sudo x86_energy_perf_policy -d --hwp-epp balance-performance
> cpu0: old: HWP_REQ: min 13 max 166 des 0 epp 128 window 0x9 (9*10^0us) use_pkg 0
> cpu0: HWP_CAP: low 13 eff 157 guar 0 high 231
> cpu0: new: HWP_REQ: min 13 max 166 des 0 epp 128 window 0x9 (9*10^0us) use_pkg 0
> cpu1: old: HWP_REQ: min 13 max 166 des 0 epp 128 window 0x9 (9*10^0us) use_pkg 0
> cpu1: HWP_CAP: low 13 eff 157 guar 0 high 236
> cpu1: new: HWP_REQ: min 13 max 166 des 0 epp 128 window 0x9 (9*10^0us) use_pkg 0
> cpu2: old: HWP_REQ: min 13 max 166 des 0 epp 128 window 0x9 (9*10^0us) use_pkg 0
> cpu2: HWP_CAP: low 13 eff 157 guar 0 high 211
> cpu2: new: HWP_REQ: min 13 max 166 des 0 epp 128 window 0x9 (9*10^0us) use_pkg 0
> cpu3: old: HWP_REQ: min 13 max 166 des 0 epp 128 window 0x9 (9*10^0us) use_pkg 0
> cpu3: HWP_CAP: low 13 eff 157 guar 0 high 206
> cpu3: new: HWP_REQ: min 13 max 166 des 0 epp 128 window 0x9 (9*10^0us) use_pkg 0
> 
> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>
> ---
>   .../x86_energy_perf_policy.c                  | 69 +++++++++++++++----
>   1 file changed, 54 insertions(+), 15 deletions(-)
> 
> diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> index 5daf1c2bb601..da9087873915 100644
> --- a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> +++ b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> @@ -902,14 +902,23 @@ void write_hwp_request(int cpu, struct msr_hwp_request *hwp_req, unsigned int ms
>   			hwp_req->hwp_desired, hwp_req->hwp_epp,
>   			hwp_req->hwp_window, hwp_req->hwp_use_pkg);
>   
> -	msr |= HWP_MIN_PERF(ratio_2_msr_perf(hwp_req->hwp_min));
> -	msr |= HWP_MAX_PERF(ratio_2_msr_perf(hwp_req->hwp_max));
> -	msr |= HWP_DESIRED_PERF(ratio_2_msr_perf(hwp_req->hwp_desired));
> -	msr |= HWP_ENERGY_PERF_PREFERENCE(hwp_req->hwp_epp);
> -	msr |= HWP_ACTIVITY_WINDOW(hwp_req->hwp_window);
> -	msr |= HWP_PACKAGE_CONTROL(hwp_req->hwp_use_pkg);
> -
> -	put_msr(cpu, msr_offset, msr);
> +	if (genuine_intel) {
> +		msr |= HWP_MIN_PERF(ratio_2_msr_perf(hwp_req->hwp_min));
> +		msr |= HWP_MAX_PERF(ratio_2_msr_perf(hwp_req->hwp_max));
> +		msr |= HWP_DESIRED_PERF(ratio_2_msr_perf(hwp_req->hwp_desired));
> +		msr |= HWP_ENERGY_PERF_PREFERENCE(hwp_req->hwp_epp);
> +		msr |= HWP_ACTIVITY_WINDOW(hwp_req->hwp_window);
> +		msr |= HWP_PACKAGE_CONTROL(hwp_req->hwp_use_pkg);
> +		put_msr(cpu, msr_offset, msr);
> +	} else if (authentic_amd) {
> +		/* AMD EPP need to set desired perf with zero */
> +		hwp_req->hwp_desired = 0;

Should this be blocked a level higher up?  Like exiting the tool the 
function call when calling parse_cmdline_hwp_desired() is used?

> +		msr |= AMD_CPPC_MIN_PERF(hwp_req->hwp_min);
> +		msr |= AMD_CPPC_MAX_PERF(hwp_req->hwp_max);
> +		msr |= AMD_CPPC_DES_PERF(hwp_req->hwp_desired);

Given the msr is already initialized to 0, this is unnecessary isn't it?

> +		msr |= AMD_CPPC_ENERGY_PERF_PREF(hwp_req->hwp_epp);
> +		amd_put_msr(cpu, msr_offset, (unsigned int)msr);
> +	}
>   }
>   
>   static int get_epb(int cpu)
> @@ -1157,8 +1166,12 @@ int update_hwp_request(int cpu)
>   {
>   	struct msr_hwp_request req;
>   	struct msr_hwp_cap cap;
> +	int msr_offset = 0;
>   
> -	int msr_offset = MSR_HWP_REQUEST;
> +	if (genuine_intel)
> +		msr_offset = MSR_HWP_REQUEST;
> +	else if (authentic_amd)
> +		msr_offset = MSR_AMD_CPPC_REQ;
>   
>   	read_hwp_request(cpu, &req, msr_offset);
>   	if (debug)
> @@ -1181,7 +1194,11 @@ int update_hwp_request(int cpu)
>   
>   	req.hwp_use_pkg = req_update.hwp_use_pkg;
>   
> -	read_hwp_cap(cpu, &cap, MSR_HWP_CAPABILITIES);
> +	if (genuine_intel)
> +		read_hwp_cap(cpu, &cap, MSR_HWP_CAPABILITIES);
> +	else if (authentic_amd)
> +		read_hwp_cap(cpu, &cap, MSR_AMD_CPPC_CAP1);
> +
>   	if (debug)
>   		print_hwp_cap(cpu, &cap, "");
>   
> @@ -1203,8 +1220,12 @@ int update_hwp_request_pkg(int pkg)
>   	struct msr_hwp_request req;
>   	struct msr_hwp_cap cap;
>   	int cpu = first_cpu_in_pkg[pkg];
> +	int msr_offset = 0;
>   
> -	int msr_offset = MSR_HWP_REQUEST_PKG;
> +	if (genuine_intel)
> +		msr_offset = MSR_HWP_REQUEST_PKG;
> +	else if (authentic_amd)
> +		msr_offset = MSR_AMD_CPPC_REQ;
>   
>   	read_hwp_request(cpu, &req, msr_offset);
>   	if (debug)
> @@ -1225,7 +1246,11 @@ int update_hwp_request_pkg(int pkg)
>   	if (update_hwp_epp)
>   		req.hwp_epp = req_update.hwp_epp;
>   
> -	read_hwp_cap(cpu, &cap, MSR_HWP_CAPABILITIES);
> +	if (genuine_intel)
> +		read_hwp_cap(cpu, &cap, MSR_HWP_CAPABILITIES);
> +	else if (authentic_amd)
> +		read_hwp_cap(cpu, &cap, MSR_AMD_CPPC_CAP1);
> +
>   	if (debug)
>   		print_hwp_cap(cpu, &cap, "");
>   
> @@ -1246,13 +1271,27 @@ int update_hwp_request_pkg(int pkg)
>   int enable_hwp_on_cpu(int cpu)
>   {
>   	unsigned long long msr;
> +	int ret;
> +
> +	if (genuine_intel) {
> +		get_msr(cpu, MSR_PM_ENABLE, &msr);
> +		put_msr(cpu, MSR_PM_ENABLE, 1);
> +	} else if (authentic_amd) {
> +		ret = amd_get_msr(cpu, MSR_AMD_CPPC_ENABLE, (unsigned long *)(&msr));
> +		if (ret < 0)
> +			errx(-1, "failed to get msr with return %d", ret);
>   
> -	get_msr(cpu, MSR_PM_ENABLE, &msr);
> -	put_msr(cpu, MSR_PM_ENABLE, 1);
> +		ret = amd_put_msr(cpu, MSR_AMD_CPPC_ENABLE, 1);
> +		if (ret < 0)
> +			errx(-1, "failed to put msr with return %d", ret);
> +	}
>   
> -	if (verbose)
> +	if (verbose && genuine_intel)
>   		printf("cpu%d: MSR_PM_ENABLE old: %d new: %d\n", cpu, (unsigned int) msr, 1);
>   
> +	if (verbose && authentic_amd)
> +		printf("cpu%d: MSR_AMD_CPPC_ENABLE old: %d new: %d\n", cpu, (unsigned int) msr, 1);
> +
>   	return 0;
>   }
>   

Re: [PATCH Resend 1/8] tools/power x86_energy_perf_policy: add info show support for AMD Pstate EPP driver

[Mario Limonciello]

On 1/29/2024 23:56, Perry Yuan wrote:
> From: Perry Yuan <Perry.Yuan@amd.com>
> 
> With the amd pstate epp driver implemented, the x86_energy_perf_policy
> will need to implemented the utility support to display hardware energy
> and performance policy hint information on the AMD processors.
> 
> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>
> ---
>   .../x86_energy_perf_policy.c                  | 211 ++++++++++++++----
>   1 file changed, 167 insertions(+), 44 deletions(-)
> 
> diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> index 5fd9e594079c..5daf1c2bb601 100644
> --- a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> +++ b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
> @@ -76,6 +76,8 @@ unsigned long long pkg_selected_set;
>   cpu_set_t *cpu_present_set;
>   cpu_set_t *cpu_selected_set;
>   int genuine_intel;
> +unsigned int authentic_amd;
> +unsigned int max_level;
>   
>   size_t cpu_setsize;
>   
> @@ -724,6 +726,53 @@ int put_msr(int cpu, int offset, unsigned long long new_msr)
>   	return 0;
>   }
>   
> +static int amd_put_msr(int cpu, off_t offset, unsigned long msr)
> +{
> +	ssize_t retval;
> +	int fd;
> +	char pathname[32];
> +
> +	sprintf(pathname, "/dev/cpu/%d/msr", cpu);
> +	fd = open(pathname, O_RDWR);
> +	if (fd < 0) {
> +		err(-EACCES, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
> +		goto out;
> +	}
> +	retval = pwrite(fd, &msr, sizeof(msr), offset);
> +	if (retval != sizeof(msr))
> +		err(-EFAULT, "cpu%d: msr offset 0x%lx write failed ret = %ld fd = %d", cpu, (unsigned long)offset, retval, fd);
> +
> +	if (debug > 1)
> +		fprintf(stderr, "amd_put_msr(cpu%d, 0x%lx, 0x%lX)\n", cpu, offset, msr);
> +
> +	close(fd);
> +
> +out:
> +	return (retval == sizeof(msr)) ? 0 : -1;;
> +}
> +
> +
> +static int amd_get_msr(int cpu, off_t offset, unsigned long *msr)
> +{
> +	ssize_t retval;
> +	char pathname[32];
> +	int fd;
> +
> +	sprintf(pathname, "/dev/cpu/%d/msr", cpu);
> +	fd = open(pathname, O_RDONLY);
> +	if (fd < 0) {
> +		err(-EACCES, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
> +		goto out;
> +	}
> +	retval = pread(fd, msr, sizeof(*msr), offset);
> +	if (retval != sizeof *msr)
> +		err(-EFAULT, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
> +
> +	close(fd);
> +out:
> +	return (retval == sizeof *msr) ? 0 : -1;;
> +}
> +

I don't see a reason that the existing put_msr/get_msr can't be rsued on 
AMD side too.  Did I miss something?

>   static unsigned int read_sysfs(const char *path, char *buf, size_t buflen)
>   {
>   	ssize_t numread;
> @@ -777,13 +826,21 @@ void print_hwp_cap(int cpu, struct msr_hwp_cap *cap, char *str)
>   void read_hwp_cap(int cpu, struct msr_hwp_cap *cap, unsigned int msr_offset)
>   {
>   	unsigned long long msr;
> +	int ret;
>   
> -	get_msr(cpu, msr_offset, &msr);
> -
> -	cap->highest = msr_perf_2_ratio(HWP_HIGHEST_PERF(msr));
> -	cap->guaranteed = msr_perf_2_ratio(HWP_GUARANTEED_PERF(msr));
> -	cap->efficient = msr_perf_2_ratio(HWP_MOSTEFFICIENT_PERF(msr));
> -	cap->lowest = msr_perf_2_ratio(HWP_LOWEST_PERF(msr));
> +	if (genuine_intel) {
> +		get_msr(cpu, msr_offset, &msr);
> +		cap->highest = msr_perf_2_ratio(HWP_HIGHEST_PERF(msr));
> +		cap->guaranteed = msr_perf_2_ratio(HWP_GUARANTEED_PERF(msr));
> +		cap->efficient = msr_perf_2_ratio(HWP_MOSTEFFICIENT_PERF(msr));
> +		cap->lowest = msr_perf_2_ratio(HWP_LOWEST_PERF(msr));
> +	} else if (authentic_amd) {
> +		ret = amd_get_msr(cpu, msr_offset, (unsigned long *)(&msr));
> +		if (ret < 0)
> +			errx(-1, "failed to get msr with return %d", ret);
> +		cap->highest = msr_perf_2_ratio(AMD_CPPC_HIGHEST_PERF(msr));
> +		cap->lowest = msr_perf_2_ratio(AMD_CPPC_LOWEST_PERF(msr));
> +	}
>   }
>   
>   void print_hwp_request(int cpu, struct msr_hwp_request *h, char *str)
> @@ -812,15 +869,27 @@ void print_hwp_request_pkg(int pkg, struct msr_hwp_request *h, char *str)
>   void read_hwp_request(int cpu, struct msr_hwp_request *hwp_req, unsigned int msr_offset)
>   {
>   	unsigned long long msr;
> +	int ret;
>   
> -	get_msr(cpu, msr_offset, &msr);
> -
> -	hwp_req->hwp_min = msr_perf_2_ratio((((msr) >> 0) & 0xff));
> -	hwp_req->hwp_max = msr_perf_2_ratio((((msr) >> 8) & 0xff));
> -	hwp_req->hwp_desired = msr_perf_2_ratio((((msr) >> 16) & 0xff));
> -	hwp_req->hwp_epp = (((msr) >> 24) & 0xff);
> -	hwp_req->hwp_window = (((msr) >> 32) & 0x3ff);
> -	hwp_req->hwp_use_pkg = (((msr) >> 42) & 0x1);
> +	if (genuine_intel) {
> +		get_msr(cpu, msr_offset, &msr);
> +
> +		hwp_req->hwp_min = msr_perf_2_ratio((((msr) >> 0) & 0xff));
> +		hwp_req->hwp_max = msr_perf_2_ratio((((msr) >> 8) & 0xff));
> +		hwp_req->hwp_desired = msr_perf_2_ratio((((msr) >> 16) & 0xff));
> +		hwp_req->hwp_epp = (((msr) >> 24) & 0xff);
> +		hwp_req->hwp_window = (((msr) >> 32) & 0x3ff);
> +		hwp_req->hwp_use_pkg = (((msr) >> 42) & 0x1);
> +	} else if (authentic_amd) {
> +		ret = amd_get_msr(cpu, msr_offset, (unsigned long *)(&msr));
> +		if (ret < 0)
> +			errx(-1, "failed to get msr with return %d", ret);
> +		hwp_req->hwp_min = msr_perf_2_ratio((((msr) >> 8) & 0xff));
> +		hwp_req->hwp_max = msr_perf_2_ratio((((msr) >> 0) & 0xff));
> +
> +		hwp_req->hwp_desired = msr_perf_2_ratio((((msr) >> 16) & 0xff));
> +		hwp_req->hwp_epp = (((msr) >> 24) & 0xff);
> +	}
>   }
>   
>   void write_hwp_request(int cpu, struct msr_hwp_request *hwp_req, unsigned int msr_offset)
> @@ -895,18 +964,28 @@ int print_cpu_msrs(int cpu)
>   	struct msr_hwp_cap cap;
>   	int epb;
>   
> -	epb = get_epb(cpu);
> -	if (epb >= 0)
> -		printf("cpu%d: EPB %u\n", cpu, (unsigned int) epb);
> +	if (genuine_intel) {
> +		epb = get_epb(cpu);
> +		if (epb >= 0)
> +			printf("cpu%d: EPB %u\n", cpu, (unsigned int) epb);
> +	}
>   
>   	if (!has_hwp)
>   		return 0;
>   
> -	read_hwp_request(cpu, &req, MSR_HWP_REQUEST);
> -	print_hwp_request(cpu, &req, "");
> +	if (genuine_intel) {
> +		read_hwp_request(cpu, &req, MSR_HWP_REQUEST);
> +		print_hwp_request(cpu, &req, "");
>   
> -	read_hwp_cap(cpu, &cap, MSR_HWP_CAPABILITIES);
> -	print_hwp_cap(cpu, &cap, "");
> +		read_hwp_cap(cpu, &cap, MSR_HWP_CAPABILITIES);
> +		print_hwp_cap(cpu, &cap, "");
> +	} else if (authentic_amd) {
> +		read_hwp_request(cpu, &req, MSR_AMD_CPPC_REQ);//MSR_HWP_REQUEST
> +		print_hwp_request(cpu, &req, "");
> +
> +		read_hwp_cap(cpu, &cap, MSR_AMD_CPPC_CAP1);//MSR_HWP_CAPABILITIES
> +		print_hwp_cap(cpu, &cap, "");
> +	}
>   
>   	return 0;
>   }
> @@ -1330,12 +1409,19 @@ void init_data_structures(void)
>   void verify_hwp_is_enabled(void)
>   {
>   	unsigned long long msr;
> +	int ret;
>   
>   	if (!has_hwp)	/* set in early_cpuid() */
>   		return;
>   
>   	/* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
> -	get_msr(base_cpu, MSR_PM_ENABLE, &msr);
> +	if (genuine_intel)
> +		get_msr(base_cpu, MSR_PM_ENABLE, &msr);
> +	else if (authentic_amd) {
> +		ret = amd_get_msr(base_cpu, MSR_AMD_CPPC_ENABLE, (unsigned long *)(&msr));
> +		if (ret < 0)
> +			errx(-1, "failed to get msr with return %d", ret);
> +	}
>   	if ((msr & 1) == 0) {
>   		fprintf(stderr, "HWP can be enabled using '--hwp-enable'\n");
>   		has_hwp = 0;
> @@ -1398,6 +1484,17 @@ static void get_cpuid_or_exit(unsigned int leaf,
>   		errx(1, "Processor not supported\n");
>   }
>   
> +static void amd_get_cpuid_or_exit(unsigned int leaf,
> +			     unsigned int *eax, unsigned int *ebx,
> +			     unsigned int *ecx, unsigned int *edx)
> +{
> +	unsigned int leaf_index;
> +
> +	leaf_index =  leaf | 0x80000000;
> +	if (!__get_cpuid(leaf_index, eax, ebx, ecx, edx))
> +		errx(1, "Processor not supported\n");
> +}
> +
>   /*
>    * early_cpuid()
>    * initialize turbo_is_enabled, has_hwp, has_epb
> @@ -1408,24 +1505,39 @@ void early_cpuid(void)
>   	unsigned int eax, ebx, ecx, edx;
>   	unsigned int fms, family, model;
>   
> -	get_cpuid_or_exit(1, &fms, &ebx, &ecx, &edx);
> -	family = (fms >> 8) & 0xf;
> -	model = (fms >> 4) & 0xf;
> -	if (family == 6 || family == 0xf)
> -		model += ((fms >> 16) & 0xf) << 4;
> +	eax = ebx = ecx = edx = 0;
> +	__cpuid(0, max_level, ebx, ecx, edx);
> +	if (ebx == 0x756e6547 && ecx == 0x6c65746e && edx == 0x49656e69)
> +		genuine_intel = 1;
> +	else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
> +		authentic_amd = 1;
>   
> -	if (model == 0x4F) {
> -		unsigned long long msr;
> +	if (genuine_intel) {
> +		get_cpuid_or_exit(1, &fms, &ebx, &ecx, &edx);
> +		family = (fms >> 8) & 0xf;
> +		model = (fms >> 4) & 0xf;
> +		if (family == 6 || family == 0xf)
> +			model += ((fms >> 16) & 0xf) << 4;
>   
> -		get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
> +		if (model == 0x4F) {
> +			unsigned long long msr;
>   
> -		bdx_highest_ratio = msr & 0xFF;
> -	}
> +			get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
> +
> +			bdx_highest_ratio = msr & 0xFF;
> +		}
>   
> -	get_cpuid_or_exit(0x6, &eax, &ebx, &ecx, &edx);
> -	turbo_is_enabled = (eax >> 1) & 1;
> -	has_hwp = (eax >> 7) & 1;
> -	has_epb = (ecx >> 3) & 1;
> +		get_cpuid_or_exit(0x6, &eax, &ebx, &ecx, &edx);
> +		turbo_is_enabled = (eax >> 1) & 1;
> +		has_hwp = (eax >> 7) & 1;
> +		has_epb = (ecx >> 3) & 1;
> +	} else if (authentic_amd) {
> +		/* AMD Processors CPUID info */
> +		amd_get_cpuid_or_exit(0x8, &eax, &ebx, &ecx, &edx);
> +		turbo_is_enabled = (eax >> 1) & 1;
> +		has_hwp = (ebx >> 27) & 1;
> +		has_hwp_epp = (ebx >> 27) & 1;
> +	}
>   }
>   
>   /*
> @@ -1444,6 +1556,8 @@ void parse_cpuid(void)
>   
>   	if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
>   		genuine_intel = 1;
> +	else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
> +		authentic_amd = 1;
>   
>   	if (debug)
>   		fprintf(stderr, "CPUID(0): %.4s%.4s%.4s ",
> @@ -1456,6 +1570,11 @@ void parse_cpuid(void)
>   	if (family == 6 || family == 0xf)
>   		model += ((fms >> 16) & 0xf) << 4;
>   
> +	if (authentic_amd) {
> +		if (family == 0xf)
> +			family += (fms >> 20) & 0xff;
> +	}
> +
>   	if (debug) {
>   		fprintf(stderr, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
>   			max_level, family, model, stepping, family, model, stepping);
> @@ -1473,14 +1592,18 @@ void parse_cpuid(void)
>   	if (!(edx & (1 << 5)))
>   		errx(1, "CPUID: no MSR");
>   
> -
> -	get_cpuid_or_exit(0x6, &eax, &ebx, &ecx, &edx);
> -	/* turbo_is_enabled already set */
> -	/* has_hwp already set */
> -	has_hwp_notify = eax & (1 << 8);
> -	has_hwp_activity_window = eax & (1 << 9);
> -	has_hwp_epp = eax & (1 << 10);
> -	has_hwp_request_pkg = eax & (1 << 11);
> +	if (genuine_intel) {
> +		get_cpuid_or_exit(0x6, &eax, &ebx, &ecx, &edx);
> +		/* turbo_is_enabled already set */
> +		/* has_hwp already set */
> +		has_hwp_notify = eax & (1 << 8);
> +		has_hwp_activity_window = eax & (1 << 9);
> +		has_hwp_epp = eax & (1 << 10);
> +		has_hwp_request_pkg = eax & (1 << 11);
> +	} else if (authentic_amd) {
> +		amd_get_cpuid_or_exit(0x8, &eax, &ebx, &ecx, &edx);
> +		has_hwp_epp = (ebx >> 27) & 1;
> +	}
>   
>   	if (!has_hwp_request_pkg && update_hwp_use_pkg)
>   		errx(1, "--hwp-use-pkg is not available on this hardware");