Re: [PATCH 1/2] ACPI: CPPC: Add support for CPPC v4

[Mario Limonciello <mario.limonciello@amd.com>]

On 4/27/26 03:04, Sumit Gupta wrote:
> 
> On 27/04/26 12:36, zhenglifeng (A) wrote:
>> External email: Use caution opening links or attachments
>>
>>
>> It seems that mario has sent a similar patch:
>>
>> https://lore.kernel.org/all/20260427035520.1427080-3-superm1@kernel.org/
> 
> 
> Thank you for sharing.
> Yes, both look similar with below two change.
> 1. REG_OPTIONAL needs the 0x1FC7D0 -> 0x7FC7D0 update to mark
>     the two new registers optional. This is present in my [PATCH 1/2].
> 2. For Resource Priority, pkg_data added to cpc_entry.
>      This is present in Mario's [PATCH 2/6].
> 
> 
> Hi Mario,
> How would you like to proceed? A few options:
>    (a) Let both CPPCv4 patches from this series go separately.
>    (b) Fold the REG_OPTIONAL update from my patch 1/2 into your
>        patch, and pull my patch 2/2 into your series.
>    (c) Anything else you'd prefer.
> Either way works for me.
> 
> Thank you,
> Sumit Gupta
> 


Reviewing yours points out that I totally missed updating REG_OPTIONAL 
with the two new ACPI 6.7 fields being optional too.

In my series I only add in CPPv4 so I can build on top of the changes 
for CPPCv5.

So - I would say we should let your patches merge for v4 and I'll drop 
the relevant ones from my series and rebase mine on top of your work.


> 
>>
>> On 4/27/2026 1:18 PM, Sumit Gupta wrote:
>>> CPPC v4 (ACPI 6.6, Section 8.4.6) adds two optional entries to the
>>> _CPC package:
>>>
>>> 1. OSPM Nominal Performance (8.4.6.1.2.6): A write-only register that
>>>     lets OSPM inform the platform what it considers nominal performance.
>>>     The platform classifies performance above this level as boost and
>>>     below as throttle for its power/thermal decisions.
>>>
>>> 2. Resource Priority (8.4.6.1.2.7): A Package of Resource Priority
>>>     Register Descriptor sub-packages that allow OSPM to set relative
>>>     priority among processors for shared resources (boost, throttle,
>>>     L2/L3 cache, memory bandwidth). Parsing the full structure is not
>>>     yet supported; such entries are marked as unsupported.
>>>
>>> Add v4 _CPC table parsing (25 entries) and update REG_OPTIONAL to
>>> mark the two new registers as optional.
>>>
>>> Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
>>> ---
>>>   drivers/acpi/cppc_acpi.c | 24 ++++++++++++++++++------
>>>   include/acpi/cppc_acpi.h |  8 ++++++--
>>>   2 files changed, 24 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
>>> index 2e91c5a97761..a1c91ce20cc8 100644
>>> --- a/drivers/acpi/cppc_acpi.c
>>> +++ b/drivers/acpi/cppc_acpi.c
>>> @@ -134,7 +134,7 @@ static DEFINE_PER_CPU(struct cpc_desc *, 
>>> cpc_desc_ptr);
>>>    * cpc_regs[] with the corresponding index. 0 means mandatory and 1
>>>    * means optional.
>>>    */
>>> -#define REG_OPTIONAL (0x1FC7D0)
>>> +#define REG_OPTIONAL (0x7FC7D0)
>>>
>>>   /*
>>>    * Use the index of the register in per-cpu cpc_regs[] to check if
>>> @@ -751,18 +751,19 @@ int acpi_cppc_processor_probe(struct 
>>> acpi_processor *pr)
>>>        /*
>>>         * Disregard _CPC if the number of entries in the return 
>>> package is not
>>>         * as expected, but support future revisions being proper 
>>> supersets of
>>> -      * the v3 and only causing more entries to be returned by _CPC.
>>> +      * the v4 and only causing more entries to be returned by _CPC.
>>>         */
>>>        if ((cpc_rev == CPPC_V2_REV && num_ent != CPPC_V2_NUM_ENT) ||
>>>            (cpc_rev == CPPC_V3_REV && num_ent != CPPC_V3_NUM_ENT) ||
>>> -         (cpc_rev > CPPC_V3_REV && num_ent <= CPPC_V3_NUM_ENT)) {
>>> +         (cpc_rev == CPPC_V4_REV && num_ent != CPPC_V4_NUM_ENT) ||
>>> +         (cpc_rev > CPPC_V4_REV && num_ent <= CPPC_V4_NUM_ENT)) {
>>>                pr_debug("Unexpected number of _CPC return package 
>>> entries (%d) for CPU:%d\n",
>>>                         num_ent, pr->id);
>>>                goto out_free;
>>>        }
>>> -     if (cpc_rev > CPPC_V3_REV) {
>>> -             num_ent = CPPC_V3_NUM_ENT;
>>> -             cpc_rev = CPPC_V3_REV;
>>> +     if (cpc_rev > CPPC_V4_REV) {
>>> +             num_ent = CPPC_V4_NUM_ENT;
>>> +             cpc_rev = CPPC_V4_REV;
>>>        }
>>>
>>>        cpc_ptr->num_entries = num_ent;
>>> @@ -845,6 +846,17 @@ int acpi_cppc_processor_probe(struct 
>>> acpi_processor *pr)
>>>
>>>                        cpc_ptr->cpc_regs[i-2].type = ACPI_TYPE_BUFFER;
>>>                        memcpy(&cpc_ptr->cpc_regs[i-2].cpc_entry.reg, 
>>> gas_t, sizeof(*gas_t));
>>> +             } else if (cpc_obj->type == ACPI_TYPE_PACKAGE) {
>>> +                     /*
>>> +                      * ACPI 6.6, s8.4.6.1.2.7 defines Resource 
>>> Priority
>>> +                      * as a Package of Resource Priority Register 
>>> Descriptor
>>> +                      * sub-packages.  Parsing the full structure is 
>>> not yet
>>> +                      * supported; mark the register as unsupported 
>>> for now.
>>> +                      */
>>> +                     pr_debug("CPU:%d entry %d: package type not 
>>> supported\n",
>>> +                              pr->id, i);
>>> +                     cpc_ptr->cpc_regs[i-2].type = ACPI_TYPE_INTEGER;
>>> +                     cpc_ptr->cpc_regs[i-2].cpc_entry.int_value = 0;
>>>                } else {
>>>                        pr_debug("Invalid entry type (%d) in _CPC for 
>>> CPU:%d\n",
>>>                                 i, pr->id);
>>> diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h
>>> index d1f02ceec4f9..8693890a7275 100644
>>> --- a/include/acpi/cppc_acpi.h
>>> +++ b/include/acpi/cppc_acpi.h
>>> @@ -17,16 +17,18 @@
>>>   #include <acpi/pcc.h>
>>>   #include <acpi/processor.h>
>>>
>>> -/* CPPCv2 and CPPCv3 support */
>>> +/* CPPCv2, CPPCv3 and CPPCv4 support */
>>>   #define CPPC_V2_REV  2
>>>   #define CPPC_V3_REV  3
>>> +#define CPPC_V4_REV  4
>>>   #define CPPC_V2_NUM_ENT      21
>>>   #define CPPC_V3_NUM_ENT      23
>>> +#define CPPC_V4_NUM_ENT      25
>>>
>>>   #define PCC_CMD_COMPLETE_MASK        (1 << 0)
>>>   #define PCC_ERROR_MASK               (1 << 2)
>>>
>>> -#define MAX_CPC_REG_ENT 21
>>> +#define MAX_CPC_REG_ENT 23
>>>
>>>   /* CPPC specific PCC commands. */
>>>   #define      CMD_READ 0
>>> @@ -109,6 +111,8 @@ enum cppc_regs {
>>>        REFERENCE_PERF,
>>>        LOWEST_FREQ,
>>>        NOMINAL_FREQ,
>>> +     OSPM_NOMINAL_PERF,
>>> +     RESOURCE_PRIORITY,
>>>   };
>>>
>>>   /*