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Wed, 17 Sep 2025 15:47:22 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 58HFlMsX029136 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 17 Sep 2025 15:47:22 GMT Received: from [10.253.13.179] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.24; Wed, 17 Sep 2025 08:47:15 -0700 Message-ID: Date: Wed, 17 Sep 2025 23:47:13 +0800 Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 02/10] dt-bindings: clock: Add required "interconnect-cells" property To: Krzysztof Kozlowski , Konrad Dybcio CC: Bjorn Andersson , Michael Turquette , Stephen Boyd , "Varadarajan Narayanan" , Georgi Djakov , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Anusha Rao , "Manikanta Mylavarapu" , Devi Priya , Philipp Zabel , "Richard Cochran" , Konrad Dybcio , Catalin Marinas , Will Deacon , , , , , , , , , , , , References: <20250909-qcom_ipq5424_nsscc-v5-0-332c49a8512b@quicinc.com> <20250909-qcom_ipq5424_nsscc-v5-2-332c49a8512b@quicinc.com> <20250912-nocturnal-horse-of-acumen-5b2cbd@kuoka> <0aa8bf54-50e4-456d-9f07-a297a34b86c5@linaro.org> <1e7d7066-fa0b-4ebc-8f66-e3208bb6f948@quicinc.com> Content-Language: en-US From: Luo Jie In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: wXx7ORkbgQ2ggq8x1-ynkeB8cSyPi6kB X-Authority-Analysis: v=2.4 cv=btZMBFai c=1 sm=1 tr=0 ts=68cad80a cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=YxtPb7ZjVR6RY7X2M68A:9 a=QEXdDO2ut3YA:10 X-Proofpoint-GUID: wXx7ORkbgQ2ggq8x1-ynkeB8cSyPi6kB X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTE2MDIwMiBTYWx0ZWRfX5Fbqin2NXOcS e/NUiqHV51DBjUSBU5UbMKF9nGCBGOyb5Nnp+V6E5uNz/36h6XhaApGN+Af7me0yuDasmV8NLO+ pnI4a5yQNAGB4fsZTrosNWNf8KxDtvGwgFOrlfaDFgMBnGwOvP1FqfRTssphD6cG1gTVf2Q7syA M8N/ynAIMAE3l53RKIylbihwoOea1ymxbuiCcUl4pGBVVk6BSURI9THQkMMcVpudISYWLdfAEIp cxVpUM6XI8ItqCqnvY1x3fob/HbO1aLy8sfMuG97QjCTxRTJhUK15eFurFTCOYXS41s5VUspzxV HvGdXMgG7Nd4EafFW62QoM+qOMV+MthOTMaQ/7nQkbcu9in0SqwkV/lR1OTCpBvFjoFzh6Hlnrh 7/cBr6Bw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-17_01,2025-09-17_02,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 priorityscore=1501 impostorscore=0 clxscore=1015 malwarescore=0 spamscore=0 adultscore=0 phishscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509160202 On 9/17/2025 8:35 AM, Krzysztof Kozlowski wrote: > On 16/09/2025 16:03, Luo Jie wrote: >> >> >> On 9/12/2025 5:16 PM, Krzysztof Kozlowski wrote: >>> On 12/09/2025 11:13, Konrad Dybcio wrote: >>>> On 9/12/25 9:04 AM, Krzysztof Kozlowski wrote: >>>>> On Tue, Sep 09, 2025 at 09:39:11PM +0800, Luo Jie wrote: >>>>>> The Networking Subsystem (NSS) clock controller acts as both a clock >>>>>> provider and an interconnect provider. The #interconnect-cells property >>>>>> is mandatory in the Device Tree Source (DTS) to ensure that client >>>>>> drivers, such as the PPE driver, can correctly acquire ICC clocks from >>>>>> the NSS ICC provider. >>>>>> >>>>>> Although this property is already present in the NSS CC node of the DTS >>>>>> for CMN PLL for IPQ9574 SoC which is currently supported, it was previously >>>>>> omitted from the list of required properties in the bindings documentation. >>>>>> Adding this as a required property is not expected to break the ABI for >>>>>> currently supported SoC. >>>>>> >>>>>> Marking #interconnect-cells as required to comply with Device Tree (DT) >>>>>> binding requirements for interconnect providers. >>>>> >>>>> DT bindings do not require interconnect-cells, so that's not a correct >>>>> reason. Drop them from required properties. >>>> >>>> "Mark #interconnect-cells as required to allow consuming the provided >>>> interconnect endpoints"? >>> >>> >>> The point is they do not have to be required. >> >> The reason for adding this property as required is to enforce >> the DTS to define this important resource correctly. If this property >> is missed from the DTS, the client driver such as PPE driver will not >> be able to initialize correctly. This is necessary irrespective of >> whether these clocks are enabled by bootloader or not. The IPQ9574 SoC >> DTS defines this property even though the property was not marked as >> mandatory in the bindings, and hence the PPE driver is working. >> >> By now marking it as required, we can enforce that DTS files going >> forward for newer SoC (IPQ5424 and later) are properly defining this >> resource. This prevents any DTS misconfiguration and improves bindings >> validation as new SoCs are introduced. > > So you explain to the DT maintainer how the DT works. Well, thank you, > everyday I can learn something. > > You wasted a lot of our (multiple maintainers) time in the past, so I > will just NAK your patches instead of wasting time again. > > Best regards, > Krzysztof My sincere apologies for the misunderstanding and inconvenience my previous response has caused. I can assure you that my intention was never to describe the DT subsystem working, and am sorry that it has come out as such. I am committed to learning and continuously improving the quality of my contributions, and co-operating with reviewers and maintainers by following their feedback. I will update the patch accordingly to remove this property marking as required. Thank you very much for your support.