From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20563C43334 for ; Thu, 23 Jun 2022 15:56:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231910AbiFWP4M (ORCPT ); Thu, 23 Jun 2022 11:56:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33752 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231362AbiFWP4K (ORCPT ); Thu, 23 Jun 2022 11:56:10 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A705E443D7; Thu, 23 Jun 2022 08:56:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655999769; x=1687535769; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=2sQkvPgRrN3KPlpmOwqAcm6EAu1OjxyKTvt647C45Gw=; b=Zfx/u8fUriZFilCefwheZHtrDW/bmFNAyo+aEef2lNneYVZMk1hrtAvw nzG+B6sFvtnQCvh9WU3XsZCYDgZTPEpX7doh4dfpelYSBKhV3+GX5nNkP nPtDx/pSSPQtOuogcJb5jcUNCBl9ioZfDBim/MC4a9Klmo0DniV0y9nbV Dtve7GjYT0N8IjUMaEEKwcUJnOFFt3T28h+RhSb1TkQrKA2zL7NeNsJf4 VkFrlvvaRer0LF1o3g4zEC4D4wm9yHzHI9ohAHOepObAj8jfCJf75r3fI bOL2+HQySBd7Hraw99DOP/vu/1+OTQjSiVNbpomqDCVvH008iBn9lhsUr g==; X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="261190292" X-IronPort-AV: E=Sophos;i="5.92,216,1650956400"; d="scan'208";a="261190292" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jun 2022 08:56:09 -0700 X-IronPort-AV: E=Sophos;i="5.92,216,1650956400"; d="scan'208";a="563500760" Received: from ckeane-mobl1.amr.corp.intel.com (HELO [10.209.81.98]) ([10.209.81.98]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jun 2022 08:56:08 -0700 Message-ID: Date: Thu, 23 Jun 2022 08:55:42 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH V1] x86/cstate: Add Zhaoxin/Centaur ACPI Cx FFH MWAIT support Content-Language: en-US To: Tony W Wang-oc , "Rafael J. Wysocki" , Len Brown , Pavel Machek , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , the arch/x86 maintainers , "H. Peter Anvin" , Linux PM , Linux Kernel Mailing List Cc: CobeChen@zhaoxin.com, TimGuo@zhaoxin.com, LindaChai@zhaoxin.com, LeoLiu@zhaoxin.com, ACPI Devel Maling List References: <0b583b7e-dcd3-be51-f367-1c12ac841d3f@zhaoxin.com> From: Dave Hansen In-Reply-To: <0b583b7e-dcd3-be51-f367-1c12ac841d3f@zhaoxin.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org On 6/22/22 18:26, Tony W Wang-oc wrote: > Recent Zhaoxin/Centaur CPUs support X86_FEATURE_MWAIT that implies > the MONITOR/MWAIT instructions can be used for ACPI Cx state. > The BIOS declares Cx state in _CST object to use FFH on Zhaoxin/Centaur > systems. So let function ffh_cstate_init() support These CPUs too. > > Signed-off-by: Tony W Wang-oc > --- >  arch/x86/kernel/acpi/cstate.c | 4 +++- >  1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c > index 7945eae..d4185e1 100644 > --- a/arch/x86/kernel/acpi/cstate.c > +++ b/arch/x86/kernel/acpi/cstate.c > @@ -213,7 +213,9 @@ static int __init ffh_cstate_init(void) > >      if (c->x86_vendor != X86_VENDOR_INTEL && >          c->x86_vendor != X86_VENDOR_AMD && > -        c->x86_vendor != X86_VENDOR_HYGON) > +        c->x86_vendor != X86_VENDOR_HYGON && > +        c->x86_vendor != X86_VENDOR_CENTAUR && > +        c->x86_vendor != X86_VENDOR_ZHAOXIN) >          return -1; Many of the changelogs that add new vendors here go on about particular C states declared in the _CST object and contents of CPUID leaf 5. Why do we even _have_ a vendor check here? Shouldn't the code just be going and doing the validation of the _CST object and CPUID that the changelogs blather on about? Intel certainly made the original sin on this one (see 991528d7348), but I hope _something_ changed in the 16 years since that patch went in.