From: Steven Price <steven.price@arm.com>
To: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Boris Brezillon <boris.brezillon@collabora.com>,
Jassi Brar <jassisinghbrar@gmail.com>,
Chia-I Wu <olvaffe@gmail.com>, Chen-Yu Tsai <wenst@chromium.org>,
Liviu Dudau <liviu.dudau@arm.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Kees Cook <kees@kernel.org>,
"Gustavo A. R. Silva" <gustavoars@kernel.org>,
Ulf Hansson <ulf.hansson@linaro.org>
Cc: kernel@collabora.com, dri-devel@lists.freedesktop.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
linux-hardening@vger.kernel.org, linux-pm@vger.kernel.org
Subject: Re: [PATCH v8 4/5] drm/panthor: Use existing OPP table if present
Date: Mon, 20 Oct 2025 14:47:30 +0100 [thread overview]
Message-ID: <ef6434a9-cde5-4d68-a3a3-1873ba7912d3@arm.com> (raw)
In-Reply-To: <20251017-mt8196-gpufreq-v8-4-98fc1cc566a1@collabora.com>
On 17/10/2025 16:31, Nicolas Frattaroli wrote:
> On SoCs where the GPU's power-domain is in charge of setting performance
> levels, the OPP table of the GPU node will have already been populated
> during said power-domain's attach_dev operation.
>
> To avoid initialising an OPP table twice, only set the OPP regulator and
> the OPPs from DT if there's no OPP table present.
>
> Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Reviewed-by: Steven Price <steven.price@arm.com>
> ---
> drivers/gpu/drm/panthor/panthor_devfreq.c | 32 ++++++++++++++++++++++---------
> 1 file changed, 23 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/panthor/panthor_devfreq.c b/drivers/gpu/drm/panthor/panthor_devfreq.c
> index a6dca599f0a5..ec63e27f4883 100644
> --- a/drivers/gpu/drm/panthor/panthor_devfreq.c
> +++ b/drivers/gpu/drm/panthor/panthor_devfreq.c
> @@ -141,6 +141,7 @@ int panthor_devfreq_init(struct panthor_device *ptdev)
> struct thermal_cooling_device *cooling;
> struct device *dev = ptdev->base.dev;
> struct panthor_devfreq *pdevfreq;
> + struct opp_table *table;
> struct dev_pm_opp *opp;
> unsigned long cur_freq;
> unsigned long freq = ULONG_MAX;
> @@ -152,17 +153,30 @@ int panthor_devfreq_init(struct panthor_device *ptdev)
>
> ptdev->devfreq = pdevfreq;
>
> - ret = devm_pm_opp_set_regulators(dev, reg_names);
> - if (ret && ret != -ENODEV) {
> - if (ret != -EPROBE_DEFER)
> - DRM_DEV_ERROR(dev, "Couldn't set OPP regulators\n");
> - return ret;
> + /*
> + * The power domain associated with the GPU may have already added an
> + * OPP table, complete with OPPs, as part of the platform bus
> + * initialization. If this is the case, the power domain is in charge of
> + * also controlling the performance, with a set_performance callback.
> + * Only add a new OPP table from DT if there isn't such a table present
> + * already.
> + */
> + table = dev_pm_opp_get_opp_table(dev);
> + if (IS_ERR_OR_NULL(table)) {
> + ret = devm_pm_opp_set_regulators(dev, reg_names);
> + if (ret && ret != -ENODEV) {
> + if (ret != -EPROBE_DEFER)
> + DRM_DEV_ERROR(dev, "Couldn't set OPP regulators\n");
> + return ret;
> + }
> +
> + ret = devm_pm_opp_of_add_table(dev);
> + if (ret)
> + return ret;
> + } else {
> + dev_pm_opp_put_opp_table(table);
> }
>
> - ret = devm_pm_opp_of_add_table(dev);
> - if (ret)
> - return ret;
> -
> spin_lock_init(&pdevfreq->lock);
>
> panthor_devfreq_reset(pdevfreq);
>
next prev parent reply other threads:[~2025-10-20 13:47 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-17 15:31 [PATCH v8 0/5] MT8196 GPU Frequency/Power Control Support Nicolas Frattaroli
2025-10-17 15:31 ` [PATCH v8 1/5] dt-bindings: gpu: mali-valhall-csf: add mediatek,mt8196-mali variant Nicolas Frattaroli
2025-10-28 17:12 ` Liviu Dudau
2025-10-28 20:51 ` Nicolas Frattaroli
2025-10-29 1:04 ` Liviu Dudau
2025-10-29 13:42 ` Nicolas Frattaroli
2025-10-29 13:55 ` Liviu Dudau
2025-11-03 15:24 ` Liviu Dudau
2025-10-17 15:31 ` [PATCH v8 2/5] dt-bindings: power: Add MT8196 GPU frequency control binding Nicolas Frattaroli
2025-10-17 15:31 ` [PATCH v8 3/5] drm/panthor: call into devfreq for current frequency Nicolas Frattaroli
2025-10-20 8:16 ` Karunika Choo
2025-10-17 15:31 ` [PATCH v8 4/5] drm/panthor: Use existing OPP table if present Nicolas Frattaroli
2025-10-20 8:35 ` Karunika Choo
2025-10-20 11:50 ` Nicolas Frattaroli
2025-10-20 13:47 ` Steven Price [this message]
2025-10-17 15:31 ` [PATCH v8 5/5] pmdomain: mediatek: Add support for MFlexGraphics Nicolas Frattaroli
2025-10-22 13:52 ` [PATCH v8 0/5] MT8196 GPU Frequency/Power Control Support Ulf Hansson
2025-10-24 13:08 ` Steven Price
2025-10-24 14:50 ` Ulf Hansson
2025-11-03 16:07 ` Liviu Dudau
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