From: Matt Coster <Matt.Coster@imgtec.com>
To: Michal Wilczynski <m.wilczynski@samsung.com>,
"mturquette@baylibre.com" <mturquette@baylibre.com>,
"sboyd@kernel.org" <sboyd@kernel.org>,
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"drew@pdp7.com" <drew@pdp7.com>,
"guoren@kernel.org" <guoren@kernel.org>,
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"jassisinghbrar@gmail.com" <jassisinghbrar@gmail.com>,
"paul.walmsley@sifive.com" <paul.walmsley@sifive.com>,
"palmer@dabbelt.com" <palmer@dabbelt.com>,
"aou@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
Frank Binns <Frank.Binns@imgtec.com>,
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<maarten.lankhorst@linux.intel.com>,
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Cc: "linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>
Subject: Re: [PATCH v4 10/18] drm/imagination: Add reset controller support for GPU initialization
Date: Fri, 31 Jan 2025 15:39:31 +0000 [thread overview]
Message-ID: <fd46f443-b1f9-4f82-8d73-117cda093315@imgtec.com> (raw)
In-Reply-To: <20250128194816.2185326-11-m.wilczynski@samsung.com>
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On 28/01/2025 19:48, Michal Wilczynski wrote:
> Certain platforms, such as the T-Head TH1520 and Banana Pi BPI-F3,
> require a controlled GPU reset sequence during the power-up procedure
> to ensure proper initialization. Without this reset, the GPU may remain
> in an undefined state, potentially leading to stability or performance
> issues.
Can you reword this to clarify that _all_ IMG Rogue GPUs have a reset
line that participates in the power-up sequence but some SoCs handle
this in silicon and/or firmware without exposing the reset line
directly (as the currently supported TI SoC does).
>
> This commit integrates a dedicated reset controller within the
> drm/imagination driver. By doing so, the driver can coordinate the
> necessary reset operations as part of the normal GPU bring-up process,
> improving reliability and ensuring that the hardware is ready for
> operation.
>
> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
> ---
> drivers/gpu/drm/imagination/pvr_device.c | 21 +++++++++++++++++++++
> drivers/gpu/drm/imagination/pvr_device.h | 9 +++++++++
> drivers/gpu/drm/imagination/pvr_power.c | 12 +++++++++++-
> 3 files changed, 41 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/imagination/pvr_device.c b/drivers/gpu/drm/imagination/pvr_device.c
> index 1704c0268589..ef73e95157ee 100644
> --- a/drivers/gpu/drm/imagination/pvr_device.c
> +++ b/drivers/gpu/drm/imagination/pvr_device.c
> @@ -25,6 +25,7 @@
> #include <linux/interrupt.h>
> #include <linux/platform_device.h>
> #include <linux/pm_runtime.h>
> +#include <linux/reset.h>
> #include <linux/slab.h>
> #include <linux/stddef.h>
> #include <linux/types.h>
> @@ -120,6 +121,21 @@ static int pvr_device_clk_init(struct pvr_device *pvr_dev)
> return 0;
> }
>
> +static int pvr_device_reset_init(struct pvr_device *pvr_dev)
> +{
> + struct drm_device *drm_dev = from_pvr_device(pvr_dev);
> + struct reset_control *reset;
> +
> + reset = devm_reset_control_get_optional_exclusive(drm_dev->dev, NULL);
> + if (IS_ERR(reset))
> + return dev_err_probe(drm_dev->dev, PTR_ERR(reset),
> + "failed to get gpu reset line\n");
> +
> + pvr_dev->reset = reset;
> +
> + return 0;
> +}
> +
> /**
> * pvr_device_process_active_queues() - Process all queue related events.
> * @pvr_dev: PowerVR device to check
> @@ -509,6 +525,11 @@ pvr_device_init(struct pvr_device *pvr_dev)
> if (err)
> return err;
>
> + /* Get the reset line for the GPU */
> + err = pvr_device_reset_init(pvr_dev);
> + if (err)
> + return err;
> +
> /* Explicitly power the GPU so we can access control registers before the FW is booted. */
> err = pm_runtime_resume_and_get(dev);
> if (err)
> diff --git a/drivers/gpu/drm/imagination/pvr_device.h b/drivers/gpu/drm/imagination/pvr_device.h
> index 6d0dfacb677b..f6576c08111c 100644
> --- a/drivers/gpu/drm/imagination/pvr_device.h
> +++ b/drivers/gpu/drm/imagination/pvr_device.h
> @@ -131,6 +131,15 @@ struct pvr_device {
> */
> struct clk *mem_clk;
>
> + /**
> + * @reset: Optional reset line.
> + *
> + * This may be used on some platforms to provide a reset line that needs to be de-asserted
> + * after power-up procedure. It would also need to be asserted after the power-down
> + * procedure.
> + */
> + struct reset_control *reset;
> +
> /** @irq: IRQ number. */
> int irq;
>
> diff --git a/drivers/gpu/drm/imagination/pvr_power.c b/drivers/gpu/drm/imagination/pvr_power.c
> index ba7816fd28ec..e39460d594bd 100644
> --- a/drivers/gpu/drm/imagination/pvr_power.c
> +++ b/drivers/gpu/drm/imagination/pvr_power.c
> @@ -15,6 +15,7 @@
> #include <linux/mutex.h>
> #include <linux/platform_device.h>
> #include <linux/pm_runtime.h>
> +#include <linux/reset.h>
> #include <linux/timer.h>
> #include <linux/types.h>
> #include <linux/workqueue.h>
> @@ -252,6 +253,8 @@ pvr_power_device_suspend(struct device *dev)
> clk_disable_unprepare(pvr_dev->sys_clk);
> clk_disable_unprepare(pvr_dev->core_clk);
>
> + err = reset_control_assert(pvr_dev->reset);
> +
> err_drm_dev_exit:
> drm_dev_exit(idx);
>
> @@ -282,16 +285,23 @@ pvr_power_device_resume(struct device *dev)
> if (err)
> goto err_sys_clk_disable;
This is where I'd expect to see the 32 cycle delay that's currently in
P9 ("reset: thead: Add TH1520 reset controller driver").
If it turns out that delay is required in the reset driver, would you be
opposed to adding it here as well? It's a very small amount of time and
would make this codepath more versatile to future reset controllers.
Cheers,
Matt
>
> + err = reset_control_deassert(pvr_dev->reset);
> + if (err)
> + goto err_mem_clk_disable;
> +
> if (pvr_dev->fw_dev.booted) {
> err = pvr_power_fw_enable(pvr_dev);
> if (err)
> - goto err_mem_clk_disable;
> + goto err_reset_assert;
> }
>
> drm_dev_exit(idx);
>
> return 0;
>
> +err_reset_assert:
> + reset_control_assert(pvr_dev->reset);
> +
> err_mem_clk_disable:
> clk_disable_unprepare(pvr_dev->mem_clk);
>
--
Matt Coster
E: matt.coster@imgtec.com
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next prev parent reply other threads:[~2025-01-31 15:59 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20250128194825eucas1p14e2cb0a85c397dea297e9c4177cf1585@eucas1p1.samsung.com>
2025-01-28 19:47 ` [PATCH v4 00/18] Enable drm/imagination BXM-4-64 Support for LicheePi 4A Michal Wilczynski
2025-01-28 19:47 ` [PATCH v4 01/18] dt-bindings: clock: thead: Add TH1520 VO clock controller Michal Wilczynski
2025-01-29 7:29 ` Krzysztof Kozlowski
2025-01-28 19:48 ` [PATCH v4 02/18] clk: thead: Add clock support for VO subsystem in T-Head TH1520 SoC Michal Wilczynski
2025-01-31 15:39 ` Matt Coster
2025-02-03 16:37 ` Michal Wilczynski
2025-01-28 19:48 ` [PATCH v4 03/18] dt-bindings: firmware: thead,th1520: Add support for firmware node Michal Wilczynski
2025-01-29 7:30 ` Krzysztof Kozlowski
2025-01-28 19:48 ` [PATCH v4 04/18] firmware: thead: Add AON firmware protocol driver Michal Wilczynski
2025-02-14 11:01 ` Ulf Hansson
2025-01-28 19:48 ` [PATCH v4 05/18] dt-bindings: power: Add TH1520 SoC power domains Michal Wilczynski
2025-01-29 7:31 ` Krzysztof Kozlowski
2025-01-28 19:48 ` [PATCH v4 06/18] pmdomain: thead: Add power-domain driver for TH1520 Michal Wilczynski
2025-02-14 11:15 ` Ulf Hansson
2025-01-28 19:48 ` [PATCH v4 07/18] riscv: Enable PM_GENERIC_DOMAINS for T-Head SoCs Michal Wilczynski
2025-01-28 19:48 ` [PATCH v4 08/18] dt-bindings: reset: Add T-HEAD TH1520 SoC Reset Controller Michal Wilczynski
2025-01-29 7:32 ` Krzysztof Kozlowski
2025-01-28 19:48 ` [PATCH v4 09/18] reset: thead: Add TH1520 reset controller driver Michal Wilczynski
2025-01-29 12:04 ` Philipp Zabel
2025-01-31 15:39 ` Matt Coster
2025-02-03 18:15 ` Michal Wilczynski
2025-02-04 17:18 ` Philipp Zabel
2025-02-10 18:17 ` Michal Wilczynski
2025-02-11 11:59 ` Philipp Zabel
2025-01-28 19:48 ` [PATCH v4 10/18] drm/imagination: Add reset controller support for GPU initialization Michal Wilczynski
2025-01-31 15:39 ` Matt Coster [this message]
2025-01-28 19:48 ` [PATCH v4 11/18] dt-bindings: gpu: Add 'resets' property " Michal Wilczynski
2025-01-31 15:39 ` Matt Coster
2025-01-28 19:48 ` [PATCH v4 12/18] dt-bindings: gpu: Add support for T-HEAD TH1520 GPU Michal Wilczynski
2025-01-29 1:42 ` Rob Herring (Arm)
2025-01-31 15:39 ` Matt Coster
2025-02-03 17:58 ` Michal Wilczynski
2025-01-28 19:48 ` [PATCH v4 13/18] drm/imagination: Add support for IMG BXM-4-64 GPU Michal Wilczynski
2025-01-31 15:39 ` Matt Coster
2025-01-28 19:48 ` [PATCH v4 14/18] drm/imagination: Enable PowerVR driver for RISC-V Michal Wilczynski
2025-01-28 19:48 ` [PATCH v4 15/18] riscv: dts: thead: Add device tree VO clock controller Michal Wilczynski
2025-01-28 19:48 ` [PATCH v4 16/18] riscv: dts: thead: Introduce power domain nodes with aon firmware Michal Wilczynski
2025-01-28 19:48 ` [PATCH v4 17/18] riscv: dts: thead: Introduce reset controller node Michal Wilczynski
2025-01-28 19:48 ` [PATCH v4 18/18] riscv: dts: thead: Add GPU node to TH1520 device tree Michal Wilczynski
2025-01-31 15:39 ` [PATCH v4 00/18] Enable drm/imagination BXM-4-64 Support for LicheePi 4A Matt Coster
2025-02-03 16:33 ` Michal Wilczynski
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