From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE9112F260C; Wed, 17 Sep 2025 12:46:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758113172; cv=none; b=IMnZ4bdOyJNZ15M6OcFqSjna4R/AvDdxev9UGw0S7ZmMlvOGMJ0y+JY1i0Po95j4P8iVD/XvuL40zaSBixV/N/q9rLsSb5quXW2+d8qp4zEkD34LPPdsGhpw+VhqagIcQWDO4yOyy47Pzuq9sCZfFCEST30O6zXDpF+vntWBIC4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758113172; c=relaxed/simple; bh=z9vL7KS4PD0NoJis2TPK/ofu5rG6wwLVCIswPtiYVTs=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=qSaMm0RPG5lpYFt66VTM6YPa2OhPpZ/NTjpY94QwlrdO3WyPAt7Zxh54W0/mJ8U/F/rXkjwJ+mKHF2XNLxQ+haBiS95x+qutEYavxijTsiBPyiGvwG0de6Sw8hWJPGCnZNTsTJFEau7q/89so3eHPh26jdWyC13CsNOTTrNgWvE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=CLK0sXk8; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="CLK0sXk8" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1758113168; bh=z9vL7KS4PD0NoJis2TPK/ofu5rG6wwLVCIswPtiYVTs=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=CLK0sXk8uhvaEbPj8vEme7Acxg+YzE5WYHRgDiN/be+zE6GhPXdSqfUKuQW3KEWGn wYgvdvB3Pn1Q6rnTe3oVF87S+soDpREj6ldpNislgaIwdaifI8L+AfaF4FAgOycGtL WdlNQEfXs2y6AtdZ2F16rMWyPPz6Rvkpt2FfJ3F8dgsxTSUtm+ywLFbldTk3MMbylm mEBOgaP3Ur59wv017f/fMIFU0RlyssCpcwmkHLfN6gASeb9vmali7ITDI5NiNWz4UW WOKmain1f3MUL3XoTyoFhL/vqJv6BGNPxjWMuUMmCK+EP5C13v2XS9+OC05qcIP//S nOVwRFIxIOv6g== Received: from [192.168.1.100] (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: kholk11) by bali.collaboradmins.com (Postfix) with ESMTPSA id D488517E090E; Wed, 17 Sep 2025 14:46:07 +0200 (CEST) Message-ID: Date: Wed, 17 Sep 2025 14:46:07 +0200 Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 04/10] dt-bindings: mailbox: Add MT8196 GPUEB Mailbox To: Nicolas Frattaroli , Boris Brezillon , Steven Price , Liviu Dudau , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Jassi Brar , Kees Cook , "Gustavo A. R. Silva" , Chia-I Wu , Chen-Yu Tsai Cc: kernel@collabora.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org, linux-hardening@vger.kernel.org, Conor Dooley References: <20250917-mt8196-gpufreq-v3-0-c4ede4b4399e@collabora.com> <20250917-mt8196-gpufreq-v3-4-c4ede4b4399e@collabora.com> From: AngeloGioacchino Del Regno Content-Language: en-US In-Reply-To: <20250917-mt8196-gpufreq-v3-4-c4ede4b4399e@collabora.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Il 17/09/25 14:22, Nicolas Frattaroli ha scritto: > The MediaTek MT8196 SoC includes an embedded MCU referred to as "GPUEB", > acting as glue logic to control power and frequency of the Mali GPU. > This MCU runs special-purpose firmware for this use, and the main > application processor communicates with it through a mailbox. > > Add a binding that describes this mailbox. > > Acked-by: Conor Dooley > Signed-off-by: Nicolas Frattaroli > --- > .../mailbox/mediatek,mt8196-gpueb-mbox.yaml | 64 ++++++++++++++++++++++ > 1 file changed, 64 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpueb-mbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpueb-mbox.yaml > new file mode 100644 > index 0000000000000000000000000000000000000000..ab5b780cb83a708a3897ca1a440131d97b56c3a6 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpueb-mbox.yaml > @@ -0,0 +1,64 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mailbox/mediatek,mt8196-gpueb-mbox.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek MFlexGraphics GPUEB Mailbox Controller > + > +maintainers: > + - Nicolas Frattaroli > + > +properties: > + compatible: > + enum: > + - mediatek,mt8196-gpueb-mbox Before anyone asks - yes, it is 100% sure that SoCs will be added here sooner or later. Reviewed-by: AngeloGioacchino Del Regno