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Wed, 02 Sep 2026 05:45:05 -0700 (PDT) X-Received: by 2002:a05:6a00:420c:b0:84f:a170:4f5b with SMTP id d2e1a72fcca58-85ed6790ddfmr7638098b3a.8.1788353105212; Wed, 02 Sep 2026 05:45:05 -0700 (PDT) Received: from [10.218.33.235] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-85dc003a82bsm1286626b3a.33.2026.09.02.05.44.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 02 Sep 2026 05:45:04 -0700 (PDT) Message-ID: Date: Wed, 2 Sep 2026 18:14:55 +0530 Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Faruque Ansari Subject: Re: [PATCH v2 1/4] dt-bindings: power: reset: add PSCRR NVMEM recorder binding To: Krzysztof Kozlowski Cc: Oleksij Rempel , Pengutronix Kernel Team , Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Wim Van Sebroeck , Guenter Roeck , Benson Leung , Tzung-Bi Shih , Srinivas Kandagatla , Daniel Lezcano , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-watchdog@vger.kernel.org, Liam Girdwood , Mark Brown , "Rafael J. Wysocki" , Zhang Rui , Lukasz Luba , =?UTF-8?Q?S=C3=B8ren_Andersen?= , Guenter Roeck , Matti Vaittinen , Ahmad Fatoum , Andrew Morton , avaneesh.dwivedi@oss.qualcomm.com, Umang Chheda References: <20260819-pscrr-provider-v2-0-9072383e0f4d@oss.qualcomm.com> <20260819-pscrr-provider-v2-1-9072383e0f4d@oss.qualcomm.com> <20260827-spiffy-effective-hare-c05f53@quoll> Content-Language: en-US In-Reply-To: <20260827-spiffy-effective-hare-c05f53@quoll> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: Qpfr0PC3en2o6jJx-Ok_ml8zNBCY108w X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTAyMDExMyBTYWx0ZWRfX8pHVwvbiyq15 6JrjGnNdOG0SzsCt55ZPeFjrPglsyDAkJ0reKnkA2eVFk18afhiovqh2v+HHTgF33NkHHyWRfAs Xvv7zyrRVY1UsSt1scorbA1JZuv3EDyhVhjoSSCctbsLur2tkXDgfpYcD0ipD4znfzmZ2XOtxHK XFgqKVEesu+HIldCnykIMVxeILq79EiMhI/HZUwQ9dSG9ckZV+Jk3G13l2h8CXhJCpa6fQMNv8K gBEz8iK+4eNkcGfGuaXxZetirpHDKm3t5ylraWtEJh3v8R31e4+AlRtOb5fAUJgWMTkYi7DGdfA 9eF67qTgaxg5l5lODoPOjG4eg6P4/eVCEYB+bo5bglvR6WIDGytm3jpTO4jg8hBdet55IWogkHg ixxhr4JpGjrhJr1rtRP7/SsHpCxGRteuOosgZBeMN74Y3k6LkZ5TI2UsqpBUEpduh8s26ZyQZZT eNArAzxLjsCqJ/BbZkw== X-Proofpoint-GUID: Qpfr0PC3en2o6jJx-Ok_ml8zNBCY108w X-Authority-Analysis: v=2.4 cv=AufeGu9P c=1 sm=1 tr=0 ts=6a981a52 cx=c_pps a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=P-IC7800AAAA:8 a=gEfo2CItAAAA:8 a=EUspDBNiAAAA:8 a=pgIzJ0-J4Cnj9ACx_iUA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=IoOABgeZipijB_acs4fv:22 a=d3PnA9EDa4IxuAV0gXij:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTAyMDExMyBTYWx0ZWRfX13DPvVkmPCF5 RKjsVspZDZIK42b6Q6MdgXNv/Zum3n82Ce8jjbdEU0kmIBSBlLTgP9LXNl936kGqxO4M3WwKJyn qdiXIZu+CUutvIZQw3UBydMOC07aC0Y= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-02_03,2026-09-01_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 impostorscore=0 phishscore=0 spamscore=0 adultscore=0 suspectscore=0 priorityscore=1501 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609020113 Hi Krzysztof, On 27-Aug-26 3:15 PM, Krzysztof Kozlowski wrote: > On Wed, Aug 19, 2026 at 10:50:43PM +0530, Faruque Ansari wrote: >> Add binding for the PSCRR NVMEM recorder. Records the power state >> change reason into a small NVMEM cell, such as a PMIC SDAM byte or >> RTC scratch register — so the cause survives a power cycle and can be >> read back on the next boot. > > A nit, subject: drop second/last, redundant "binding". The > "dt-bindings" prefix is already stating that these are bindings. > See also: > https://elixir.bootlin.com/linux/v7.1-rc7/source/Documentation/devicetree/bindings/submitting-patches.rst#L23 > Thanks for the review. I'll fix this in V3. >> Signed-off-by: Faruque Ansari >> --- >> .../bindings/power/reset/pscrr-nvmem.yaml | 59 ++++++++++++++++++++++ >> MAINTAINERS | 1 + >> 2 files changed, 60 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/power/reset/pscrr-nvmem.yaml b/Documentation/devicetree/bindings/power/reset/pscrr-nvmem.yaml >> new file mode 100644 >> index 000000000000..5334c923d644 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/power/reset/pscrr-nvmem.yaml >> @@ -0,0 +1,59 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/power/reset/pscrr-nvmem.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: NVMEM Power State Change Reason recorder >> + >> +maintainers: >> + - Faruque Ansari >> + - Oleksij Rempel >> + >> +description: >> + An NVMEM-backed recorder for Power State Change Reasons (PSCRR). Persists >> + the reboot or shutdown cause into a small NVMEM cell, such as an RTC >> + scratch register, a PMIC SDAM (Scratch Data Access Memory) byte, or an >> + EEPROM — so the reason survives a power cycle and can be read back on the >> + next boot. The cell is referenced via the standard nvmem-cells consumer >> + binding. > > I do not see how this should be a separate device. This should be rather part > of PSCRR, reboot handler or just the nvmem. Otherwise it is just device > node for instantiating driver. There's already precedent in-tree for exactly this shape of binding: Documentation/devicetree/bindings/power/reset/nvmem-reboot-mode.yaml defines a standalone "nvmem-reboot-mode" compatible whose sole purpose is to bind an nvmem-cell and instantiate a driver that writes a reboot-mode value into it before reset, for the bootloader to read. pscrr-nvmem follows the same pattern: instead of a reboot-mode value for the bootloader, it records the PSCRR reason into an NVMEM cell before reset and reads it back on the next boot for PSCRR to report. Like nvmem-reboot-mode, it works with any NVMEM backend (RTC scratch register, PMIC SDAM, EEPROM, etc.). It doesn't fit cleanly into PSCRR core (hardware-agnostic, no NVMEM dependency today) or a specific reset handler (it only records the reason, it doesn't initiate the reset). Thanks, Faruque Ansari