* [PATCH v3 6/6] interconnect: Add OPP table support for interconnects
From: Saravana Kannan @ 2019-07-03 1:10 UTC (permalink / raw)
To: Georgi Djakov, Rob Herring, Mark Rutland, Viresh Kumar,
Nishanth Menon, Stephen Boyd, Rafael J. Wysocki
Cc: Saravana Kannan, vincent.guittot, seansw, daidavid1,
Rajendra Nayak, sibis, bjorn.andersson, evgreen, kernel-team,
linux-pm, devicetree, linux-kernel
In-Reply-To: <20190703011020.151615-1-saravanak@google.com>
Interconnect paths can have different performance points. Now that OPP
framework supports bandwidth OPP tables, add OPP table support for
interconnects.
Devices can use the interconnect-opp-table DT property to specify OPP
tables for interconnect paths. And the driver can obtain the OPP table for
an interconnect path by calling icc_get_opp_table().
Signed-off-by: Saravana Kannan <saravanak@google.com>
---
drivers/interconnect/core.c | 27 ++++++++++++++++++++++++++-
include/linux/interconnect.h | 7 +++++++
2 files changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/interconnect/core.c b/drivers/interconnect/core.c
index 871eb4bc4efc..881bac80bc1e 100644
--- a/drivers/interconnect/core.c
+++ b/drivers/interconnect/core.c
@@ -47,6 +47,7 @@ struct icc_req {
*/
struct icc_path {
size_t num_nodes;
+ struct opp_table *opp_table;
struct icc_req reqs[];
};
@@ -313,7 +314,7 @@ struct icc_path *of_icc_get(struct device *dev, const char *name)
{
struct icc_path *path = ERR_PTR(-EPROBE_DEFER);
struct icc_node *src_node, *dst_node;
- struct device_node *np = NULL;
+ struct device_node *np = NULL, *opp_node;
struct of_phandle_args src_args, dst_args;
int idx = 0;
int ret;
@@ -381,10 +382,34 @@ struct icc_path *of_icc_get(struct device *dev, const char *name)
dev_err(dev, "%s: invalid path=%ld\n", __func__, PTR_ERR(path));
mutex_unlock(&icc_lock);
+ opp_node = of_parse_phandle(np, "interconnect-opp-table", idx);
+ if (opp_node) {
+ path->opp_table = dev_pm_opp_of_find_table_from_node(opp_node);
+ of_node_put(opp_node);
+ }
+
+
return path;
}
EXPORT_SYMBOL_GPL(of_icc_get);
+/**
+ * icc_get_opp_table() - Get the OPP table that corresponds to a path
+ * @path: reference to the path returned by icc_get()
+ *
+ * This function will return the OPP table that corresponds to a path handle.
+ * If the interconnect API is disabled, NULL is returned and the consumer
+ * drivers will still build. Drivers are free to handle this specifically, but
+ * they don't have to.
+ *
+ * Return: opp_table pointer on success. NULL is returned when the API is
+ * disabled or the OPP table is missing.
+ */
+struct opp_table *icc_get_opp_table(struct icc_path *path)
+{
+ return path->opp_table;
+}
+
/**
* icc_set_bw() - set bandwidth constraints on an interconnect path
* @path: reference to the path returned by icc_get()
diff --git a/include/linux/interconnect.h b/include/linux/interconnect.h
index dc25864755ba..0c0bc55f0e89 100644
--- a/include/linux/interconnect.h
+++ b/include/linux/interconnect.h
@@ -9,6 +9,7 @@
#include <linux/mutex.h>
#include <linux/types.h>
+#include <linux/pm_opp.h>
/* macros for converting to icc units */
#define Bps_to_icc(x) ((x) / 1000)
@@ -28,6 +29,7 @@ struct device;
struct icc_path *icc_get(struct device *dev, const int src_id,
const int dst_id);
struct icc_path *of_icc_get(struct device *dev, const char *name);
+struct opp_table *icc_get_opp_table(struct icc_path *path);
void icc_put(struct icc_path *path);
int icc_set_bw(struct icc_path *path, u32 avg_bw, u32 peak_bw);
@@ -49,6 +51,11 @@ static inline void icc_put(struct icc_path *path)
{
}
+static inline struct opp_table *icc_get_opp_table(struct icc_path *path)
+{
+ return NULL;
+}
+
static inline int icc_set_bw(struct icc_path *path, u32 avg_bw, u32 peak_bw)
{
return 0;
--
2.22.0.410.gd8fdbe21b5-goog
^ permalink raw reply related
* [PATCH v3 5/6] dt-bindings: interconnect: Add interconnect-opp-table property
From: Saravana Kannan @ 2019-07-03 1:10 UTC (permalink / raw)
To: Georgi Djakov, Rob Herring, Mark Rutland, Viresh Kumar,
Nishanth Menon, Stephen Boyd, Rafael J. Wysocki
Cc: Saravana Kannan, vincent.guittot, seansw, daidavid1,
Rajendra Nayak, sibis, bjorn.andersson, evgreen, kernel-team,
linux-pm, devicetree, linux-kernel
In-Reply-To: <20190703011020.151615-1-saravanak@google.com>
Add support for listing bandwidth OPP tables for each interconnect path
listed using the interconnects property.
Signed-off-by: Saravana Kannan <saravanak@google.com>
---
.../devicetree/bindings/interconnect/interconnect.txt | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/interconnect/interconnect.txt b/Documentation/devicetree/bindings/interconnect/interconnect.txt
index 6f5d23a605b7..fc5b75b76a2c 100644
--- a/Documentation/devicetree/bindings/interconnect/interconnect.txt
+++ b/Documentation/devicetree/bindings/interconnect/interconnect.txt
@@ -55,10 +55,18 @@ interconnect-names : List of interconnect path name strings sorted in the same
* dma-mem: Path from the device to the main memory of
the system
+interconnect-opp-table: List of phandles to OPP tables (bandwidth OPP tables)
+ that specify the OPPs for the interconnect paths listed
+ in the interconnects property. This property can only
+ point to OPP tables that belong to the device and are
+ listed in the device's operating-points-v2 property.
+
Example:
sdhci@7864000 {
+ operating-points-v2 = <&sdhc_opp_table>, <&sdhc_mem_opp_table>;
...
interconnects = <&pnoc MASTER_SDCC_1 &bimc SLAVE_EBI_CH0>;
interconnect-names = "sdhc-mem";
+ interconnect-opp-table = <&sdhc_mem_opp_table>;
};
--
2.22.0.410.gd8fdbe21b5-goog
^ permalink raw reply related
* [PATCH v3 3/6] OPP: Add helper function for bandwidth OPP tables
From: Saravana Kannan @ 2019-07-03 1:10 UTC (permalink / raw)
To: Georgi Djakov, Rob Herring, Mark Rutland, Viresh Kumar,
Nishanth Menon, Stephen Boyd, Rafael J. Wysocki
Cc: Saravana Kannan, vincent.guittot, seansw, daidavid1,
Rajendra Nayak, sibis, bjorn.andersson, evgreen, kernel-team,
linux-pm, devicetree, linux-kernel
In-Reply-To: <20190703011020.151615-1-saravanak@google.com>
The frequency OPP tables have helper functions to search for entries in the
table based on frequency and get the frequency values for a given (or
suspend) OPP entry.
Add similar helper functions for bandwidth OPP tables to search for entries
in the table based on peak bandwidth and to get the peak and average
bandwidth for a given (or suspend) OPP entry.
Signed-off-by: Saravana Kannan <saravanak@google.com>
---
drivers/opp/core.c | 51 ++++++++++++++++++++++++++++++++++++++++++
include/linux/pm_opp.h | 19 ++++++++++++++++
2 files changed, 70 insertions(+)
diff --git a/drivers/opp/core.c b/drivers/opp/core.c
index 0e7703fe733f..0168862579f1 100644
--- a/drivers/opp/core.c
+++ b/drivers/opp/core.c
@@ -130,6 +130,29 @@ unsigned long dev_pm_opp_get_freq(struct dev_pm_opp *opp)
}
EXPORT_SYMBOL_GPL(dev_pm_opp_get_freq);
+/**
+ * dev_pm_opp_get_bw() - Gets the bandwidth corresponding to an available opp
+ * @opp: opp for which frequency has to be returned for
+ * @avg_bw: Pointer where the corresponding average bandwidth is stored.
+ * Can be NULL.
+ *
+ * Return: Peak bandwidth in KBps corresponding to the opp, else
+ * return 0
+ */
+unsigned long dev_pm_opp_get_bw(struct dev_pm_opp *opp, unsigned long *avg_bw)
+{
+ if (IS_ERR_OR_NULL(opp) || !opp->available) {
+ pr_err("%s: Invalid parameters\n", __func__);
+ return 0;
+ }
+
+ if (avg_bw)
+ *avg_bw = opp->avg_bw;
+
+ return opp->rate;
+}
+EXPORT_SYMBOL_GPL(dev_pm_opp_get_bw);
+
/**
* dev_pm_opp_get_level() - Gets the level corresponding to an available opp
* @opp: opp for which level value has to be returned for
@@ -302,6 +325,34 @@ unsigned long dev_pm_opp_get_suspend_opp_freq(struct device *dev)
}
EXPORT_SYMBOL_GPL(dev_pm_opp_get_suspend_opp_freq);
+/**
+ * dev_pm_opp_get_suspend_opp_bw() - Get peak bandwidth of suspend opp in KBps
+ * @dev: device for which we do this operation
+ * @avg_bw: Pointer where the corresponding average bandwidth is stored.
+ * Can be NULL.
+ *
+ * Return: This function returns the peak bandwidth of the OPP marked as
+ * suspend_opp if one is available, else returns 0;
+ */
+unsigned long dev_pm_opp_get_suspend_opp_bw(struct device *dev,
+ unsigned long *avg_bw)
+{
+ struct opp_table *opp_table;
+ unsigned long peak_bw = 0;
+
+ opp_table = _find_opp_table(dev);
+ if (IS_ERR(opp_table))
+ return 0;
+
+ if (opp_table->suspend_opp && opp_table->suspend_opp->available)
+ peak_bw = dev_pm_opp_get_bw(opp_table->suspend_opp, avg_bw);
+
+ dev_pm_opp_put_opp_table(opp_table);
+
+ return peak_bw;
+}
+EXPORT_SYMBOL_GPL(dev_pm_opp_get_suspend_opp_bw);
+
int _get_opp_count(struct opp_table *opp_table)
{
struct dev_pm_opp *opp;
diff --git a/include/linux/pm_opp.h b/include/linux/pm_opp.h
index b150fe97ce5a..d4d79ac0b5b2 100644
--- a/include/linux/pm_opp.h
+++ b/include/linux/pm_opp.h
@@ -85,6 +85,7 @@ void dev_pm_opp_put_opp_table(struct opp_table *opp_table);
unsigned long dev_pm_opp_get_voltage(struct dev_pm_opp *opp);
unsigned long dev_pm_opp_get_freq(struct dev_pm_opp *opp);
+unsigned long dev_pm_opp_get_bw(struct dev_pm_opp *opp, unsigned long *avg_bw);
unsigned int dev_pm_opp_get_level(struct dev_pm_opp *opp);
@@ -95,6 +96,8 @@ unsigned long dev_pm_opp_get_max_clock_latency(struct device *dev);
unsigned long dev_pm_opp_get_max_volt_latency(struct device *dev);
unsigned long dev_pm_opp_get_max_transition_latency(struct device *dev);
unsigned long dev_pm_opp_get_suspend_opp_freq(struct device *dev);
+unsigned long dev_pm_opp_get_suspend_opp_bw(struct device *dev,
+ unsigned long *avg_bw);
struct dev_pm_opp *dev_pm_opp_find_freq_exact(struct device *dev,
unsigned long freq,
@@ -161,6 +164,11 @@ static inline unsigned long dev_pm_opp_get_freq(struct dev_pm_opp *opp)
{
return 0;
}
+static inline unsigned long dev_pm_opp_get_bw(struct dev_pm_opp *opp,
+ unsigned long *avg_bw)
+{
+ return 0;
+}
static inline unsigned int dev_pm_opp_get_level(struct dev_pm_opp *opp)
{
@@ -197,6 +205,12 @@ static inline unsigned long dev_pm_opp_get_suspend_opp_freq(struct device *dev)
return 0;
}
+static inline unsigned long dev_pm_opp_get_suspend_opp_bw(struct device *dev,
+ unsigned long *avg_bw)
+{
+ return 0;
+}
+
static inline struct dev_pm_opp *dev_pm_opp_find_freq_exact(struct device *dev,
unsigned long freq, bool available)
{
@@ -332,6 +346,11 @@ static inline void dev_pm_opp_cpumask_remove_table(const struct cpumask *cpumask
#endif /* CONFIG_PM_OPP */
+#define dev_pm_opp_find_peak_bw_exact dev_pm_opp_find_freq_exact
+#define dev_pm_opp_find_peak_bw_floor dev_pm_opp_find_freq_floor
+#define dev_pm_opp_find_peak_bw_ceil_by_volt dev_pm_opp_find_freq_ceil_by_volt
+#define dev_pm_opp_find_peak_bw_ceil dev_pm_opp_find_freq_ceil
+
#if defined(CONFIG_PM_OPP) && defined(CONFIG_OF)
int dev_pm_opp_of_add_table(struct device *dev);
int dev_pm_opp_of_add_table_indexed(struct device *dev, int index);
--
2.22.0.410.gd8fdbe21b5-goog
^ permalink raw reply related
* [PATCH v3 0/6] Introduce Bandwidth OPPs for interconnect paths
From: Saravana Kannan @ 2019-07-03 1:10 UTC (permalink / raw)
To: Georgi Djakov, Rob Herring, Mark Rutland, Viresh Kumar,
Nishanth Menon, Stephen Boyd, Rafael J. Wysocki
Cc: Saravana Kannan, vincent.guittot, seansw, daidavid1,
Rajendra Nayak, sibis, bjorn.andersson, evgreen, kernel-team,
linux-pm, devicetree, linux-kernel
Interconnects and interconnect paths quantify their performance levels in
terms of bandwidth and not in terms of frequency. So similar to how we have
frequency based OPP tables in DT and in the OPP framework, we need
bandwidth OPP table support in the OPP framework and in DT. Since there can
be more than one interconnect path used by a device, we also need a way to
assign a bandwidth OPP table to an interconnect path.
This patch series:
- Adds opp-peak-KBps and opp-avg-KBps properties to OPP DT bindings
- Adds interconnect-opp-table property to interconnect DT bindings
- Adds OPP helper functions for bandwidth OPP tables
- Adds icc_get_opp_table() to get the OPP table for an interconnect path
So with the DT bindings added in this patch series, the DT for a GPU
that does bandwidth voting from GPU to Cache and GPU to DDR would look
something like this:
gpu_cache_opp_table: gpu_cache_opp_table {
compatible = "operating-points-v2";
gpu_cache_3000: opp-3000 {
opp-peak-KBps = <3000>;
opp-avg-KBps = <1000>;
};
gpu_cache_6000: opp-6000 {
opp-peak-KBps = <6000>;
opp-avg-KBps = <2000>;
};
gpu_cache_9000: opp-9000 {
opp-peak-KBps = <9000>;
opp-avg-KBps = <9000>;
};
};
gpu_ddr_opp_table: gpu_ddr_opp_table {
compatible = "operating-points-v2";
gpu_ddr_1525: opp-1525 {
opp-peak-KBps = <1525>;
opp-avg-KBps = <452>;
};
gpu_ddr_3051: opp-3051 {
opp-peak-KBps = <3051>;
opp-avg-KBps = <915>;
};
gpu_ddr_7500: opp-7500 {
opp-peak-KBps = <7500>;
opp-avg-KBps = <3000>;
};
};
gpu_opp_table: gpu_opp_table {
compatible = "operating-points-v2";
opp-shared;
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
};
};
gpu@7864000 {
...
operating-points-v2 = <&gpu_opp_table>, <&gpu_cache_opp_table>, <&gpu_ddr_opp_table>;
interconnects = <&mmnoc MASTER_GPU_1 &bimc SLAVE_SYSTEM_CACHE>,
<&mmnoc MASTER_GPU_1 &bimc SLAVE_DDR>;
interconnect-names = "gpu-cache", "gpu-mem";
interconnect-opp-table = <&gpu_cache_opp_table>, <&gpu_ddr_opp_table>
};
Cheers,
Saravana
Saravana Kannan (6):
dt-bindings: opp: Introduce opp-peak-KBps and opp-avg-KBps bindings
OPP: Add support for bandwidth OPP tables
OPP: Add helper function for bandwidth OPP tables
OPP: Add API to find an OPP table from its DT node
dt-bindings: interconnect: Add interconnect-opp-table property
interconnect: Add OPP table support for interconnects
.../bindings/interconnect/interconnect.txt | 8 ++
Documentation/devicetree/bindings/opp/opp.txt | 15 +++-
drivers/interconnect/core.c | 27 ++++++-
drivers/opp/core.c | 51 +++++++++++++
drivers/opp/of.c | 76 ++++++++++++++++---
drivers/opp/opp.h | 4 +-
include/linux/interconnect.h | 7 ++
include/linux/pm_opp.h | 26 +++++++
8 files changed, 199 insertions(+), 15 deletions(-)
--
2.22.0.410.gd8fdbe21b5-goog
^ permalink raw reply
* Re: [PATCH v2] PM: Move disabling/enabling runtime PM to suspend/resume noirq
From: Muchun Song @ 2019-07-03 0:56 UTC (permalink / raw)
To: Rafael J. Wysocki
Cc: Rafael J. Wysocki, Len Brown, Pavel Machek, Greg Kroah-Hartman,
Linux PM, Linux Kernel Mailing List
In-Reply-To: <CAJZ5v0jzVG5X8idR7Fy8g6=UPMpZ7eK6A_Uhqrer1aJFY1hX1w@mail.gmail.com>
Rafael J. Wysocki <rafael@kernel.org> 于2019年7月3日周三 上午1:54写道：
>
> On Tue, Jul 2, 2019 at 6:37 PM Muchun Song <smuchun@gmail.com> wrote:
> >
> > Currently, the PM core disables runtime PM for all devices right after
> > executing subsystem/driver .suspend_late() callbacks for them and
> > re-enables it right before executing subsystem/driver .resume_early()
> > callbacks for them. This may lead to problems when there are two devices
> > such that the irq handler thread function executed for one of them
> > depends on runtime PM working for the other. E.g. There are two devices,
> > one is i2c slave device depends on another device which can be the i2c
> > adapter device. The slave device can generate system wakeup signals and
> > is enabled to wake up the system(via call enable_irq_wake()). So, the irq
> > of slave device is enabled. If a wakeup signal generate after executing
> > subsystem/driver .suspend_late() callbacks. Then, the irq handler thread
> > function will be called(The irq is requested via request_threaded_irq())
> > and the slave device reads data via i2c adapter device(via i2c_transfer()).
> > In that case, it may be failed to read data because of the runtime PM
> > disabled.
> >
> > It is also analogously for resume. If a wakeup signal generate when the
> > system is in the sleep state. The irq handler thread function may be
> > called before executing subsystem/driver .resume_early(). In that case,
> > it also may be failed to read data because of the runtime PM disabled.
> >
>
> This has been discussed for a number of times, documented and no, I'm
> not going to apply this patch.
Thanks for your reply. I want to know why we can't do that, so where
can I find the discussion?
> PM-runtime cannot be relied on during the "noirq" stages of suspend
> and resume, which is why it is disabled by the core in the "late" and
> "early" stages, respectively.
>
What better solution do we have for the example I am talking about
which is described in the commit message? Thanks.
Yours,
Muchun
^ permalink raw reply
* Re: [PATCH 03/13] intel_rapl: introduce intel_rapl.h
From: Rafael J. Wysocki @ 2019-07-02 22:01 UTC (permalink / raw)
To: Zhang Rui; +Cc: Rafael J. Wysocki, Linux PM, Pandruvada, Srinivas
In-Reply-To: <1561701029-3415-4-git-send-email-rui.zhang@intel.com>
On Fri, Jun 28, 2019 at 7:50 AM Zhang Rui <rui.zhang@intel.com> wrote:
>
> Create a new header file for the common definitions that might be used
> by different RAPL Interface.
>
> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
> ---
> MAINTAINERS | 1 +
> drivers/powercap/intel_rapl.c | 101 +------------------------------------
> include/linux/intel_rapl.h | 113 ++++++++++++++++++++++++++++++++++++++++++
Does the header need to go into include/linux?
That is, what is there in addition to the code under drivers/powercap/
that will need that header file?
^ permalink raw reply
* [Bug 120561] powernow_k8 causes kernel panic during block device write access
From: bugzilla-daemon @ 2019-07-02 22:21 UTC (permalink / raw)
To: linux-pm
In-Reply-To: <bug-120561-137361@https.bugzilla.kernel.org/>
https://bugzilla.kernel.org/show_bug.cgi?id=120561
kr@sognnes.no changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |RESOLVED
Resolution|--- |CODE_FIX
--- Comment #3 from kr@sognnes.no ---
It seems this bug was caused by the kernel misidentifying the number of
available PowerNow states on certain AMD CPUs, and was thus very CPU-specific.
As of right now, none of the currently supported kernels (4.4.184, 4.9.184,
4.14.131, 4.19.56, and 5.1.15) have any issues with the particular AMD CPU on
the system that originally exhibited the problem.
The newer kernels all report significantly fewer power states, and the ondemand
governor can now be enabled without issue.
--
You are receiving this mail because:
You are the assignee for the bug.
^ permalink raw reply
* Re: [PATCH 06/13] intel_rapl: abstract register access operations
From: Rafael J. Wysocki @ 2019-07-02 21:56 UTC (permalink / raw)
To: Zhang Rui; +Cc: Rafael J. Wysocki, Linux PM, Pandruvada, Srinivas
In-Reply-To: <1561701029-3415-7-git-send-email-rui.zhang@intel.com>
On Fri, Jun 28, 2019 at 7:50 AM Zhang Rui <rui.zhang@intel.com> wrote:
>
> MSR and MMIO RAPL interfaces have different ways to access the registers,
> thus in order to abstract the register access operations, two callbacks,
> .read_raw()/.write_raw() are introduced, and they should be implemented by
> MSR RAPL and MMIO RAPL interface driver respectly.
However, this patch implements them for the MSR I/F only.
> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
> ---
> drivers/powercap/intel_rapl.c | 111 ++++++++++++++++++++++--------------------
> include/linux/intel_rapl.h | 9 ++++
> 2 files changed, 67 insertions(+), 53 deletions(-)
>
> diff --git a/drivers/powercap/intel_rapl.c b/drivers/powercap/intel_rapl.c
> index 70990ff..7dc9965 100644
> --- a/drivers/powercap/intel_rapl.c
> +++ b/drivers/powercap/intel_rapl.c
> @@ -92,13 +92,6 @@ static struct rapl_priv rapl_msr_priv = {
> /* per domain data, some are optional */
> #define NR_RAW_PRIMITIVES (NR_RAPL_PRIMITIVES - 2)
>
> -struct msrl_action {
> - u32 msr_no;
> - u64 clear_mask;
> - u64 set_mask;
> - int err;
> -};
> -
> #define DOMAIN_STATE_INACTIVE BIT(0)
> #define DOMAIN_STATE_POWER_LIMIT_SET BIT(1)
> #define DOMAIN_STATE_BIOS_LOCKED BIT(2)
> @@ -691,16 +684,16 @@ static int rapl_read_data_raw(struct rapl_domain *rd,
> enum rapl_primitives prim,
> bool xlate, u64 *data)
> {
> - u64 value, final;
> - u32 msr;
> + u64 value;
> struct rapl_primitive_info *rp = &rpi[prim];
> + struct reg_action ra;
> int cpu;
>
> if (!rp->name || rp->flag & RAPL_PRIMITIVE_DUMMY)
> return -EINVAL;
>
> - msr = rd->regs[rp->id];
> - if (!msr)
> + ra.reg = rd->regs[rp->id];
> + if (!ra.reg)
> return -EINVAL;
>
> cpu = rd->rp->lead_cpu;
> @@ -716,47 +709,23 @@ static int rapl_read_data_raw(struct rapl_domain *rd,
> return 0;
> }
>
> - if (rdmsrl_safe_on_cpu(cpu, msr, &value)) {
> - pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu);
> + ra.mask = rp->mask;
> +
> + if (rd->rp->priv->read_raw(cpu, &ra)) {
> + pr_debug("failed to read reg 0x%x on cpu %d\n", ra.reg, cpu);
> return -EIO;
> }
>
> - final = value & rp->mask;
> - final = final >> rp->shift;
> + value = ra.value >> rp->shift;
> +
> if (xlate)
> - *data = rapl_unit_xlate(rd, rp->unit, final, 0);
> + *data = rapl_unit_xlate(rd, rp->unit, value, 0);
> else
> - *data = final;
> + *data = value;
>
> return 0;
> }
>
> -
> -static int msrl_update_safe(u32 msr_no, u64 clear_mask, u64 set_mask)
> -{
> - int err;
> - u64 val;
> -
> - err = rdmsrl_safe(msr_no, &val);
> - if (err)
> - goto out;
> -
> - val &= ~clear_mask;
> - val |= set_mask;
> -
> - err = wrmsrl_safe(msr_no, val);
> -
> -out:
> - return err;
> -}
> -
> -static void msrl_update_func(void *info)
> -{
> - struct msrl_action *ma = info;
> -
> - ma->err = msrl_update_safe(ma->msr_no, ma->clear_mask, ma->set_mask);
> -}
> -
> /* Similar use of primitive info in the read counterpart */
> static int rapl_write_data_raw(struct rapl_domain *rd,
> enum rapl_primitives prim,
> @@ -765,7 +734,7 @@ static int rapl_write_data_raw(struct rapl_domain *rd,
> struct rapl_primitive_info *rp = &rpi[prim];
> int cpu;
> u64 bits;
> - struct msrl_action ma;
> + struct reg_action ra;
> int ret;
>
> cpu = rd->rp->lead_cpu;
> @@ -773,17 +742,13 @@ static int rapl_write_data_raw(struct rapl_domain *rd,
> bits <<= rp->shift;
> bits &= rp->mask;
>
> - memset(&ma, 0, sizeof(ma));
> + memset(&ra, 0, sizeof(ra));
>
> - ma.msr_no = rd->regs[rp->id];
> - ma.clear_mask = rp->mask;
> - ma.set_mask = bits;
> + ra.reg = rd->regs[rp->id];
> + ra.mask = rp->mask;
> + ra.value = bits;
>
> - ret = smp_call_function_single(cpu, msrl_update_func, &ma, 1);
> - if (ret)
> - WARN_ON_ONCE(ret);
> - else
> - ret = ma.err;
> + ret = rd->rp->priv->write_raw(cpu, &ra);
>
> return ret;
> }
> @@ -1506,6 +1471,44 @@ static struct notifier_block rapl_pm_notifier = {
> .notifier_call = rapl_pm_callback,
> };
>
> +static int rapl_msr_read_raw(int cpu, struct reg_action *ra)
> +{
> + if (rdmsrl_safe_on_cpu(cpu, ra->reg, &ra->value)) {
> + pr_debug("failed to read msr 0x%x on cpu %d\n", ra->reg, cpu);
> + return -EIO;
> + }
> + ra->value &= ra->mask;
> + return 0;
> +}
> +
> +static void rapl_msr_update_func(void *info)
> +{
> + struct reg_action *ra = info;
> + u64 val;
> +
> + ra->err = rdmsrl_safe(ra->reg, &val);
> + if (ra->err)
> + return;
> +
> + val &= ~ra->mask;
> + val |= ra->value;
> +
> + ra->err = wrmsrl_safe(ra->reg, val);
> +}
> +
> +
> +static int rapl_msr_write_raw(int cpu, struct reg_action *ra)
> +{
> + int ret;
> +
> + ret = smp_call_function_single(cpu, rapl_msr_update_func, ra, 1);
> + if (ret)
> + WARN_ON_ONCE(ret);
> + else
> + ret = ra->err;
> + return ret;
I would prefer the above to be written as:
ret = smp_call_function_single(cpu, rapl_msr_update_func, ra, 1);
if (WARN_ON_ONCE(ret))
return ret;
return ra->err;
> +}
> +
> static int __init rapl_init(void)
> {
> const struct x86_cpu_id *id;
> @@ -1521,6 +1524,8 @@ static int __init rapl_init(void)
>
> rapl_defaults = (struct rapl_defaults *)id->driver_data;
>
> + rapl_msr_priv.read_raw = rapl_msr_read_raw;
> + rapl_msr_priv.write_raw = rapl_msr_write_raw;
> ret = rapl_register_powercap();
> if (ret)
> return ret;
> diff --git a/include/linux/intel_rapl.h b/include/linux/intel_rapl.h
> index 0277579..1a0df65 100644
> --- a/include/linux/intel_rapl.h
> +++ b/include/linux/intel_rapl.h
> @@ -88,12 +88,21 @@ struct rapl_domain {
> struct rapl_package *rp;
> };
>
> +struct reg_action {
> + u32 reg;
> + u64 mask;
> + u64 value;
> + int err;
> +};
> +
> struct rapl_priv {
> struct powercap_control_type *control_type;
> struct rapl_domain *platform_rapl_domain;
> enum cpuhp_state pcap_rapl_online;
> u32 reg_unit;
> u32 regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX];
> + int (*read_raw)(int cpu, struct reg_action *ra);
> + int (*write_raw)(int cpu, struct reg_action *ra);
> };
>
> /* maximum rapl package domain name: package-%d-die-%d */
> --
> 2.7.4
>
^ permalink raw reply
* Re: [PATCH 09/13] intel_rapl: abstract RAPL common code
From: Pandruvada, Srinivas @ 2019-07-02 22:45 UTC (permalink / raw)
To: Zhang, Rui, rjw@rjwysocki.net; +Cc: linux-pm@vger.kernel.org
In-Reply-To: <1561701029-3415-10-git-send-email-rui.zhang@intel.com>
[-- Attachment #1: Type: text/plain, Size: 95258 bytes --]
On Fri, 2019-06-28 at 13:50 +0800, Zhang Rui wrote:
> Split intel_rapl.c to intel_rapl_common.c and intel_rapl.c, where
> intel_rapl_common.c contains the common code that can be used by both
> MSR
> and MMIO interface.
> intel_rapl.c still contains the implementation of RAPL MSR interface.
>
Are we covered for this scenarios, when rapl_defaults variable is NULL?
- intel_rapl_common.ko is not loaded prior because of no cpuid was
added but the processor thermal device calls rapl_add_package() is
called. Since we will dereference rapl_default->check_units(), this
will fault.
- The PCI driver is enumerated before, which is probably unlikely but
if loads first and registers cpu_online call back and will results in
calls for rapl_add_package().
I think it will be safe to point
struct rapl_defaults *rapl_defaults_core = rapl_defaults_core;
In this way we can avoid this issues.
Thanks,
Srinivas
> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
> ---
> drivers/powercap/Kconfig | 11 +-
> drivers/powercap/Makefile | 1 +
> drivers/powercap/intel_rapl.c | 1427 +-----------------------
> ---------
> drivers/powercap/intel_rapl_common.c | 1468
> ++++++++++++++++++++++++++++++++++
> include/linux/intel_rapl.h | 7 +
> 5 files changed, 1491 insertions(+), 1423 deletions(-)
> create mode 100644 drivers/powercap/intel_rapl_common.c
>
> diff --git a/drivers/powercap/Kconfig b/drivers/powercap/Kconfig
> index 42d3798..dc1c138 100644
> --- a/drivers/powercap/Kconfig
> +++ b/drivers/powercap/Kconfig
> @@ -16,14 +16,17 @@ menuconfig POWERCAP
>
> if POWERCAP
> # Client driver configurations go here.
> +config INTEL_RAPL_CORE
> + tristate
> +
> config INTEL_RAPL
> - tristate "Intel RAPL Support"
> + tristate "Intel RAPL Support via MSR Interface"
> depends on X86 && IOSF_MBI
> - default n
> + select INTEL_RAPL_CORE
> ---help---
> This enables support for the Intel Running Average Power
> Limit (RAPL)
> - technology which allows power limits to be enforced and
> monitored on
> - modern Intel processors (Sandy Bridge and later).
> + technology via MSR interface, which allows power limits to be
> enforced
> + and monitored on modern Intel processors (Sandy Bridge and
> later).
>
> In RAPL, the platform level settings are divided into domains
> for
> fine grained control. These domains include processor
> package, DRAM
> diff --git a/drivers/powercap/Makefile b/drivers/powercap/Makefile
> index 81c8cca..a692c6f 100644
> --- a/drivers/powercap/Makefile
> +++ b/drivers/powercap/Makefile
> @@ -1,4 +1,5 @@
> # SPDX-License-Identifier: GPL-2.0-only
> obj-$(CONFIG_POWERCAP) += powercap_sys.o
> +obj-$(CONFIG_INTEL_RAPL_CORE) += intel_rapl_common.o
> obj-$(CONFIG_INTEL_RAPL) += intel_rapl.o
> obj-$(CONFIG_IDLE_INJECT) += idle_inject.o
> diff --git a/drivers/powercap/intel_rapl.c
> b/drivers/powercap/intel_rapl.c
> index e476bd1..67130c4 100644
> --- a/drivers/powercap/intel_rapl.c
> +++ b/drivers/powercap/intel_rapl.c
> @@ -28,53 +28,6 @@
> /* Local defines */
> #define MSR_PLATFORM_POWER_LIMIT 0x0000065C
>
> -/* bitmasks for RAPL MSRs, used by primitive access functions */
> -#define ENERGY_STATUS_MASK 0xffffffff
> -
> -#define POWER_LIMIT1_MASK 0x7FFF
> -#define POWER_LIMIT1_ENABLE BIT(15)
> -#define POWER_LIMIT1_CLAMP BIT(16)
> -
> -#define POWER_LIMIT2_MASK (0x7FFFULL<<32)
> -#define POWER_LIMIT2_ENABLE BIT_ULL(47)
> -#define POWER_LIMIT2_CLAMP BIT_ULL(48)
> -#define POWER_PACKAGE_LOCK BIT_ULL(63)
> -#define POWER_PP_LOCK BIT(31)
> -
> -#define TIME_WINDOW1_MASK (0x7FULL<<17)
> -#define TIME_WINDOW2_MASK (0x7FULL<<49)
> -
> -#define POWER_UNIT_OFFSET 0
> -#define POWER_UNIT_MASK 0x0F
> -
> -#define ENERGY_UNIT_OFFSET 0x08
> -#define ENERGY_UNIT_MASK 0x1F00
> -
> -#define TIME_UNIT_OFFSET 0x10
> -#define TIME_UNIT_MASK 0xF0000
> -
> -#define POWER_INFO_MAX_MASK (0x7fffULL<<32)
> -#define POWER_INFO_MIN_MASK (0x7fffULL<<16)
> -#define POWER_INFO_MAX_TIME_WIN_MASK (0x3fULL<<48)
> -#define POWER_INFO_THERMAL_SPEC_MASK 0x7fff
> -
> -#define PERF_STATUS_THROTTLE_TIME_MASK 0xffffffff
> -#define PP_POLICY_MASK 0x1F
> -
> -/* Non HW constants */
> -#define RAPL_PRIMITIVE_DERIVED BIT(1) /* not from raw data */
> -#define RAPL_PRIMITIVE_DUMMY BIT(2)
> -
> -#define TIME_WINDOW_MAX_MSEC 40000
> -#define TIME_WINDOW_MIN_MSEC 250
> -#define ENERGY_UNIT_SCALE 1000 /* scale from driver unit to
> powercap unit */
> -enum unit_type {
> - ARBITRARY_UNIT, /* no translation */
> - POWER_UNIT,
> - ENERGY_UNIT,
> - TIME_UNIT,
> -};
> -
> static struct rapl_priv rapl_msr_priv = {
> .reg_unit = MSR_RAPL_POWER_UNIT,
> .regs[RAPL_DOMAIN_PACKAGE] = {
> @@ -89,1265 +42,6 @@ static struct rapl_priv rapl_msr_priv = {
> MSR_PLATFORM_POWER_LIMIT, MSR_PLATFORM_ENERGY_STATUS,
> 0, 0, 0},
> };
>
> -/* per domain data, some are optional */
> -#define NR_RAW_PRIMITIVES (NR_RAPL_PRIMITIVES - 2)
> -
> -#define DOMAIN_STATE_INACTIVE BIT(0)
> -#define DOMAIN_STATE_POWER_LIMIT_SET BIT(1)
> -#define DOMAIN_STATE_BIOS_LOCKED BIT(2)
> -
> -static const char pl1_name[] = "long_term";
> -static const char pl2_name[] = "short_term";
> -
> -#define power_zone_to_rapl_domain(_zone) \
> - container_of(_zone, struct rapl_domain, power_zone)
> -
> -struct rapl_defaults {
> - u8 floor_freq_reg_addr;
> - int (*check_unit)(struct rapl_package *rp, int cpu);
> - void (*set_floor_freq)(struct rapl_domain *rd, bool mode);
> - u64 (*compute_time_window)(struct rapl_package *rp, u64 val,
> - bool to_raw);
> - unsigned int dram_domain_energy_unit;
> -};
> -static struct rapl_defaults *rapl_defaults;
> -
> -/* Sideband MBI registers */
> -#define IOSF_CPU_POWER_BUDGET_CTL_BYT (0x2)
> -#define IOSF_CPU_POWER_BUDGET_CTL_TNG (0xdf)
> -
> -#define PACKAGE_PLN_INT_SAVED BIT(0)
> -#define MAX_PRIM_NAME (32)
> -
> -/* per domain data. used to describe individual knobs such that
> access function
> - * can be consolidated into one instead of many inline functions.
> - */
> -struct rapl_primitive_info {
> - const char *name;
> - u64 mask;
> - int shift;
> - enum rapl_domain_reg_id id;
> - enum unit_type unit;
> - u32 flag;
> -};
> -
> -#define PRIMITIVE_INFO_INIT(p, m, s, i, u, f) { \
> - .name = #p, \
> - .mask = m, \
> - .shift = s, \
> - .id = i, \
> - .unit = u, \
> - .flag = f \
> - }
> -
> -static void rapl_init_domains(struct rapl_package *rp);
> -static int rapl_read_data_raw(struct rapl_domain *rd,
> - enum rapl_primitives prim,
> - bool xlate, u64 *data);
> -static int rapl_write_data_raw(struct rapl_domain *rd,
> - enum rapl_primitives prim,
> - unsigned long long value);
> -static u64 rapl_unit_xlate(struct rapl_domain *rd,
> - enum unit_type type, u64 value,
> - int to_raw);
> -static void package_power_limit_irq_save(struct rapl_package *rp);
> -
> -static LIST_HEAD(rapl_packages); /* guarded by CPU hotplug lock */
> -
> -static const char * const rapl_domain_names[] = {
> - "package",
> - "core",
> - "uncore",
> - "dram",
> - "psys",
> -};
> -
> -/* caller to ensure CPU hotplug lock is held */
> -static struct rapl_package *rapl_find_package_domain(int cpu, struct
> rapl_priv *priv)
> -{
> - int id = topology_logical_die_id(cpu);
> - struct rapl_package *rp;
> -
> - list_for_each_entry(rp, &rapl_packages, plist) {
> - if (rp->id == id && rp->priv->control_type == priv-
> >control_type)
> - return rp;
> - }
> -
> - return NULL;
> -}
> -
> -static int get_energy_counter(struct powercap_zone *power_zone, u64
> *energy_raw)
> -{
> - struct rapl_domain *rd;
> - u64 energy_now;
> -
> - /* prevent CPU hotplug, make sure the RAPL domain does not go
> - * away while reading the counter.
> - */
> - get_online_cpus();
> - rd = power_zone_to_rapl_domain(power_zone);
> -
> - if (!rapl_read_data_raw(rd, ENERGY_COUNTER, true, &energy_now))
> {
> - *energy_raw = energy_now;
> - put_online_cpus();
> -
> - return 0;
> - }
> - put_online_cpus();
> -
> - return -EIO;
> -}
> -
> -static int get_max_energy_counter(struct powercap_zone *pcd_dev, u64
> *energy)
> -{
> - struct rapl_domain *rd = power_zone_to_rapl_domain(pcd_dev);
> -
> - *energy = rapl_unit_xlate(rd, ENERGY_UNIT, ENERGY_STATUS_MASK,
> 0);
> - return 0;
> -}
> -
> -static int release_zone(struct powercap_zone *power_zone)
> -{
> - struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone);
> - struct rapl_package *rp = rd->rp;
> -
> - /* package zone is the last zone of a package, we can free
> - * memory here since all children has been unregistered.
> - */
> - if (rd->id == RAPL_DOMAIN_PACKAGE) {
> - kfree(rd);
> - rp->domains = NULL;
> - }
> -
> - return 0;
> -
> -}
> -
> -static int find_nr_power_limit(struct rapl_domain *rd)
> -{
> - int i, nr_pl = 0;
> -
> - for (i = 0; i < NR_POWER_LIMITS; i++) {
> - if (rd->rpl[i].name)
> - nr_pl++;
> - }
> -
> - return nr_pl;
> -}
> -
> -static int set_domain_enable(struct powercap_zone *power_zone, bool
> mode)
> -{
> - struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone);
> -
> - if (rd->state & DOMAIN_STATE_BIOS_LOCKED)
> - return -EACCES;
> -
> - get_online_cpus();
> - rapl_write_data_raw(rd, PL1_ENABLE, mode);
> - if (rapl_defaults->set_floor_freq)
> - rapl_defaults->set_floor_freq(rd, mode);
> - put_online_cpus();
> -
> - return 0;
> -}
> -
> -static int get_domain_enable(struct powercap_zone *power_zone, bool
> *mode)
> -{
> - struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone);
> - u64 val;
> -
> - if (rd->state & DOMAIN_STATE_BIOS_LOCKED) {
> - *mode = false;
> - return 0;
> - }
> - get_online_cpus();
> - if (rapl_read_data_raw(rd, PL1_ENABLE, true, &val)) {
> - put_online_cpus();
> - return -EIO;
> - }
> - *mode = val;
> - put_online_cpus();
> -
> - return 0;
> -}
> -
> -/* per RAPL domain ops, in the order of rapl_domain_type */
> -static const struct powercap_zone_ops zone_ops[] = {
> - /* RAPL_DOMAIN_PACKAGE */
> - {
> - .get_energy_uj = get_energy_counter,
> - .get_max_energy_range_uj = get_max_energy_counter,
> - .release = release_zone,
> - .set_enable = set_domain_enable,
> - .get_enable = get_domain_enable,
> - },
> - /* RAPL_DOMAIN_PP0 */
> - {
> - .get_energy_uj = get_energy_counter,
> - .get_max_energy_range_uj = get_max_energy_counter,
> - .release = release_zone,
> - .set_enable = set_domain_enable,
> - .get_enable = get_domain_enable,
> - },
> - /* RAPL_DOMAIN_PP1 */
> - {
> - .get_energy_uj = get_energy_counter,
> - .get_max_energy_range_uj = get_max_energy_counter,
> - .release = release_zone,
> - .set_enable = set_domain_enable,
> - .get_enable = get_domain_enable,
> - },
> - /* RAPL_DOMAIN_DRAM */
> - {
> - .get_energy_uj = get_energy_counter,
> - .get_max_energy_range_uj = get_max_energy_counter,
> - .release = release_zone,
> - .set_enable = set_domain_enable,
> - .get_enable = get_domain_enable,
> - },
> - /* RAPL_DOMAIN_PLATFORM */
> - {
> - .get_energy_uj = get_energy_counter,
> - .get_max_energy_range_uj = get_max_energy_counter,
> - .release = release_zone,
> - .set_enable = set_domain_enable,
> - .get_enable = get_domain_enable,
> - },
> -};
> -
> -
> -/*
> - * Constraint index used by powercap can be different than power
> limit (PL)
> - * index in that some PLs maybe missing due to non-existant MSRs.
> So we
> - * need to convert here by finding the valid PLs only (name
> populated).
> - */
> -static int contraint_to_pl(struct rapl_domain *rd, int cid)
> -{
> - int i, j;
> -
> - for (i = 0, j = 0; i < NR_POWER_LIMITS; i++) {
> - if ((rd->rpl[i].name) && j++ == cid) {
> - pr_debug("%s: index %d\n", __func__, i);
> - return i;
> - }
> - }
> - pr_err("Cannot find matching power limit for constraint %d\n",
> cid);
> -
> - return -EINVAL;
> -}
> -
> -static int set_power_limit(struct powercap_zone *power_zone, int
> cid,
> - u64 power_limit)
> -{
> - struct rapl_domain *rd;
> - struct rapl_package *rp;
> - int ret = 0;
> - int id;
> -
> - get_online_cpus();
> - rd = power_zone_to_rapl_domain(power_zone);
> - id = contraint_to_pl(rd, cid);
> - if (id < 0) {
> - ret = id;
> - goto set_exit;
> - }
> -
> - rp = rd->rp;
> -
> - if (rd->state & DOMAIN_STATE_BIOS_LOCKED) {
> - dev_warn(&power_zone->dev, "%s locked by BIOS,
> monitoring only\n",
> - rd->name);
> - ret = -EACCES;
> - goto set_exit;
> - }
> -
> - switch (rd->rpl[id].prim_id) {
> - case PL1_ENABLE:
> - rapl_write_data_raw(rd, POWER_LIMIT1, power_limit);
> - break;
> - case PL2_ENABLE:
> - rapl_write_data_raw(rd, POWER_LIMIT2, power_limit);
> - break;
> - default:
> - ret = -EINVAL;
> - }
> - if (!ret)
> - package_power_limit_irq_save(rp);
> -set_exit:
> - put_online_cpus();
> - return ret;
> -}
> -
> -static int get_current_power_limit(struct powercap_zone *power_zone,
> int cid,
> - u64 *data)
> -{
> - struct rapl_domain *rd;
> - u64 val;
> - int prim;
> - int ret = 0;
> - int id;
> -
> - get_online_cpus();
> - rd = power_zone_to_rapl_domain(power_zone);
> - id = contraint_to_pl(rd, cid);
> - if (id < 0) {
> - ret = id;
> - goto get_exit;
> - }
> -
> - switch (rd->rpl[id].prim_id) {
> - case PL1_ENABLE:
> - prim = POWER_LIMIT1;
> - break;
> - case PL2_ENABLE:
> - prim = POWER_LIMIT2;
> - break;
> - default:
> - put_online_cpus();
> - return -EINVAL;
> - }
> - if (rapl_read_data_raw(rd, prim, true, &val))
> - ret = -EIO;
> - else
> - *data = val;
> -
> -get_exit:
> - put_online_cpus();
> -
> - return ret;
> -}
> -
> -static int set_time_window(struct powercap_zone *power_zone, int
> cid,
> - u64
> window)
> -{
> - struct rapl_domain *rd;
> - int ret = 0;
> - int id;
> -
> - get_online_cpus();
> - rd = power_zone_to_rapl_domain(power_zone);
> - id = contraint_to_pl(rd, cid);
> - if (id < 0) {
> - ret = id;
> - goto set_time_exit;
> - }
> -
> - switch (rd->rpl[id].prim_id) {
> - case PL1_ENABLE:
> - rapl_write_data_raw(rd, TIME_WINDOW1, window);
> - break;
> - case PL2_ENABLE:
> - rapl_write_data_raw(rd, TIME_WINDOW2, window);
> - break;
> - default:
> - ret = -EINVAL;
> - }
> -
> -set_time_exit:
> - put_online_cpus();
> - return ret;
> -}
> -
> -static int get_time_window(struct powercap_zone *power_zone, int
> cid, u64 *data)
> -{
> - struct rapl_domain *rd;
> - u64 val;
> - int ret = 0;
> - int id;
> -
> - get_online_cpus();
> - rd = power_zone_to_rapl_domain(power_zone);
> - id = contraint_to_pl(rd, cid);
> - if (id < 0) {
> - ret = id;
> - goto get_time_exit;
> - }
> -
> - switch (rd->rpl[id].prim_id) {
> - case PL1_ENABLE:
> - ret = rapl_read_data_raw(rd, TIME_WINDOW1, true, &val);
> - break;
> - case PL2_ENABLE:
> - ret = rapl_read_data_raw(rd, TIME_WINDOW2, true, &val);
> - break;
> - default:
> - put_online_cpus();
> - return -EINVAL;
> - }
> - if (!ret)
> - *data = val;
> -
> -get_time_exit:
> - put_online_cpus();
> -
> - return ret;
> -}
> -
> -static const char *get_constraint_name(struct powercap_zone
> *power_zone, int cid)
> -{
> - struct rapl_domain *rd;
> - int id;
> -
> - rd = power_zone_to_rapl_domain(power_zone);
> - id = contraint_to_pl(rd, cid);
> - if (id >= 0)
> - return rd->rpl[id].name;
> -
> - return NULL;
> -}
> -
> -
> -static int get_max_power(struct powercap_zone *power_zone, int id,
> - u64 *data)
> -{
> - struct rapl_domain *rd;
> - u64 val;
> - int prim;
> - int ret = 0;
> -
> - get_online_cpus();
> - rd = power_zone_to_rapl_domain(power_zone);
> - switch (rd->rpl[id].prim_id) {
> - case PL1_ENABLE:
> - prim = THERMAL_SPEC_POWER;
> - break;
> - case PL2_ENABLE:
> - prim = MAX_POWER;
> - break;
> - default:
> - put_online_cpus();
> - return -EINVAL;
> - }
> - if (rapl_read_data_raw(rd, prim, true, &val))
> - ret = -EIO;
> - else
> - *data = val;
> -
> - put_online_cpus();
> -
> - return ret;
> -}
> -
> -static const struct powercap_zone_constraint_ops constraint_ops = {
> - .set_power_limit_uw = set_power_limit,
> - .get_power_limit_uw = get_current_power_limit,
> - .set_time_window_us = set_time_window,
> - .get_time_window_us = get_time_window,
> - .get_max_power_uw = get_max_power,
> - .get_name = get_constraint_name,
> -};
> -
> -/* called after domain detection and package level data are set */
> -static void rapl_init_domains(struct rapl_package *rp)
> -{
> - int i;
> - struct rapl_domain *rd = rp->domains;
> -
> - for (i = 0; i < RAPL_DOMAIN_MAX; i++) {
> - unsigned int mask = rp->domain_map & (1 << i);
> -
> - rd->regs[RAPL_DOMAIN_REG_LIMIT] = rp->priv-
> >regs[i][RAPL_DOMAIN_REG_LIMIT];
> - rd->regs[RAPL_DOMAIN_REG_STATUS] = rp->priv-
> >regs[i][RAPL_DOMAIN_REG_STATUS];
> - rd->regs[RAPL_DOMAIN_REG_PERF] = rp->priv-
> >regs[i][RAPL_DOMAIN_REG_PERF];
> - rd->regs[RAPL_DOMAIN_REG_POLICY] = rp->priv-
> >regs[i][RAPL_DOMAIN_REG_POLICY];
> - rd->regs[RAPL_DOMAIN_REG_INFO] = rp->priv-
> >regs[i][RAPL_DOMAIN_REG_INFO];
> -
> - switch (mask) {
> - case BIT(RAPL_DOMAIN_PACKAGE):
> - rd->name =
> rapl_domain_names[RAPL_DOMAIN_PACKAGE];
> - rd->id = RAPL_DOMAIN_PACKAGE;
> - rd->rpl[0].prim_id = PL1_ENABLE;
> - rd->rpl[0].name = pl1_name;
> - rd->rpl[1].prim_id = PL2_ENABLE;
> - rd->rpl[1].name = pl2_name;
> - break;
> - case BIT(RAPL_DOMAIN_PP0):
> - rd->name = rapl_domain_names[RAPL_DOMAIN_PP0];
> - rd->id = RAPL_DOMAIN_PP0;
> - rd->rpl[0].prim_id = PL1_ENABLE;
> - rd->rpl[0].name = pl1_name;
> - break;
> - case BIT(RAPL_DOMAIN_PP1):
> - rd->name = rapl_domain_names[RAPL_DOMAIN_PP1];
> - rd->id = RAPL_DOMAIN_PP1;
> - rd->rpl[0].prim_id = PL1_ENABLE;
> - rd->rpl[0].name = pl1_name;
> - break;
> - case BIT(RAPL_DOMAIN_DRAM):
> - rd->name = rapl_domain_names[RAPL_DOMAIN_DRAM];
> - rd->id = RAPL_DOMAIN_DRAM;
> - rd->rpl[0].prim_id = PL1_ENABLE;
> - rd->rpl[0].name = pl1_name;
> - rd->domain_energy_unit =
> - rapl_defaults->dram_domain_energy_unit;
> - if (rd->domain_energy_unit)
> - pr_info("DRAM domain energy unit
> %dpj\n",
> - rd->domain_energy_unit);
> - break;
> - }
> - if (mask) {
> - rd->rp = rp;
> - rd++;
> - }
> - }
> -}
> -
> -static u64 rapl_unit_xlate(struct rapl_domain *rd, enum unit_type
> type,
> - u64 value, int to_raw)
> -{
> - u64 units = 1;
> - struct rapl_package *rp = rd->rp;
> - u64 scale = 1;
> -
> - switch (type) {
> - case POWER_UNIT:
> - units = rp->power_unit;
> - break;
> - case ENERGY_UNIT:
> - scale = ENERGY_UNIT_SCALE;
> - /* per domain unit takes precedence */
> - if (rd->domain_energy_unit)
> - units = rd->domain_energy_unit;
> - else
> - units = rp->energy_unit;
> - break;
> - case TIME_UNIT:
> - return rapl_defaults->compute_time_window(rp, value,
> to_raw);
> - case ARBITRARY_UNIT:
> - default:
> - return value;
> - };
> -
> - if (to_raw)
> - return div64_u64(value, units) * scale;
> -
> - value *= units;
> -
> - return div64_u64(value, scale);
> -}
> -
> -/* in the order of enum rapl_primitives */
> -static struct rapl_primitive_info rpi[] = {
> - /* name, mask, shift, msr index, unit divisor */
> - PRIMITIVE_INFO_INIT(ENERGY_COUNTER, ENERGY_STATUS_MASK, 0,
> - RAPL_DOMAIN_REG_STATUS, ENERGY_UNIT,
> 0),
> - PRIMITIVE_INFO_INIT(POWER_LIMIT1, POWER_LIMIT1_MASK, 0,
> - RAPL_DOMAIN_REG_LIMIT, POWER_UNIT, 0),
> - PRIMITIVE_INFO_INIT(POWER_LIMIT2, POWER_LIMIT2_MASK, 32,
> - RAPL_DOMAIN_REG_LIMIT, POWER_UNIT, 0),
> - PRIMITIVE_INFO_INIT(FW_LOCK, POWER_PP_LOCK, 31,
> - RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT,
> 0),
> - PRIMITIVE_INFO_INIT(PL1_ENABLE, POWER_LIMIT1_ENABLE, 15,
> - RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT,
> 0),
> - PRIMITIVE_INFO_INIT(PL1_CLAMP, POWER_LIMIT1_CLAMP, 16,
> - RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT,
> 0),
> - PRIMITIVE_INFO_INIT(PL2_ENABLE, POWER_LIMIT2_ENABLE, 47,
> - RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT,
> 0),
> - PRIMITIVE_INFO_INIT(PL2_CLAMP, POWER_LIMIT2_CLAMP, 48,
> - RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT,
> 0),
> - PRIMITIVE_INFO_INIT(TIME_WINDOW1, TIME_WINDOW1_MASK, 17,
> - RAPL_DOMAIN_REG_LIMIT, TIME_UNIT, 0),
> - PRIMITIVE_INFO_INIT(TIME_WINDOW2, TIME_WINDOW2_MASK, 49,
> - RAPL_DOMAIN_REG_LIMIT, TIME_UNIT, 0),
> - PRIMITIVE_INFO_INIT(THERMAL_SPEC_POWER,
> POWER_INFO_THERMAL_SPEC_MASK,
> - 0, RAPL_DOMAIN_REG_INFO, POWER_UNIT,
> 0),
> - PRIMITIVE_INFO_INIT(MAX_POWER, POWER_INFO_MAX_MASK, 32,
> - RAPL_DOMAIN_REG_INFO, POWER_UNIT, 0),
> - PRIMITIVE_INFO_INIT(MIN_POWER, POWER_INFO_MIN_MASK, 16,
> - RAPL_DOMAIN_REG_INFO, POWER_UNIT, 0),
> - PRIMITIVE_INFO_INIT(MAX_TIME_WINDOW,
> POWER_INFO_MAX_TIME_WIN_MASK, 48,
> - RAPL_DOMAIN_REG_INFO, TIME_UNIT, 0),
> - PRIMITIVE_INFO_INIT(THROTTLED_TIME,
> PERF_STATUS_THROTTLE_TIME_MASK, 0,
> - RAPL_DOMAIN_REG_PERF, TIME_UNIT, 0),
> - PRIMITIVE_INFO_INIT(PRIORITY_LEVEL, PP_POLICY_MASK, 0,
> - RAPL_DOMAIN_REG_POLICY, ARBITRARY_UNIT,
> 0),
> - /* non-hardware */
> - PRIMITIVE_INFO_INIT(AVERAGE_POWER, 0, 0, 0, POWER_UNIT,
> - RAPL_PRIMITIVE_DERIVED),
> - {NULL, 0, 0, 0},
> -};
> -
> -/* Read primitive data based on its related struct
> rapl_primitive_info.
> - * if xlate flag is set, return translated data based on data units,
> i.e.
> - * time, energy, and power.
> - * RAPL MSRs are non-architectual and are laid out not consistently
> across
> - * domains. Here we use primitive info to allow writing consolidated
> access
> - * functions.
> - * For a given primitive, it is processed by MSR mask and shift.
> Unit conversion
> - * is pre-assigned based on RAPL unit MSRs read at init time.
> - * 63-------------------------- 31--------------------------- 0
> - * | xxxxx (mask) |
> - * | |<- shift ----------------|
> - * 63-------------------------- 31--------------------------- 0
> - */
> -static int rapl_read_data_raw(struct rapl_domain *rd,
> - enum rapl_primitives prim,
> - bool xlate, u64 *data)
> -{
> - u64 value;
> - struct rapl_primitive_info *rp = &rpi[prim];
> - struct reg_action ra;
> - int cpu;
> -
> - if (!rp->name || rp->flag & RAPL_PRIMITIVE_DUMMY)
> - return -EINVAL;
> -
> - ra.reg = rd->regs[rp->id];
> - if (!ra.reg)
> - return -EINVAL;
> -
> - cpu = rd->rp->lead_cpu;
> -
> - /* special-case package domain, which uses a different bit*/
> - if (prim == FW_LOCK && rd->id == RAPL_DOMAIN_PACKAGE) {
> - rp->mask = POWER_PACKAGE_LOCK;
> - rp->shift = 63;
> - }
> - /* non-hardware data are collected by the polling thread */
> - if (rp->flag & RAPL_PRIMITIVE_DERIVED) {
> - *data = rd->rdd.primitives[prim];
> - return 0;
> - }
> -
> - ra.mask = rp->mask;
> -
> - if (rd->rp->priv->read_raw(cpu, &ra)) {
> - pr_debug("failed to read reg 0x%x on cpu %d\n", ra.reg,
> cpu);
> - return -EIO;
> - }
> -
> - value = ra.value >> rp->shift;
> -
> - if (xlate)
> - *data = rapl_unit_xlate(rd, rp->unit, value, 0);
> - else
> - *data = value;
> -
> - return 0;
> -}
> -
> -/* Similar use of primitive info in the read counterpart */
> -static int rapl_write_data_raw(struct rapl_domain *rd,
> - enum rapl_primitives prim,
> - unsigned long long value)
> -{
> - struct rapl_primitive_info *rp = &rpi[prim];
> - int cpu;
> - u64 bits;
> - struct reg_action ra;
> - int ret;
> -
> - cpu = rd->rp->lead_cpu;
> - bits = rapl_unit_xlate(rd, rp->unit, value, 1);
> - bits <<= rp->shift;
> - bits &= rp->mask;
> -
> - memset(&ra, 0, sizeof(ra));
> -
> - ra.reg = rd->regs[rp->id];
> - ra.mask = rp->mask;
> - ra.value = bits;
> -
> - ret = rd->rp->priv->write_raw(cpu, &ra);
> -
> - return ret;
> -}
> -
> -/*
> - * Raw RAPL data stored in MSRs are in certain scales. We need to
> - * convert them into standard units based on the units reported in
> - * the RAPL unit MSRs. This is specific to CPUs as the method to
> - * calculate units differ on different CPUs.
> - * We convert the units to below format based on CPUs.
> - * i.e.
> - * energy unit: picoJoules : Represented in picoJoules by default
> - * power unit : microWatts : Represented in milliWatts by default
> - * time unit : microseconds: Represented in seconds by default
> - */
> -static int rapl_check_unit_core(struct rapl_package *rp, int cpu)
> -{
> - struct reg_action ra;
> - u32 value;
> -
> - ra.reg = rp->priv->reg_unit;
> - ra.mask = ~0;
> - if (rp->priv->read_raw(cpu, &ra)) {
> - pr_err("Failed to read power unit REG 0x%x on CPU %d,
> exit.\n",
> - rp->priv->reg_unit, cpu);
> - return -ENODEV;
> - }
> -
> - value = (ra.value & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
> - rp->energy_unit = ENERGY_UNIT_SCALE * 1000000 / (1 << value);
> -
> - value = (ra.value & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;
> - rp->power_unit = 1000000 / (1 << value);
> -
> - value = (ra.value & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET;
> - rp->time_unit = 1000000 / (1 << value);
> -
> - pr_debug("Core CPU %s energy=%dpJ, time=%dus, power=%duW\n",
> - rp->name, rp->energy_unit, rp->time_unit, rp-
> >power_unit);
> -
> - return 0;
> -}
> -
> -static int rapl_check_unit_atom(struct rapl_package *rp, int cpu)
> -{
> - struct reg_action ra;
> - u32 value;
> -
> - ra.reg = rp->priv->reg_unit;
> - ra.mask = ~0;
> - if (rp->priv->read_raw(cpu, &ra)) {
> - pr_err("Failed to read power unit REG 0x%x on CPU %d,
> exit.\n",
> - rp->priv->reg_unit, cpu);
> - return -ENODEV;
> - }
> -
> - value = (ra.value & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
> - rp->energy_unit = ENERGY_UNIT_SCALE * 1 << value;
> -
> - value = (ra.value & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;
> - rp->power_unit = (1 << value) * 1000;
> -
> - value = (ra.value & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET;
> - rp->time_unit = 1000000 / (1 << value);
> -
> - pr_debug("Atom %s energy=%dpJ, time=%dus, power=%duW\n",
> - rp->name, rp->energy_unit, rp->time_unit, rp-
> >power_unit);
> -
> - return 0;
> -}
> -
> -static void power_limit_irq_save_cpu(void *info)
> -{
> - u32 l, h = 0;
> - struct rapl_package *rp = (struct rapl_package *)info;
> -
> - /* save the state of PLN irq mask bit before disabling it */
> - rdmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, &l, &h);
> - if (!(rp->power_limit_irq & PACKAGE_PLN_INT_SAVED)) {
> - rp->power_limit_irq = l & PACKAGE_THERM_INT_PLN_ENABLE;
> - rp->power_limit_irq |= PACKAGE_PLN_INT_SAVED;
> - }
> - l &= ~PACKAGE_THERM_INT_PLN_ENABLE;
> - wrmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
> -}
> -
> -
> -/* REVISIT:
> - * When package power limit is set artificially low by RAPL, LVT
> - * thermal interrupt for package power limit should be ignored
> - * since we are not really exceeding the real limit. The intention
> - * is to avoid excessive interrupts while we are trying to save
> power.
> - * A useful feature might be routing the package_power_limit
> interrupt
> - * to userspace via eventfd. once we have a usecase, this is simple
> - * to do by adding an atomic notifier.
> - */
> -
> -static void package_power_limit_irq_save(struct rapl_package *rp)
> -{
> - if (!boot_cpu_has(X86_FEATURE_PTS) ||
> !boot_cpu_has(X86_FEATURE_PLN))
> - return;
> -
> - smp_call_function_single(rp->lead_cpu,
> power_limit_irq_save_cpu, rp, 1);
> -}
> -
> -/*
> - * Restore per package power limit interrupt enable state. Called
> from cpu
> - * hotplug code on package removal.
> - */
> -static void package_power_limit_irq_restore(struct rapl_package *rp)
> -{
> - u32 l, h;
> -
> - if (!boot_cpu_has(X86_FEATURE_PTS) ||
> !boot_cpu_has(X86_FEATURE_PLN))
> - return;
> -
> - /* irq enable state not saved, nothing to restore */
> - if (!(rp->power_limit_irq & PACKAGE_PLN_INT_SAVED))
> - return;
> -
> - rdmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, &l, &h);
> -
> - if (rp->power_limit_irq & PACKAGE_THERM_INT_PLN_ENABLE)
> - l |= PACKAGE_THERM_INT_PLN_ENABLE;
> - else
> - l &= ~PACKAGE_THERM_INT_PLN_ENABLE;
> -
> - wrmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
> -}
> -
> -static void set_floor_freq_default(struct rapl_domain *rd, bool
> mode)
> -{
> - int nr_powerlimit = find_nr_power_limit(rd);
> -
> - /* always enable clamp such that p-state can go below OS
> requested
> - * range. power capping priority over guranteed frequency.
> - */
> - rapl_write_data_raw(rd, PL1_CLAMP, mode);
> -
> - /* some domains have pl2 */
> - if (nr_powerlimit > 1) {
> - rapl_write_data_raw(rd, PL2_ENABLE, mode);
> - rapl_write_data_raw(rd, PL2_CLAMP, mode);
> - }
> -}
> -
> -static void set_floor_freq_atom(struct rapl_domain *rd, bool enable)
> -{
> - static u32 power_ctrl_orig_val;
> - u32 mdata;
> -
> - if (!rapl_defaults->floor_freq_reg_addr) {
> - pr_err("Invalid floor frequency config register\n");
> - return;
> - }
> -
> - if (!power_ctrl_orig_val)
> - iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_CR_READ,
> - rapl_defaults->floor_freq_reg_addr,
> - &power_ctrl_orig_val);
> - mdata = power_ctrl_orig_val;
> - if (enable) {
> - mdata &= ~(0x7f << 8);
> - mdata |= 1 << 8;
> - }
> - iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_CR_WRITE,
> - rapl_defaults->floor_freq_reg_addr, mdata);
> -}
> -
> -static u64 rapl_compute_time_window_core(struct rapl_package *rp,
> u64 value,
> - bool to_raw)
> -{
> - u64 f, y; /* fraction and exp. used for time unit */
> -
> - /*
> - * Special processing based on 2^Y*(1+F/4), refer
> - * to Intel Software Developer's manual Vol.3B: CH 14.9.3.
> - */
> - if (!to_raw) {
> - f = (value & 0x60) >> 5;
> - y = value & 0x1f;
> - value = (1 << y) * (4 + f) * rp->time_unit / 4;
> - } else {
> - do_div(value, rp->time_unit);
> - y = ilog2(value);
> - f = div64_u64(4 * (value - (1 << y)), 1 << y);
> - value = (y & 0x1f) | ((f & 0x3) << 5);
> - }
> - return value;
> -}
> -
> -static u64 rapl_compute_time_window_atom(struct rapl_package *rp,
> u64 value,
> - bool to_raw)
> -{
> - /*
> - * Atom time unit encoding is straight forward val * time_unit,
> - * where time_unit is default to 1 sec. Never 0.
> - */
> - if (!to_raw)
> - return (value) ? value *= rp->time_unit : rp-
> >time_unit;
> - else
> - value = div64_u64(value, rp->time_unit);
> -
> - return value;
> -}
> -
> -static const struct rapl_defaults rapl_defaults_core = {
> - .floor_freq_reg_addr = 0,
> - .check_unit = rapl_check_unit_core,
> - .set_floor_freq = set_floor_freq_default,
> - .compute_time_window = rapl_compute_time_window_core,
> -};
> -
> -static const struct rapl_defaults rapl_defaults_hsw_server = {
> - .check_unit = rapl_check_unit_core,
> - .set_floor_freq = set_floor_freq_default,
> - .compute_time_window = rapl_compute_time_window_core,
> - .dram_domain_energy_unit = 15300,
> -};
> -
> -static const struct rapl_defaults rapl_defaults_byt = {
> - .floor_freq_reg_addr = IOSF_CPU_POWER_BUDGET_CTL_BYT,
> - .check_unit = rapl_check_unit_atom,
> - .set_floor_freq = set_floor_freq_atom,
> - .compute_time_window = rapl_compute_time_window_atom,
> -};
> -
> -static const struct rapl_defaults rapl_defaults_tng = {
> - .floor_freq_reg_addr = IOSF_CPU_POWER_BUDGET_CTL_TNG,
> - .check_unit = rapl_check_unit_atom,
> - .set_floor_freq = set_floor_freq_atom,
> - .compute_time_window = rapl_compute_time_window_atom,
> -};
> -
> -static const struct rapl_defaults rapl_defaults_ann = {
> - .floor_freq_reg_addr = 0,
> - .check_unit = rapl_check_unit_atom,
> - .set_floor_freq = NULL,
> - .compute_time_window = rapl_compute_time_window_atom,
> -};
> -
> -static const struct rapl_defaults rapl_defaults_cht = {
> - .floor_freq_reg_addr = 0,
> - .check_unit = rapl_check_unit_atom,
> - .set_floor_freq = NULL,
> - .compute_time_window = rapl_compute_time_window_atom,
> -};
> -
> -static const struct x86_cpu_id rapl_ids[] __initconst = {
> - INTEL_CPU_FAM6(SANDYBRIDGE, rapl_defaults_core),
> - INTEL_CPU_FAM6(SANDYBRIDGE_X, rapl_defaults_core),
> -
> - INTEL_CPU_FAM6(IVYBRIDGE, rapl_defaults_core),
> - INTEL_CPU_FAM6(IVYBRIDGE_X, rapl_defaults_core),
> -
> - INTEL_CPU_FAM6(HASWELL_CORE, rapl_defaults_core),
> - INTEL_CPU_FAM6(HASWELL_ULT, rapl_defaults_core),
> - INTEL_CPU_FAM6(HASWELL_GT3E, rapl_defaults_core),
> - INTEL_CPU_FAM6(HASWELL_X, rapl_defaults_hsw_server),
> -
> - INTEL_CPU_FAM6(BROADWELL_CORE, rapl_defaults_core),
> - INTEL_CPU_FAM6(BROADWELL_GT3E, rapl_defaults_core),
> - INTEL_CPU_FAM6(BROADWELL_XEON_D, rapl_defaults_core),
> - INTEL_CPU_FAM6(BROADWELL_X, rapl_defaults_hsw_ser
> ver),
> -
> - INTEL_CPU_FAM6(SKYLAKE_DESKTOP, rapl_defaults_core),
> - INTEL_CPU_FAM6(SKYLAKE_MOBILE, rapl_defaults_core),
> - INTEL_CPU_FAM6(SKYLAKE_X, rapl_defaults_hsw_server),
> - INTEL_CPU_FAM6(KABYLAKE_MOBILE, rapl_defaults_core),
> - INTEL_CPU_FAM6(KABYLAKE_DESKTOP, rapl_defaults_core),
> - INTEL_CPU_FAM6(CANNONLAKE_MOBILE, rapl_defaults_core),
> - INTEL_CPU_FAM6(ICELAKE_MOBILE, rapl_defaults_core),
> -
> - INTEL_CPU_FAM6(ATOM_SILVERMONT, rapl_defaults_byt),
> - INTEL_CPU_FAM6(ATOM_AIRMONT, rapl_defaults_cht),
> - INTEL_CPU_FAM6(ATOM_SILVERMONT_MID, rapl_defaults_tng),
> - INTEL_CPU_FAM6(ATOM_AIRMONT_MID, rapl_defaults_ann),
> - INTEL_CPU_FAM6(ATOM_GOLDMONT, rapl_defaults_core),
> - INTEL_CPU_FAM6(ATOM_GOLDMONT_PLUS, rapl_defaults_core),
> - INTEL_CPU_FAM6(ATOM_GOLDMONT_X, rapl_defaults_core),
> - INTEL_CPU_FAM6(ATOM_TREMONT_X, rapl_defaults_core),
> -
> - INTEL_CPU_FAM6(XEON_PHI_KNL, rapl_defaults_hsw_ser
> ver),
> - INTEL_CPU_FAM6(XEON_PHI_KNM, rapl_defaults_hsw_ser
> ver),
> - {}
> -};
> -MODULE_DEVICE_TABLE(x86cpu, rapl_ids);
> -
> -/* Read once for all raw primitive data for domains */
> -static void rapl_update_domain_data(struct rapl_package *rp)
> -{
> - int dmn, prim;
> - u64 val;
> -
> - for (dmn = 0; dmn < rp->nr_domains; dmn++) {
> - pr_debug("update %s domain %s data\n", rp->name,
> - rp->domains[dmn].name);
> - /* exclude non-raw primitives */
> - for (prim = 0; prim < NR_RAW_PRIMITIVES; prim++) {
> - if (!rapl_read_data_raw(&rp->domains[dmn],
> prim,
> - rpi[prim].unit, &val))
> - rp->domains[dmn].rdd.primitives[prim] =
> val;
> - }
> - }
> -
> -}
> -
> -static int rapl_package_register_powercap(struct rapl_package *rp)
> -{
> - struct rapl_domain *rd;
> - struct powercap_zone *power_zone = NULL;
> - int nr_pl, ret;
> -
> - /* Update the domain data of the new package */
> - rapl_update_domain_data(rp);
> -
> - /* first we register package domain as the parent zone*/
> - for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++)
> {
> - if (rd->id == RAPL_DOMAIN_PACKAGE) {
> - nr_pl = find_nr_power_limit(rd);
> - pr_debug("register package domain %s\n", rp-
> >name);
> - power_zone = powercap_register_zone(&rd-
> >power_zone,
> - rp->priv-
> >control_type,
> - rp->name, NULL,
> - &zone_ops[rd-
> >id],
> - nr_pl,
> - &constraint_ops
> );
> - if (IS_ERR(power_zone)) {
> - pr_debug("failed to register power zone
> %s\n",
> - rp->name);
> - return PTR_ERR(power_zone);
> - }
> - /* track parent zone in per package/socket data
> */
> - rp->power_zone = power_zone;
> - /* done, only one package domain per socket */
> - break;
> - }
> - }
> - if (!power_zone) {
> - pr_err("no package domain found, unknown topology!\n");
> - return -ENODEV;
> - }
> - /* now register domains as children of the socket/package*/
> - for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++)
> {
> - if (rd->id == RAPL_DOMAIN_PACKAGE)
> - continue;
> - /* number of power limits per domain varies */
> - nr_pl = find_nr_power_limit(rd);
> - power_zone = powercap_register_zone(&rd->power_zone,
> - rp->priv->control_type,
> rd->name,
> - rp->power_zone,
> - &zone_ops[rd->id],
> nr_pl,
> - &constraint_ops);
> -
> - if (IS_ERR(power_zone)) {
> - pr_debug("failed to register power_zone,
> %s:%s\n",
> - rp->name, rd->name);
> - ret = PTR_ERR(power_zone);
> - goto err_cleanup;
> - }
> - }
> - return 0;
> -
> -err_cleanup:
> - /*
> - * Clean up previously initialized domains within the package
> if we
> - * failed after the first domain setup.
> - */
> - while (--rd >= rp->domains) {
> - pr_debug("unregister %s domain %s\n", rp->name, rd-
> >name);
> - powercap_unregister_zone(rp->priv->control_type, &rd-
> >power_zone);
> - }
> -
> - return ret;
> -}
> -
> -static int __init rapl_add_platform_domain(struct rapl_priv *priv)
> -{
> - struct rapl_domain *rd;
> - struct powercap_zone *power_zone;
> - struct reg_action ra;
> - int ret;
> -
> - ra.reg = priv-
> >regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_STATUS];
> - ra.mask = ~0;
> - ret = priv->read_raw(0, &ra);
> - if (ret || !ra.value)
> - return -ENODEV;
> -
> - ra.reg = priv-
> >regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_LIMIT];
> - ra.mask = ~0;
> - ret = priv->read_raw(0, &ra);
> - if (ret || !ra.value)
> - return -ENODEV;
> -
> - rd = kzalloc(sizeof(*rd), GFP_KERNEL);
> - if (!rd)
> - return -ENOMEM;
> -
> - rd->name = rapl_domain_names[RAPL_DOMAIN_PLATFORM];
> - rd->id = RAPL_DOMAIN_PLATFORM;
> - rd->regs[RAPL_DOMAIN_REG_LIMIT] = priv-
> >regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_LIMIT];
> - rd->regs[RAPL_DOMAIN_REG_STATUS] = priv-
> >regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_STATUS];
> - rd->rpl[0].prim_id = PL1_ENABLE;
> - rd->rpl[0].name = pl1_name;
> - rd->rpl[1].prim_id = PL2_ENABLE;
> - rd->rpl[1].name = pl2_name;
> - rd->rp = rapl_find_package_domain(0, priv);
> -
> - power_zone = powercap_register_zone(&rd->power_zone, priv-
> >control_type,
> - "psys", NULL,
> - &zone_ops[RAPL_DOMAIN_PLATF
> ORM],
> - 2, &constraint_ops);
> -
> - if (IS_ERR(power_zone)) {
> - kfree(rd);
> - return PTR_ERR(power_zone);
> - }
> -
> - priv->platform_rapl_domain = rd;
> -
> - return 0;
> -}
> -
> -static void rapl_remove_platform_domain(struct rapl_priv *priv)
> -{
> - if (priv->platform_rapl_domain) {
> - powercap_unregister_zone(priv->control_type,
> - &priv->platform_rapl_domain->power_zone);
> - kfree(priv->platform_rapl_domain);
> - }
> -}
> -
> -static int rapl_check_domain(int cpu, int domain, struct
> rapl_package *rp)
> -{
> - struct reg_action ra;
> -
> - switch (domain) {
> - case RAPL_DOMAIN_PACKAGE:
> - case RAPL_DOMAIN_PP0:
> - case RAPL_DOMAIN_PP1:
> - case RAPL_DOMAIN_DRAM:
> - ra.reg = rp->priv-
> >regs[domain][RAPL_DOMAIN_REG_STATUS];
> - break;
> - case RAPL_DOMAIN_PLATFORM:
> - /* PSYS(PLATFORM) is not a CPU domain, so avoid printng
> error */
> - return -EINVAL;
> - default:
> - pr_err("invalid domain id %d\n", domain);
> - return -EINVAL;
> - }
> - /* make sure domain counters are available and contains non-
> zero
> - * values, otherwise skip it.
> - */
> -
> - ra.mask = ~0;
> - if (rp->priv->read_raw(cpu, &ra) || !ra.value)
> - return -ENODEV;
> -
> - return 0;
> -}
> -
> -
> -/*
> - * Check if power limits are available. Two cases when they are not
> available:
> - * 1. Locked by BIOS, in this case we still provide read-only access
> so that
> - * users can see what limit is set by the BIOS.
> - * 2. Some CPUs make some domains monitoring only which means PLx
> MSRs may not
> - * exist at all. In this case, we do not show the contraints in
> powercap.
> - *
> - * Called after domains are detected and initialized.
> - */
> -static void rapl_detect_powerlimit(struct rapl_domain *rd)
> -{
> - u64 val64;
> - int i;
> -
> - /* check if the domain is locked by BIOS, ignore if MSR doesn't
> exist */
> - if (!rapl_read_data_raw(rd, FW_LOCK, false, &val64)) {
> - if (val64) {
> - pr_info("RAPL %s domain %s locked by BIOS\n",
> - rd->rp->name, rd->name);
> - rd->state |= DOMAIN_STATE_BIOS_LOCKED;
> - }
> - }
> - /* check if power limit MSRs exists, otherwise domain is
> monitoring only */
> - for (i = 0; i < NR_POWER_LIMITS; i++) {
> - int prim = rd->rpl[i].prim_id;
> - if (rapl_read_data_raw(rd, prim, false, &val64))
> - rd->rpl[i].name = NULL;
> - }
> -}
> -
> -/* Detect active and valid domains for the given CPU, caller must
> - * ensure the CPU belongs to the targeted package and CPU hotlug is
> disabled.
> - */
> -static int rapl_detect_domains(struct rapl_package *rp, int cpu)
> -{
> - struct rapl_domain *rd;
> - int i;
> -
> - for (i = 0; i < RAPL_DOMAIN_MAX; i++) {
> - /* use physical package id to read counters */
> - if (!rapl_check_domain(cpu, i, rp)) {
> - rp->domain_map |= 1 << i;
> - pr_info("Found RAPL domain %s\n",
> rapl_domain_names[i]);
> - }
> - }
> - rp->nr_domains = bitmap_weight(&rp->domain_map, RAPL_DOMAIN_M
> AX);
> - if (!rp->nr_domains) {
> - pr_debug("no valid rapl domains found in %s\n", rp-
> >name);
> - return -ENODEV;
> - }
> - pr_debug("found %d domains on %s\n", rp->nr_domains, rp->name);
> -
> - rp->domains = kcalloc(rp->nr_domains + 1, sizeof(struct
> rapl_domain),
> - GFP_KERNEL);
> - if (!rp->domains)
> - return -ENOMEM;
> -
> - rapl_init_domains(rp);
> -
> - for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++)
> - rapl_detect_powerlimit(rd);
> -
> - return 0;
> -}
> -
> -/* called from CPU hotplug notifier, hotplug lock held */
> -static void rapl_remove_package(struct rapl_package *rp)
> -{
> - struct rapl_domain *rd, *rd_package = NULL;
> -
> - package_power_limit_irq_restore(rp);
> -
> - for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++)
> {
> - rapl_write_data_raw(rd, PL1_ENABLE, 0);
> - rapl_write_data_raw(rd, PL1_CLAMP, 0);
> - if (find_nr_power_limit(rd) > 1) {
> - rapl_write_data_raw(rd, PL2_ENABLE, 0);
> - rapl_write_data_raw(rd, PL2_CLAMP, 0);
> - }
> - if (rd->id == RAPL_DOMAIN_PACKAGE) {
> - rd_package = rd;
> - continue;
> - }
> - pr_debug("remove package, undo power limit on %s:
> %s\n",
> - rp->name, rd->name);
> - powercap_unregister_zone(rp->priv->control_type, &rd-
> >power_zone);
> - }
> - /* do parent zone last */
> - powercap_unregister_zone(rp->priv->control_type, &rd_package-
> >power_zone);
> - list_del(&rp->plist);
> - kfree(rp);
> -}
> -
> -/* called from CPU hotplug notifier, hotplug lock held */
> -static struct rapl_package *rapl_add_package(int cpu, struct
> rapl_priv *priv)
> -{
> - int id = topology_logical_die_id(cpu);
> - struct rapl_package *rp;
> - struct cpuinfo_x86 *c = &cpu_data(cpu);
> - int ret;
> -
> - rp = kzalloc(sizeof(struct rapl_package), GFP_KERNEL);
> - if (!rp)
> - return ERR_PTR(-ENOMEM);
> -
> - /* add the new package to the list */
> - rp->id = id;
> - rp->lead_cpu = cpu;
> - rp->priv = priv;
> -
> - if (topology_max_die_per_package() > 1)
> - snprintf(rp->name, PACKAGE_DOMAIN_NAME_LENGTH,
> - "package-%d-die-%d", c->phys_proc_id, c-
> >cpu_die_id);
> - else
> - snprintf(rp->name, PACKAGE_DOMAIN_NAME_LENGTH,
> "package-%d",
> - c->phys_proc_id);
> -
> - /* check if the package contains valid domains */
> - if (rapl_detect_domains(rp, cpu) ||
> - rapl_defaults->check_unit(rp, cpu)) {
> - ret = -ENODEV;
> - goto err_free_package;
> - }
> - ret = rapl_package_register_powercap(rp);
> - if (!ret) {
> - INIT_LIST_HEAD(&rp->plist);
> - list_add(&rp->plist, &rapl_packages);
> - return rp;
> - }
> -
> -err_free_package:
> - kfree(rp->domains);
> - kfree(rp);
> - return ERR_PTR(ret);
> -}
> -
> /* Handles CPU hotplug on multi-socket systems.
> * If a CPU goes online as the first CPU of the physical package
> * we add the RAPL package to the system. Similarly, when the last
> @@ -1387,92 +81,6 @@ static int rapl_cpu_down_prep(unsigned int cpu)
> return 0;
> }
>
> -static void power_limit_state_save(void)
> -{
> - struct rapl_package *rp;
> - struct rapl_domain *rd;
> - int nr_pl, ret, i;
> -
> - get_online_cpus();
> - list_for_each_entry(rp, &rapl_packages, plist) {
> - if (!rp->power_zone)
> - continue;
> - rd = power_zone_to_rapl_domain(rp->power_zone);
> - nr_pl = find_nr_power_limit(rd);
> - for (i = 0; i < nr_pl; i++) {
> - switch (rd->rpl[i].prim_id) {
> - case PL1_ENABLE:
> - ret = rapl_read_data_raw(rd,
> - POWER_LIMIT1,
> - true,
> - &rd-
> >rpl[i].last_power_limit);
> - if (ret)
> - rd->rpl[i].last_power_limit =
> 0;
> - break;
> - case PL2_ENABLE:
> - ret = rapl_read_data_raw(rd,
> - POWER_LIMIT2,
> - true,
> - &rd-
> >rpl[i].last_power_limit);
> - if (ret)
> - rd->rpl[i].last_power_limit =
> 0;
> - break;
> - }
> - }
> - }
> - put_online_cpus();
> -}
> -
> -static void power_limit_state_restore(void)
> -{
> - struct rapl_package *rp;
> - struct rapl_domain *rd;
> - int nr_pl, i;
> -
> - get_online_cpus();
> - list_for_each_entry(rp, &rapl_packages, plist) {
> - if (!rp->power_zone)
> - continue;
> - rd = power_zone_to_rapl_domain(rp->power_zone);
> - nr_pl = find_nr_power_limit(rd);
> - for (i = 0; i < nr_pl; i++) {
> - switch (rd->rpl[i].prim_id) {
> - case PL1_ENABLE:
> - if (rd->rpl[i].last_power_limit)
> - rapl_write_data_raw(rd,
> - POWER_LIMIT1,
> - rd-
> >rpl[i].last_power_limit);
> - break;
> - case PL2_ENABLE:
> - if (rd->rpl[i].last_power_limit)
> - rapl_write_data_raw(rd,
> - POWER_LIMIT2,
> - rd-
> >rpl[i].last_power_limit);
> - break;
> - }
> - }
> - }
> - put_online_cpus();
> -}
> -
> -static int rapl_pm_callback(struct notifier_block *nb,
> - unsigned long mode, void *_unused)
> -{
> - switch (mode) {
> - case PM_SUSPEND_PREPARE:
> - power_limit_state_save();
> - break;
> - case PM_POST_SUSPEND:
> - power_limit_state_restore();
> - break;
> - }
> - return NOTIFY_OK;
> -}
> -
> -static struct notifier_block rapl_pm_notifier = {
> - .notifier_call = rapl_pm_callback,
> -};
> -
> static int rapl_msr_read_raw(int cpu, struct reg_action *ra)
> {
> if (rdmsrl_safe_on_cpu(cpu, ra->reg, &ra->value)) {
> @@ -1498,7 +106,6 @@ static void rapl_msr_update_func(void *info)
> ra->err = wrmsrl_safe(ra->reg, val);
> }
>
> -
> static int rapl_msr_write_raw(int cpu, struct reg_action *ra)
> {
> int ret;
> @@ -1511,21 +118,10 @@ static int rapl_msr_write_raw(int cpu, struct
> reg_action *ra)
> return ret;
> }
>
> -static int __init rapl_init(void)
> +static int __init rapl_msr_init(void)
> {
> - const struct x86_cpu_id *id;
> int ret;
>
> - id = x86_match_cpu(rapl_ids);
> - if (!id) {
> - pr_err("driver does not support CPU family %d model
> %d\n",
> - boot_cpu_data.x86, boot_cpu_data.x86_model);
> -
> - return -ENODEV;
> - }
> -
> - rapl_defaults = (struct rapl_defaults *)id->driver_data;
> -
> rapl_msr_priv.read_raw = rapl_msr_read_raw;
> rapl_msr_priv.write_raw = rapl_msr_write_raw;
>
> @@ -1538,36 +134,29 @@ static int __init rapl_init(void)
> ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN,
> "powercap/rapl:online",
> rapl_cpu_online, rapl_cpu_down_prep);
> if (ret < 0)
> - goto err_unreg;
> + goto out;
> rapl_msr_priv.pcap_rapl_online = ret;
>
> /* Don't bail out if PSys is not supported */
> rapl_add_platform_domain(&rapl_msr_priv);
>
> - ret = register_pm_notifier(&rapl_pm_notifier);
> - if (ret)
> - goto err_unreg_all;
> -
> return 0;
>
> -err_unreg_all:
> - cpuhp_remove_state(rapl_msr_priv.pcap_rapl_online);
> -
> -err_unreg:
> - powercap_unregister_control_type(rapl_msr_priv.control_type);
> +out:
> + if (ret)
> + powercap_unregister_control_type(rapl_msr_priv.control_
> type);
> return ret;
> }
>
> -static void __exit rapl_exit(void)
> +static void __exit rapl_msr_exit(void)
> {
> - unregister_pm_notifier(&rapl_pm_notifier);
> cpuhp_remove_state(rapl_msr_priv.pcap_rapl_online);
> rapl_remove_platform_domain(&rapl_msr_priv);
> powercap_unregister_control_type(rapl_msr_priv.control_type);
> }
>
> -module_init(rapl_init);
> -module_exit(rapl_exit);
> +module_init(rapl_msr_init);
> +module_exit(rapl_msr_exit);
>
> MODULE_DESCRIPTION("Driver for Intel RAPL (Running Average Power
> Limit)");
> MODULE_AUTHOR("Jacob Pan <jacob.jun.pan@intel.com>");
> diff --git a/drivers/powercap/intel_rapl_common.c
> b/drivers/powercap/intel_rapl_common.c
> new file mode 100644
> index 0000000..8f589cf
> --- /dev/null
> +++ b/drivers/powercap/intel_rapl_common.c
> @@ -0,0 +1,1468 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Common code for Intel Running Average Power Limit (RAPL) support.
> + * Copyright (c) 2019, Intel Corporation.
> + */
> +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
> +
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/list.h>
> +#include <linux/types.h>
> +#include <linux/device.h>
> +#include <linux/slab.h>
> +#include <linux/log2.h>
> +#include <linux/bitmap.h>
> +#include <linux/delay.h>
> +#include <linux/sysfs.h>
> +#include <linux/cpu.h>
> +#include <linux/powercap.h>
> +#include <linux/suspend.h>
> +#include <asm/iosf_mbi.h>
> +#include <linux/intel_rapl.h>
> +
> +#include <linux/processor.h>
> +#include <asm/cpu_device_id.h>
> +#include <asm/intel-family.h>
> +
> +/* Local defines */
> +#define MSR_PLATFORM_POWER_LIMIT 0x0000065C
> +
> +/* bitmasks for RAPL MSRs, used by primitive access functions */
> +#define ENERGY_STATUS_MASK 0xffffffff
> +
> +#define POWER_LIMIT1_MASK 0x7FFF
> +#define POWER_LIMIT1_ENABLE BIT(15)
> +#define POWER_LIMIT1_CLAMP BIT(16)
> +
> +#define POWER_LIMIT2_MASK (0x7FFFULL<<32)
> +#define POWER_LIMIT2_ENABLE BIT_ULL(47)
> +#define POWER_LIMIT2_CLAMP BIT_ULL(48)
> +#define POWER_PACKAGE_LOCK BIT_ULL(63)
> +#define POWER_PP_LOCK BIT(31)
> +
> +#define TIME_WINDOW1_MASK (0x7FULL<<17)
> +#define TIME_WINDOW2_MASK (0x7FULL<<49)
> +
> +#define POWER_UNIT_OFFSET 0
> +#define POWER_UNIT_MASK 0x0F
> +
> +#define ENERGY_UNIT_OFFSET 0x08
> +#define ENERGY_UNIT_MASK 0x1F00
> +
> +#define TIME_UNIT_OFFSET 0x10
> +#define TIME_UNIT_MASK 0xF0000
> +
> +#define POWER_INFO_MAX_MASK (0x7fffULL<<32)
> +#define POWER_INFO_MIN_MASK (0x7fffULL<<16)
> +#define POWER_INFO_MAX_TIME_WIN_MASK (0x3fULL<<48)
> +#define POWER_INFO_THERMAL_SPEC_MASK 0x7fff
> +
> +#define PERF_STATUS_THROTTLE_TIME_MASK 0xffffffff
> +#define PP_POLICY_MASK 0x1F
> +
> +/* Non HW constants */
> +#define RAPL_PRIMITIVE_DERIVED BIT(1) /* not from raw data */
> +#define RAPL_PRIMITIVE_DUMMY BIT(2)
> +
> +#define TIME_WINDOW_MAX_MSEC 40000
> +#define TIME_WINDOW_MIN_MSEC 250
> +#define ENERGY_UNIT_SCALE 1000 /* scale from driver unit to
> powercap unit */
> +enum unit_type {
> + ARBITRARY_UNIT, /* no translation */
> + POWER_UNIT,
> + ENERGY_UNIT,
> + TIME_UNIT,
> +};
> +
> +/* per domain data, some are optional */
> +#define NR_RAW_PRIMITIVES (NR_RAPL_PRIMITIVES - 2)
> +
> +#define DOMAIN_STATE_INACTIVE BIT(0)
> +#define DOMAIN_STATE_POWER_LIMIT_SET BIT(1)
> +#define DOMAIN_STATE_BIOS_LOCKED BIT(2)
> +
> +static const char pl1_name[] = "long_term";
> +static const char pl2_name[] = "short_term";
> +
> +#define power_zone_to_rapl_domain(_zone) \
> + container_of(_zone, struct rapl_domain, power_zone)
> +
> +struct rapl_defaults {
> + u8 floor_freq_reg_addr;
> + int (*check_unit)(struct rapl_package *rp, int cpu);
> + void (*set_floor_freq)(struct rapl_domain *rd, bool mode);
> + u64 (*compute_time_window)(struct rapl_package *rp, u64 val,
> + bool to_raw);
> + unsigned int dram_domain_energy_unit;
> +};
> +static struct rapl_defaults *rapl_defaults;
> +
> +/* Sideband MBI registers */
> +#define IOSF_CPU_POWER_BUDGET_CTL_BYT (0x2)
> +#define IOSF_CPU_POWER_BUDGET_CTL_TNG (0xdf)
> +
> +#define PACKAGE_PLN_INT_SAVED BIT(0)
> +#define MAX_PRIM_NAME (32)
> +
> +/* per domain data. used to describe individual knobs such that
> access function
> + * can be consolidated into one instead of many inline functions.
> + */
> +struct rapl_primitive_info {
> + const char *name;
> + u64 mask;
> + int shift;
> + enum rapl_domain_reg_id id;
> + enum unit_type unit;
> + u32 flag;
> +};
> +
> +#define PRIMITIVE_INFO_INIT(p, m, s, i, u, f) { \
> + .name = #p, \
> + .mask = m, \
> + .shift = s, \
> + .id = i, \
> + .unit = u, \
> + .flag = f \
> + }
> +
> +static void rapl_init_domains(struct rapl_package *rp);
> +static int rapl_read_data_raw(struct rapl_domain *rd,
> + enum rapl_primitives prim,
> + bool xlate, u64 *data);
> +static int rapl_write_data_raw(struct rapl_domain *rd,
> + enum rapl_primitives prim,
> + unsigned long long value);
> +static u64 rapl_unit_xlate(struct rapl_domain *rd,
> + enum unit_type type, u64 value, int to_raw);
> +static void package_power_limit_irq_save(struct rapl_package *rp);
> +static int rapl_init_core(void);
> +static void rapl_remove_core(void);
> +
> +static LIST_HEAD(rapl_packages); /* guarded by CPU hotplug lock
> */
> +
> +static const char *const rapl_domain_names[] = {
> + "package",
> + "core",
> + "uncore",
> + "dram",
> + "psys",
> +};
> +
> +static int get_energy_counter(struct powercap_zone *power_zone,
> + u64 *energy_raw)
> +{
> + struct rapl_domain *rd;
> + u64 energy_now;
> +
> + /* prevent CPU hotplug, make sure the RAPL domain does not go
> + * away while reading the counter.
> + */
> + get_online_cpus();
> + rd = power_zone_to_rapl_domain(power_zone);
> +
> + if (!rapl_read_data_raw(rd, ENERGY_COUNTER, true, &energy_now))
> {
> + *energy_raw = energy_now;
> + put_online_cpus();
> +
> + return 0;
> + }
> + put_online_cpus();
> +
> + return -EIO;
> +}
> +
> +static int get_max_energy_counter(struct powercap_zone *pcd_dev, u64
> *energy)
> +{
> + struct rapl_domain *rd = power_zone_to_rapl_domain(pcd_dev);
> +
> + *energy = rapl_unit_xlate(rd, ENERGY_UNIT, ENERGY_STATUS_MASK,
> 0);
> + return 0;
> +}
> +
> +static int release_zone(struct powercap_zone *power_zone)
> +{
> + struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone);
> + struct rapl_package *rp = rd->rp;
> +
> + /* package zone is the last zone of a package, we can free
> + * memory here since all children has been unregistered.
> + */
> + if (rd->id == RAPL_DOMAIN_PACKAGE) {
> + kfree(rd);
> + rp->domains = NULL;
> + }
> +
> + return 0;
> +
> +}
> +
> +static int find_nr_power_limit(struct rapl_domain *rd)
> +{
> + int i, nr_pl = 0;
> +
> + for (i = 0; i < NR_POWER_LIMITS; i++) {
> + if (rd->rpl[i].name)
> + nr_pl++;
> + }
> +
> + return nr_pl;
> +}
> +
> +static int set_domain_enable(struct powercap_zone *power_zone, bool
> mode)
> +{
> + struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone);
> +
> + if (rd->state & DOMAIN_STATE_BIOS_LOCKED)
> + return -EACCES;
> +
> + get_online_cpus();
> + rapl_write_data_raw(rd, PL1_ENABLE, mode);
> + if (rapl_defaults->set_floor_freq)
> + rapl_defaults->set_floor_freq(rd, mode);
> + put_online_cpus();
> +
> + return 0;
> +}
> +
> +static int get_domain_enable(struct powercap_zone *power_zone, bool
> *mode)
> +{
> + struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone);
> + u64 val;
> +
> + if (rd->state & DOMAIN_STATE_BIOS_LOCKED) {
> + *mode = false;
> + return 0;
> + }
> + get_online_cpus();
> + if (rapl_read_data_raw(rd, PL1_ENABLE, true, &val)) {
> + put_online_cpus();
> + return -EIO;
> + }
> + *mode = val;
> + put_online_cpus();
> +
> + return 0;
> +}
> +
> +/* per RAPL domain ops, in the order of rapl_domain_type */
> +static const struct powercap_zone_ops zone_ops[] = {
> + /* RAPL_DOMAIN_PACKAGE */
> + {
> + .get_energy_uj = get_energy_counter,
> + .get_max_energy_range_uj = get_max_energy_counter,
> + .release = release_zone,
> + .set_enable = set_domain_enable,
> + .get_enable = get_domain_enable,
> + },
> + /* RAPL_DOMAIN_PP0 */
> + {
> + .get_energy_uj = get_energy_counter,
> + .get_max_energy_range_uj = get_max_energy_counter,
> + .release = release_zone,
> + .set_enable = set_domain_enable,
> + .get_enable = get_domain_enable,
> + },
> + /* RAPL_DOMAIN_PP1 */
> + {
> + .get_energy_uj = get_energy_counter,
> + .get_max_energy_range_uj = get_max_energy_counter,
> + .release = release_zone,
> + .set_enable = set_domain_enable,
> + .get_enable = get_domain_enable,
> + },
> + /* RAPL_DOMAIN_DRAM */
> + {
> + .get_energy_uj = get_energy_counter,
> + .get_max_energy_range_uj = get_max_energy_counter,
> + .release = release_zone,
> + .set_enable = set_domain_enable,
> + .get_enable = get_domain_enable,
> + },
> + /* RAPL_DOMAIN_PLATFORM */
> + {
> + .get_energy_uj = get_energy_counter,
> + .get_max_energy_range_uj = get_max_energy_counter,
> + .release = release_zone,
> + .set_enable = set_domain_enable,
> + .get_enable = get_domain_enable,
> + },
> +};
> +
> +/*
> + * Constraint index used by powercap can be different than power
> limit (PL)
> + * index in that some PLs maybe missing due to non-existent MSRs.
> So we
> + * need to convert here by finding the valid PLs only (name
> populated).
> + */
> +static int contraint_to_pl(struct rapl_domain *rd, int cid)
> +{
> + int i, j;
> +
> + for (i = 0, j = 0; i < NR_POWER_LIMITS; i++) {
> + if ((rd->rpl[i].name) && j++ == cid) {
> + pr_debug("%s: index %d\n", __func__, i);
> + return i;
> + }
> + }
> + pr_err("Cannot find matching power limit for constraint %d\n",
> cid);
> +
> + return -EINVAL;
> +}
> +
> +static int set_power_limit(struct powercap_zone *power_zone, int
> cid,
> + u64 power_limit)
> +{
> + struct rapl_domain *rd;
> + struct rapl_package *rp;
> + int ret = 0;
> + int id;
> +
> + get_online_cpus();
> + rd = power_zone_to_rapl_domain(power_zone);
> + id = contraint_to_pl(rd, cid);
> + if (id < 0) {
> + ret = id;
> + goto set_exit;
> + }
> +
> + rp = rd->rp;
> +
> + if (rd->state & DOMAIN_STATE_BIOS_LOCKED) {
> + dev_warn(&power_zone->dev,
> + "%s locked by BIOS, monitoring only\n", rd-
> >name);
> + ret = -EACCES;
> + goto set_exit;
> + }
> +
> + switch (rd->rpl[id].prim_id) {
> + case PL1_ENABLE:
> + rapl_write_data_raw(rd, POWER_LIMIT1, power_limit);
> + break;
> + case PL2_ENABLE:
> + rapl_write_data_raw(rd, POWER_LIMIT2, power_limit);
> + break;
> + default:
> + ret = -EINVAL;
> + }
> + if (!ret)
> + package_power_limit_irq_save(rp);
> +set_exit:
> + put_online_cpus();
> + return ret;
> +}
> +
> +static int get_current_power_limit(struct powercap_zone *power_zone,
> int cid,
> + u64 *data)
> +{
> + struct rapl_domain *rd;
> + u64 val;
> + int prim;
> + int ret = 0;
> + int id;
> +
> + get_online_cpus();
> + rd = power_zone_to_rapl_domain(power_zone);
> + id = contraint_to_pl(rd, cid);
> + if (id < 0) {
> + ret = id;
> + goto get_exit;
> + }
> +
> + switch (rd->rpl[id].prim_id) {
> + case PL1_ENABLE:
> + prim = POWER_LIMIT1;
> + break;
> + case PL2_ENABLE:
> + prim = POWER_LIMIT2;
> + break;
> + default:
> + put_online_cpus();
> + return -EINVAL;
> + }
> + if (rapl_read_data_raw(rd, prim, true, &val))
> + ret = -EIO;
> + else
> + *data = val;
> +
> +get_exit:
> + put_online_cpus();
> +
> + return ret;
> +}
> +
> +static int set_time_window(struct powercap_zone *power_zone, int
> cid,
> + u64 window)
> +{
> + struct rapl_domain *rd;
> + int ret = 0;
> + int id;
> +
> + get_online_cpus();
> + rd = power_zone_to_rapl_domain(power_zone);
> + id = contraint_to_pl(rd, cid);
> + if (id < 0) {
> + ret = id;
> + goto set_time_exit;
> + }
> +
> + switch (rd->rpl[id].prim_id) {
> + case PL1_ENABLE:
> + rapl_write_data_raw(rd, TIME_WINDOW1, window);
> + break;
> + case PL2_ENABLE:
> + rapl_write_data_raw(rd, TIME_WINDOW2, window);
> + break;
> + default:
> + ret = -EINVAL;
> + }
> +
> +set_time_exit:
> + put_online_cpus();
> + return ret;
> +}
> +
> +static int get_time_window(struct powercap_zone *power_zone, int
> cid,
> + u64 *data)
> +{
> + struct rapl_domain *rd;
> + u64 val;
> + int ret = 0;
> + int id;
> +
> + get_online_cpus();
> + rd = power_zone_to_rapl_domain(power_zone);
> + id = contraint_to_pl(rd, cid);
> + if (id < 0) {
> + ret = id;
> + goto get_time_exit;
> + }
> +
> + switch (rd->rpl[id].prim_id) {
> + case PL1_ENABLE:
> + ret = rapl_read_data_raw(rd, TIME_WINDOW1, true, &val);
> + break;
> + case PL2_ENABLE:
> + ret = rapl_read_data_raw(rd, TIME_WINDOW2, true, &val);
> + break;
> + default:
> + put_online_cpus();
> + return -EINVAL;
> + }
> + if (!ret)
> + *data = val;
> +
> +get_time_exit:
> + put_online_cpus();
> +
> + return ret;
> +}
> +
> +static const char *get_constraint_name(struct powercap_zone
> *power_zone,
> + int cid)
> +{
> + struct rapl_domain *rd;
> + int id;
> +
> + rd = power_zone_to_rapl_domain(power_zone);
> + id = contraint_to_pl(rd, cid);
> + if (id >= 0)
> + return rd->rpl[id].name;
> +
> + return NULL;
> +}
> +
> +static int get_max_power(struct powercap_zone *power_zone, int id,
> u64 *data)
> +{
> + struct rapl_domain *rd;
> + u64 val;
> + int prim;
> + int ret = 0;
> +
> + get_online_cpus();
> + rd = power_zone_to_rapl_domain(power_zone);
> + switch (rd->rpl[id].prim_id) {
> + case PL1_ENABLE:
> + prim = THERMAL_SPEC_POWER;
> + break;
> + case PL2_ENABLE:
> + prim = MAX_POWER;
> + break;
> + default:
> + put_online_cpus();
> + return -EINVAL;
> + }
> + if (rapl_read_data_raw(rd, prim, true, &val))
> + ret = -EIO;
> + else
> + *data = val;
> +
> + put_online_cpus();
> +
> + return ret;
> +}
> +
> +static const struct powercap_zone_constraint_ops constraint_ops = {
> + .set_power_limit_uw = set_power_limit,
> + .get_power_limit_uw = get_current_power_limit,
> + .set_time_window_us = set_time_window,
> + .get_time_window_us = get_time_window,
> + .get_max_power_uw = get_max_power,
> + .get_name = get_constraint_name,
> +};
> +
> +/* called after domain detection and package level data are set */
> +static void rapl_init_domains(struct rapl_package *rp)
> +{
> + int i;
> + struct rapl_domain *rd = rp->domains;
> +
> + for (i = 0; i < RAPL_DOMAIN_MAX; i++) {
> + unsigned int mask = rp->domain_map & (1 << i);
> +
> + rd->regs[RAPL_DOMAIN_REG_LIMIT] =
> + rp->priv->regs[i][RAPL_DOMAIN_REG_LIMIT];
> + rd->regs[RAPL_DOMAIN_REG_STATUS] =
> + rp->priv->regs[i][RAPL_DOMAIN_REG_STATUS];
> + rd->regs[RAPL_DOMAIN_REG_PERF] =
> + rp->priv->regs[i][RAPL_DOMAIN_REG_PERF];
> + rd->regs[RAPL_DOMAIN_REG_POLICY] =
> + rp->priv->regs[i][RAPL_DOMAIN_REG_POLICY];
> + rd->regs[RAPL_DOMAIN_REG_INFO] =
> + rp->priv->regs[i][RAPL_DOMAIN_REG_INFO];
> +
> + switch (mask) {
> + case BIT(RAPL_DOMAIN_PACKAGE):
> + rd->name =
> rapl_domain_names[RAPL_DOMAIN_PACKAGE];
> + rd->id = RAPL_DOMAIN_PACKAGE;
> + rd->rpl[0].prim_id = PL1_ENABLE;
> + rd->rpl[0].name = pl1_name;
> + rd->rpl[1].prim_id = PL2_ENABLE;
> + rd->rpl[1].name = pl2_name;
> + break;
> + case BIT(RAPL_DOMAIN_PP0):
> + rd->name = rapl_domain_names[RAPL_DOMAIN_PP0];
> + rd->id = RAPL_DOMAIN_PP0;
> + rd->rpl[0].prim_id = PL1_ENABLE;
> + rd->rpl[0].name = pl1_name;
> + break;
> + case BIT(RAPL_DOMAIN_PP1):
> + rd->name = rapl_domain_names[RAPL_DOMAIN_PP1];
> + rd->id = RAPL_DOMAIN_PP1;
> + rd->rpl[0].prim_id = PL1_ENABLE;
> + rd->rpl[0].name = pl1_name;
> + break;
> + case BIT(RAPL_DOMAIN_DRAM):
> + rd->name = rapl_domain_names[RAPL_DOMAIN_DRAM];
> + rd->id = RAPL_DOMAIN_DRAM;
> + rd->rpl[0].prim_id = PL1_ENABLE;
> + rd->rpl[0].name = pl1_name;
> + rd->domain_energy_unit =
> + rapl_defaults->dram_domain_energy_unit;
> + if (rd->domain_energy_unit)
> + pr_info("DRAM domain energy unit
> %dpj\n",
> + rd->domain_energy_unit);
> + break;
> + }
> + if (mask) {
> + rd->rp = rp;
> + rd++;
> + }
> + }
> +}
> +
> +static u64 rapl_unit_xlate(struct rapl_domain *rd, enum unit_type
> type,
> + u64 value, int to_raw)
> +{
> + u64 units = 1;
> + struct rapl_package *rp = rd->rp;
> + u64 scale = 1;
> +
> + switch (type) {
> + case POWER_UNIT:
> + units = rp->power_unit;
> + break;
> + case ENERGY_UNIT:
> + scale = ENERGY_UNIT_SCALE;
> + /* per domain unit takes precedence */
> + if (rd->domain_energy_unit)
> + units = rd->domain_energy_unit;
> + else
> + units = rp->energy_unit;
> + break;
> + case TIME_UNIT:
> + return rapl_defaults->compute_time_window(rp, value,
> to_raw);
> + case ARBITRARY_UNIT:
> + default:
> + return value;
> + };
> +
> + if (to_raw)
> + return div64_u64(value, units) * scale;
> +
> + value *= units;
> +
> + return div64_u64(value, scale);
> +}
> +
> +/* in the order of enum rapl_primitives */
> +static struct rapl_primitive_info rpi[] = {
> + /* name, mask, shift, msr index, unit divisor */
> + PRIMITIVE_INFO_INIT(ENERGY_COUNTER, ENERGY_STATUS_MASK, 0,
> + RAPL_DOMAIN_REG_STATUS, ENERGY_UNIT, 0),
> + PRIMITIVE_INFO_INIT(POWER_LIMIT1, POWER_LIMIT1_MASK, 0,
> + RAPL_DOMAIN_REG_LIMIT, POWER_UNIT, 0),
> + PRIMITIVE_INFO_INIT(POWER_LIMIT2, POWER_LIMIT2_MASK, 32,
> + RAPL_DOMAIN_REG_LIMIT, POWER_UNIT, 0),
> + PRIMITIVE_INFO_INIT(FW_LOCK, POWER_PP_LOCK, 31,
> + RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT, 0),
> + PRIMITIVE_INFO_INIT(PL1_ENABLE, POWER_LIMIT1_ENABLE, 15,
> + RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT, 0),
> + PRIMITIVE_INFO_INIT(PL1_CLAMP, POWER_LIMIT1_CLAMP, 16,
> + RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT, 0),
> + PRIMITIVE_INFO_INIT(PL2_ENABLE, POWER_LIMIT2_ENABLE, 47,
> + RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT, 0),
> + PRIMITIVE_INFO_INIT(PL2_CLAMP, POWER_LIMIT2_CLAMP, 48,
> + RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT, 0),
> + PRIMITIVE_INFO_INIT(TIME_WINDOW1, TIME_WINDOW1_MASK, 17,
> + RAPL_DOMAIN_REG_LIMIT, TIME_UNIT, 0),
> + PRIMITIVE_INFO_INIT(TIME_WINDOW2, TIME_WINDOW2_MASK, 49,
> + RAPL_DOMAIN_REG_LIMIT, TIME_UNIT, 0),
> + PRIMITIVE_INFO_INIT(THERMAL_SPEC_POWER,
> POWER_INFO_THERMAL_SPEC_MASK,
> + 0, RAPL_DOMAIN_REG_INFO, POWER_UNIT, 0),
> + PRIMITIVE_INFO_INIT(MAX_POWER, POWER_INFO_MAX_MASK, 32,
> + RAPL_DOMAIN_REG_INFO, POWER_UNIT, 0),
> + PRIMITIVE_INFO_INIT(MIN_POWER, POWER_INFO_MIN_MASK, 16,
> + RAPL_DOMAIN_REG_INFO, POWER_UNIT, 0),
> + PRIMITIVE_INFO_INIT(MAX_TIME_WINDOW,
> POWER_INFO_MAX_TIME_WIN_MASK, 48,
> + RAPL_DOMAIN_REG_INFO, TIME_UNIT, 0),
> + PRIMITIVE_INFO_INIT(THROTTLED_TIME,
> PERF_STATUS_THROTTLE_TIME_MASK, 0,
> + RAPL_DOMAIN_REG_PERF, TIME_UNIT, 0),
> + PRIMITIVE_INFO_INIT(PRIORITY_LEVEL, PP_POLICY_MASK, 0,
> + RAPL_DOMAIN_REG_POLICY, ARBITRARY_UNIT, 0),
> + /* non-hardware */
> + PRIMITIVE_INFO_INIT(AVERAGE_POWER, 0, 0, 0, POWER_UNIT,
> + RAPL_PRIMITIVE_DERIVED),
> + {NULL, 0, 0, 0},
> +};
> +
> +/* Read primitive data based on its related struct
> rapl_primitive_info.
> + * if xlate flag is set, return translated data based on data units,
> i.e.
> + * time, energy, and power.
> + * RAPL MSRs are non-architectual and are laid out not consistently
> across
> + * domains. Here we use primitive info to allow writing consolidated
> access
> + * functions.
> + * For a given primitive, it is processed by MSR mask and shift.
> Unit conversion
> + * is pre-assigned based on RAPL unit MSRs read at init time.
> + * 63-------------------------- 31--------------------------- 0
> + * | xxxxx (mask) |
> + * | |<- shift ----------------|
> + * 63-------------------------- 31--------------------------- 0
> + */
> +static int rapl_read_data_raw(struct rapl_domain *rd,
> + enum rapl_primitives prim, bool xlate,
> u64 *data)
> +{
> + u64 value;
> + struct rapl_primitive_info *rp = &rpi[prim];
> + struct reg_action ra;
> + int cpu;
> +
> + if (!rp->name || rp->flag & RAPL_PRIMITIVE_DUMMY)
> + return -EINVAL;
> +
> + ra.reg = rd->regs[rp->id];
> + if (!ra.reg)
> + return -EINVAL;
> +
> + cpu = rd->rp->lead_cpu;
> +
> + /* special-case package domain, which uses a different bit */
> + if (prim == FW_LOCK && rd->id == RAPL_DOMAIN_PACKAGE) {
> + rp->mask = POWER_PACKAGE_LOCK;
> + rp->shift = 63;
> + }
> + /* non-hardware data are collected by the polling thread */
> + if (rp->flag & RAPL_PRIMITIVE_DERIVED) {
> + *data = rd->rdd.primitives[prim];
> + return 0;
> + }
> +
> + ra.mask = rp->mask;
> +
> + if (rd->rp->priv->read_raw(cpu, &ra)) {
> + pr_debug("failed to read reg 0x%x on cpu %d\n", ra.reg,
> cpu);
> + return -EIO;
> + }
> +
> + value = ra.value >> rp->shift;
> +
> + if (xlate)
> + *data = rapl_unit_xlate(rd, rp->unit, value, 0);
> + else
> + *data = value;
> +
> + return 0;
> +}
> +
> +/* Similar use of primitive info in the read counterpart */
> +static int rapl_write_data_raw(struct rapl_domain *rd,
> + enum rapl_primitives prim,
> + unsigned long long value)
> +{
> + struct rapl_primitive_info *rp = &rpi[prim];
> + int cpu;
> + u64 bits;
> + struct reg_action ra;
> + int ret;
> +
> + cpu = rd->rp->lead_cpu;
> + bits = rapl_unit_xlate(rd, rp->unit, value, 1);
> + bits <<= rp->shift;
> + bits &= rp->mask;
> +
> + memset(&ra, 0, sizeof(ra));
> +
> + ra.reg = rd->regs[rp->id];
> + ra.mask = rp->mask;
> + ra.value = bits;
> +
> + ret = rd->rp->priv->write_raw(cpu, &ra);
> +
> + return ret;
> +}
> +
> +/*
> + * Raw RAPL data stored in MSRs are in certain scales. We need to
> + * convert them into standard units based on the units reported in
> + * the RAPL unit MSRs. This is specific to CPUs as the method to
> + * calculate units differ on different CPUs.
> + * We convert the units to below format based on CPUs.
> + * i.e.
> + * energy unit: picoJoules : Represented in picoJoules by default
> + * power unit : microWatts : Represented in milliWatts by default
> + * time unit : microseconds: Represented in seconds by default
> + */
> +static int rapl_check_unit_core(struct rapl_package *rp, int cpu)
> +{
> + struct reg_action ra;
> + u32 value;
> +
> + ra.reg = rp->priv->reg_unit;
> + ra.mask = ~0;
> + if (rp->priv->read_raw(cpu, &ra)) {
> + pr_err("Failed to read power unit REG 0x%x on CPU %d,
> exit.\n",
> + rp->priv->reg_unit, cpu);
> + return -ENODEV;
> + }
> +
> + value = (ra.value & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
> + rp->energy_unit = ENERGY_UNIT_SCALE * 1000000 / (1 << value);
> +
> + value = (ra.value & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;
> + rp->power_unit = 1000000 / (1 << value);
> +
> + value = (ra.value & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET;
> + rp->time_unit = 1000000 / (1 << value);
> +
> + pr_debug("Core CPU %s energy=%dpJ, time=%dus, power=%duW\n",
> + rp->name, rp->energy_unit, rp->time_unit, rp-
> >power_unit);
> +
> + return 0;
> +}
> +
> +static int rapl_check_unit_atom(struct rapl_package *rp, int cpu)
> +{
> + struct reg_action ra;
> + u32 value;
> +
> + ra.reg = rp->priv->reg_unit;
> + ra.mask = ~0;
> + if (rp->priv->read_raw(cpu, &ra)) {
> + pr_err("Failed to read power unit REG 0x%x on CPU %d,
> exit.\n",
> + rp->priv->reg_unit, cpu);
> + return -ENODEV;
> + }
> +
> + value = (ra.value & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
> + rp->energy_unit = ENERGY_UNIT_SCALE * 1 << value;
> +
> + value = (ra.value & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;
> + rp->power_unit = (1 << value) * 1000;
> +
> + value = (ra.value & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET;
> + rp->time_unit = 1000000 / (1 << value);
> +
> + pr_debug("Atom %s energy=%dpJ, time=%dus, power=%duW\n",
> + rp->name, rp->energy_unit, rp->time_unit, rp-
> >power_unit);
> +
> + return 0;
> +}
> +
> +static void power_limit_irq_save_cpu(void *info)
> +{
> + u32 l, h = 0;
> + struct rapl_package *rp = (struct rapl_package *)info;
> +
> + /* save the state of PLN irq mask bit before disabling it */
> + rdmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, &l, &h);
> + if (!(rp->power_limit_irq & PACKAGE_PLN_INT_SAVED)) {
> + rp->power_limit_irq = l & PACKAGE_THERM_INT_PLN_ENABLE;
> + rp->power_limit_irq |= PACKAGE_PLN_INT_SAVED;
> + }
> + l &= ~PACKAGE_THERM_INT_PLN_ENABLE;
> + wrmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
> +}
> +
> +/* REVISIT:
> + * When package power limit is set artificially low by RAPL, LVT
> + * thermal interrupt for package power limit should be ignored
> + * since we are not really exceeding the real limit. The intention
> + * is to avoid excessive interrupts while we are trying to save
> power.
> + * A useful feature might be routing the package_power_limit
> interrupt
> + * to userspace via eventfd. once we have a usecase, this is simple
> + * to do by adding an atomic notifier.
> + */
> +
> +static void package_power_limit_irq_save(struct rapl_package *rp)
> +{
> + if (!boot_cpu_has(X86_FEATURE_PTS) ||
> !boot_cpu_has(X86_FEATURE_PLN))
> + return;
> +
> + smp_call_function_single(rp->lead_cpu,
> power_limit_irq_save_cpu, rp, 1);
> +}
> +
> +/*
> + * Restore per package power limit interrupt enable state. Called
> from cpu
> + * hotplug code on package removal.
> + */
> +static void package_power_limit_irq_restore(struct rapl_package *rp)
> +{
> + u32 l, h;
> +
> + if (!boot_cpu_has(X86_FEATURE_PTS) ||
> !boot_cpu_has(X86_FEATURE_PLN))
> + return;
> +
> + /* irq enable state not saved, nothing to restore */
> + if (!(rp->power_limit_irq & PACKAGE_PLN_INT_SAVED))
> + return;
> +
> + rdmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, &l, &h);
> +
> + if (rp->power_limit_irq & PACKAGE_THERM_INT_PLN_ENABLE)
> + l |= PACKAGE_THERM_INT_PLN_ENABLE;
> + else
> + l &= ~PACKAGE_THERM_INT_PLN_ENABLE;
> +
> + wrmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
> +}
> +
> +static void set_floor_freq_default(struct rapl_domain *rd, bool
> mode)
> +{
> + int nr_powerlimit = find_nr_power_limit(rd);
> +
> + /* always enable clamp such that p-state can go below OS
> requested
> + * range. power capping priority over guranteed frequency.
> + */
> + rapl_write_data_raw(rd, PL1_CLAMP, mode);
> +
> + /* some domains have pl2 */
> + if (nr_powerlimit > 1) {
> + rapl_write_data_raw(rd, PL2_ENABLE, mode);
> + rapl_write_data_raw(rd, PL2_CLAMP, mode);
> + }
> +}
> +
> +static void set_floor_freq_atom(struct rapl_domain *rd, bool enable)
> +{
> + static u32 power_ctrl_orig_val;
> + u32 mdata;
> +
> + if (!rapl_defaults->floor_freq_reg_addr) {
> + pr_err("Invalid floor frequency config register\n");
> + return;
> + }
> +
> + if (!power_ctrl_orig_val)
> + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_CR_READ,
> + rapl_defaults->floor_freq_reg_addr,
> + &power_ctrl_orig_val);
> + mdata = power_ctrl_orig_val;
> + if (enable) {
> + mdata &= ~(0x7f << 8);
> + mdata |= 1 << 8;
> + }
> + iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_CR_WRITE,
> + rapl_defaults->floor_freq_reg_addr, mdata);
> +}
> +
> +static u64 rapl_compute_time_window_core(struct rapl_package *rp,
> u64 value,
> + bool to_raw)
> +{
> + u64 f, y; /* fraction and exp. used for time unit */
> +
> + /*
> + * Special processing based on 2^Y*(1+F/4), refer
> + * to Intel Software Developer's manual Vol.3B: CH 14.9.3.
> + */
> + if (!to_raw) {
> + f = (value & 0x60) >> 5;
> + y = value & 0x1f;
> + value = (1 << y) * (4 + f) * rp->time_unit / 4;
> + } else {
> + do_div(value, rp->time_unit);
> + y = ilog2(value);
> + f = div64_u64(4 * (value - (1 << y)), 1 << y);
> + value = (y & 0x1f) | ((f & 0x3) << 5);
> + }
> + return value;
> +}
> +
> +static u64 rapl_compute_time_window_atom(struct rapl_package *rp,
> u64 value,
> + bool to_raw)
> +{
> + /*
> + * Atom time unit encoding is straight forward val * time_unit,
> + * where time_unit is default to 1 sec. Never 0.
> + */
> + if (!to_raw)
> + return (value) ? value *= rp->time_unit : rp-
> >time_unit;
> +
> + value = div64_u64(value, rp->time_unit);
> +
> + return value;
> +}
> +
> +static const struct rapl_defaults rapl_defaults_core = {
> + .floor_freq_reg_addr = 0,
> + .check_unit = rapl_check_unit_core,
> + .set_floor_freq = set_floor_freq_default,
> + .compute_time_window = rapl_compute_time_window_core,
> +};
> +
> +static const struct rapl_defaults rapl_defaults_hsw_server = {
> + .check_unit = rapl_check_unit_core,
> + .set_floor_freq = set_floor_freq_default,
> + .compute_time_window = rapl_compute_time_window_core,
> + .dram_domain_energy_unit = 15300,
> +};
> +
> +static const struct rapl_defaults rapl_defaults_byt = {
> + .floor_freq_reg_addr = IOSF_CPU_POWER_BUDGET_CTL_BYT,
> + .check_unit = rapl_check_unit_atom,
> + .set_floor_freq = set_floor_freq_atom,
> + .compute_time_window = rapl_compute_time_window_atom,
> +};
> +
> +static const struct rapl_defaults rapl_defaults_tng = {
> + .floor_freq_reg_addr = IOSF_CPU_POWER_BUDGET_CTL_TNG,
> + .check_unit = rapl_check_unit_atom,
> + .set_floor_freq = set_floor_freq_atom,
> + .compute_time_window = rapl_compute_time_window_atom,
> +};
> +
> +static const struct rapl_defaults rapl_defaults_ann = {
> + .floor_freq_reg_addr = 0,
> + .check_unit = rapl_check_unit_atom,
> + .set_floor_freq = NULL,
> + .compute_time_window = rapl_compute_time_window_atom,
> +};
> +
> +static const struct rapl_defaults rapl_defaults_cht = {
> + .floor_freq_reg_addr = 0,
> + .check_unit = rapl_check_unit_atom,
> + .set_floor_freq = NULL,
> + .compute_time_window = rapl_compute_time_window_atom,
> +};
> +
> +static const struct x86_cpu_id rapl_ids[] = {
> + INTEL_CPU_FAM6(SANDYBRIDGE, rapl_defaults_core),
> + INTEL_CPU_FAM6(SANDYBRIDGE_X, rapl_defaults_core),
> +
> + INTEL_CPU_FAM6(IVYBRIDGE, rapl_defaults_core),
> + INTEL_CPU_FAM6(IVYBRIDGE_X, rapl_defaults_core),
> +
> + INTEL_CPU_FAM6(HASWELL_CORE, rapl_defaults_core),
> + INTEL_CPU_FAM6(HASWELL_ULT, rapl_defaults_core),
> + INTEL_CPU_FAM6(HASWELL_GT3E, rapl_defaults_core),
> + INTEL_CPU_FAM6(HASWELL_X, rapl_defaults_hsw_server),
> +
> + INTEL_CPU_FAM6(BROADWELL_CORE, rapl_defaults_core),
> + INTEL_CPU_FAM6(BROADWELL_GT3E, rapl_defaults_core),
> + INTEL_CPU_FAM6(BROADWELL_XEON_D, rapl_defaults_core),
> + INTEL_CPU_FAM6(BROADWELL_X, rapl_defaults_hsw_server),
> +
> + INTEL_CPU_FAM6(SKYLAKE_DESKTOP, rapl_defaults_core),
> + INTEL_CPU_FAM6(SKYLAKE_MOBILE, rapl_defaults_core),
> + INTEL_CPU_FAM6(SKYLAKE_X, rapl_defaults_hsw_server),
> + INTEL_CPU_FAM6(KABYLAKE_MOBILE, rapl_defaults_core),
> + INTEL_CPU_FAM6(KABYLAKE_DESKTOP, rapl_defaults_core),
> + INTEL_CPU_FAM6(CANNONLAKE_MOBILE, rapl_defaults_core),
> + INTEL_CPU_FAM6(ICELAKE_MOBILE, rapl_defaults_core),
> +
> + INTEL_CPU_FAM6(ATOM_SILVERMONT, rapl_defaults_byt),
> + INTEL_CPU_FAM6(ATOM_AIRMONT, rapl_defaults_cht),
> + INTEL_CPU_FAM6(ATOM_SILVERMONT_MID, rapl_defaults_tng),
> + INTEL_CPU_FAM6(ATOM_AIRMONT_MID, rapl_defaults_ann),
> + INTEL_CPU_FAM6(ATOM_GOLDMONT, rapl_defaults_core),
> + INTEL_CPU_FAM6(ATOM_GOLDMONT_PLUS, rapl_defaults_core),
> + INTEL_CPU_FAM6(ATOM_GOLDMONT_X, rapl_defaults_core),
> + INTEL_CPU_FAM6(ATOM_TREMONT_X, rapl_defaults_core),
> +
> + INTEL_CPU_FAM6(XEON_PHI_KNL, rapl_defaults_hsw_server),
> + INTEL_CPU_FAM6(XEON_PHI_KNM, rapl_defaults_hsw_server),
> + {}
> +};
> +
> +MODULE_DEVICE_TABLE(x86cpu, rapl_ids);
> +
> +/* Read once for all raw primitive data for domains */
> +static void rapl_update_domain_data(struct rapl_package *rp)
> +{
> + int dmn, prim;
> + u64 val;
> +
> + for (dmn = 0; dmn < rp->nr_domains; dmn++) {
> + pr_debug("update %s domain %s data\n", rp->name,
> + rp->domains[dmn].name);
> + /* exclude non-raw primitives */
> + for (prim = 0; prim < NR_RAW_PRIMITIVES; prim++) {
> + if (!rapl_read_data_raw(&rp->domains[dmn],
> prim,
> + rpi[prim].unit, &val))
> + rp->domains[dmn].rdd.primitives[prim] =
> val;
> + }
> + }
> +
> +}
> +
> +static int rapl_package_register_powercap(struct rapl_package *rp)
> +{
> + struct rapl_domain *rd;
> + struct powercap_zone *power_zone = NULL;
> + int nr_pl, ret;
> +
> + /* Update the domain data of the new package */
> + rapl_update_domain_data(rp);
> +
> + /* first we register package domain as the parent zone */
> + for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++)
> {
> + if (rd->id == RAPL_DOMAIN_PACKAGE) {
> + nr_pl = find_nr_power_limit(rd);
> + pr_debug("register package domain %s\n", rp-
> >name);
> + power_zone = powercap_register_zone(&rd-
> >power_zone,
> + rp->priv->control_type, rp-
> >name,
> + NULL, &zone_ops[rd->id],
> nr_pl,
> + &constraint_ops);
> + if (IS_ERR(power_zone)) {
> + pr_debug("failed to register power zone
> %s\n",
> + rp->name);
> + return PTR_ERR(power_zone);
> + }
> + /* track parent zone in per package/socket data
> */
> + rp->power_zone = power_zone;
> + /* done, only one package domain per socket */
> + break;
> + }
> + }
> + if (!power_zone) {
> + pr_err("no package domain found, unknown topology!\n");
> + return -ENODEV;
> + }
> + /* now register domains as children of the socket/package */
> + for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++)
> {
> + if (rd->id == RAPL_DOMAIN_PACKAGE)
> + continue;
> + /* number of power limits per domain varies */
> + nr_pl = find_nr_power_limit(rd);
> + power_zone = powercap_register_zone(&rd->power_zone,
> + rp->priv-
> >control_type,
> + rd->name, rp-
> >power_zone,
> + &zone_ops[rd->id],
> nr_pl,
> + &constraint_ops);
> +
> + if (IS_ERR(power_zone)) {
> + pr_debug("failed to register power_zone,
> %s:%s\n",
> + rp->name, rd->name);
> + ret = PTR_ERR(power_zone);
> + goto err_cleanup;
> + }
> + }
> + return 0;
> +
> +err_cleanup:
> + /*
> + * Clean up previously initialized domains within the package
> if we
> + * failed after the first domain setup.
> + */
> + while (--rd >= rp->domains) {
> + pr_debug("unregister %s domain %s\n", rp->name, rd-
> >name);
> + powercap_unregister_zone(rp->priv->control_type,
> + &rd->power_zone);
> + }
> +
> + return ret;
> +}
> +
> +int rapl_add_platform_domain(struct rapl_priv *priv)
> +{
> + struct rapl_domain *rd;
> + struct powercap_zone *power_zone;
> + struct reg_action ra;
> + int ret;
> +
> + ra.reg = priv-
> >regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_STATUS];
> + ra.mask = ~0;
> + ret = priv->read_raw(0, &ra);
> + if (ret || !ra.value)
> + return -ENODEV;
> +
> + ra.reg = priv-
> >regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_LIMIT];
> + ra.mask = ~0;
> + ret = priv->read_raw(0, &ra);
> + if (ret || !ra.value)
> + return -ENODEV;
> +
> + rd = kzalloc(sizeof(*rd), GFP_KERNEL);
> + if (!rd)
> + return -ENOMEM;
> +
> + rd->name = rapl_domain_names[RAPL_DOMAIN_PLATFORM];
> + rd->id = RAPL_DOMAIN_PLATFORM;
> + rd->regs[RAPL_DOMAIN_REG_LIMIT] =
> + priv->regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_LIMIT];
> + rd->regs[RAPL_DOMAIN_REG_STATUS] =
> + priv->regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_STATUS];
> + rd->rpl[0].prim_id = PL1_ENABLE;
> + rd->rpl[0].name = pl1_name;
> + rd->rpl[1].prim_id = PL2_ENABLE;
> + rd->rpl[1].name = pl2_name;
> + rd->rp = rapl_find_package_domain(0, priv);
> +
> + power_zone = powercap_register_zone(&rd->power_zone, priv-
> >control_type,
> + "psys", NULL,
> + &zone_ops[RAPL_DOMAIN_PLATF
> ORM],
> + 2, &constraint_ops);
> +
> + if (IS_ERR(power_zone)) {
> + kfree(rd);
> + return PTR_ERR(power_zone);
> + }
> +
> + priv->platform_rapl_domain = rd;
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(rapl_add_platform_domain);
> +
> +void rapl_remove_platform_domain(struct rapl_priv *priv)
> +{
> + if (priv->platform_rapl_domain) {
> + powercap_unregister_zone(priv->control_type,
> + &priv->platform_rapl_domain-
> >power_zone);
> + kfree(priv->platform_rapl_domain);
> + }
> +}
> +EXPORT_SYMBOL_GPL(rapl_remove_platform_domain);
> +
> +static int rapl_check_domain(int cpu, int domain, struct
> rapl_package *rp)
> +{
> + struct reg_action ra;
> +
> + switch (domain) {
> + case RAPL_DOMAIN_PACKAGE:
> + case RAPL_DOMAIN_PP0:
> + case RAPL_DOMAIN_PP1:
> + case RAPL_DOMAIN_DRAM:
> + ra.reg = rp->priv-
> >regs[domain][RAPL_DOMAIN_REG_STATUS];
> + break;
> + case RAPL_DOMAIN_PLATFORM:
> + /* PSYS(PLATFORM) is not a CPU domain, so avoid printng
> error */
> + return -EINVAL;
> + default:
> + pr_err("invalid domain id %d\n", domain);
> + return -EINVAL;
> + }
> + /* make sure domain counters are available and contains non-
> zero
> + * values, otherwise skip it.
> + */
> +
> + ra.mask = ~0;
> + if (rp->priv->read_raw(cpu, &ra) || !ra.value)
> + return -ENODEV;
> +
> + return 0;
> +}
> +
> +/*
> + * Check if power limits are available. Two cases when they are not
> available:
> + * 1. Locked by BIOS, in this case we still provide read-only access
> so that
> + * users can see what limit is set by the BIOS.
> + * 2. Some CPUs make some domains monitoring only which means PLx
> MSRs may not
> + * exist at all. In this case, we do not show the constraints in
> powercap.
> + *
> + * Called after domains are detected and initialized.
> + */
> +static void rapl_detect_powerlimit(struct rapl_domain *rd)
> +{
> + u64 val64;
> + int i;
> +
> + /* check if the domain is locked by BIOS, ignore if MSR doesn't
> exist */
> + if (!rapl_read_data_raw(rd, FW_LOCK, false, &val64)) {
> + if (val64) {
> + pr_info("RAPL %s domain %s locked by BIOS\n",
> + rd->rp->name, rd->name);
> + rd->state |= DOMAIN_STATE_BIOS_LOCKED;
> + }
> + }
> + /* check if power limit MSR exists, otherwise domain is
> monitoring only */
> + for (i = 0; i < NR_POWER_LIMITS; i++) {
> + int prim = rd->rpl[i].prim_id;
> +
> + if (rapl_read_data_raw(rd, prim, false, &val64))
> + rd->rpl[i].name = NULL;
> + }
> +}
> +
> +/* Detect active and valid domains for the given CPU, caller must
> + * ensure the CPU belongs to the targeted package and CPU hotlug is
> disabled.
> + */
> +static int rapl_detect_domains(struct rapl_package *rp, int cpu)
> +{
> + struct rapl_domain *rd;
> + int i;
> +
> + for (i = 0; i < RAPL_DOMAIN_MAX; i++) {
> + /* use physical package id to read counters */
> + if (!rapl_check_domain(cpu, i, rp)) {
> + rp->domain_map |= 1 << i;
> + pr_info("Found RAPL domain %s\n",
> rapl_domain_names[i]);
> + }
> + }
> + rp->nr_domains = bitmap_weight(&rp->domain_map,
> RAPL_DOMAIN_MAX);
> + if (!rp->nr_domains) {
> + pr_debug("no valid rapl domains found in %s\n", rp-
> >name);
> + return -ENODEV;
> + }
> + pr_debug("found %d domains on %s\n", rp->nr_domains, rp->name);
> +
> + rp->domains = kcalloc(rp->nr_domains + 1, sizeof(struct
> rapl_domain),
> + GFP_KERNEL);
> + if (!rp->domains)
> + return -ENOMEM;
> +
> + rapl_init_domains(rp);
> +
> + for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++)
> + rapl_detect_powerlimit(rd);
> +
> + return 0;
> +}
> +
> +/* called from CPU hotplug notifier, hotplug lock held */
> +void rapl_remove_package(struct rapl_package *rp)
> +{
> + struct rapl_domain *rd, *rd_package = NULL;
> +
> + package_power_limit_irq_restore(rp);
> +
> + for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++)
> {
> + rapl_write_data_raw(rd, PL1_ENABLE, 0);
> + rapl_write_data_raw(rd, PL1_CLAMP, 0);
> + if (find_nr_power_limit(rd) > 1) {
> + rapl_write_data_raw(rd, PL2_ENABLE, 0);
> + rapl_write_data_raw(rd, PL2_CLAMP, 0);
> + }
> + if (rd->id == RAPL_DOMAIN_PACKAGE) {
> + rd_package = rd;
> + continue;
> + }
> + pr_debug("remove package, undo power limit on %s:
> %s\n",
> + rp->name, rd->name);
> + powercap_unregister_zone(rp->priv->control_type,
> + &rd->power_zone);
> + }
> + /* do parent zone last */
> + powercap_unregister_zone(rp->priv->control_type,
> + &rd_package->power_zone);
> + list_del(&rp->plist);
> + if (list_empty(&rapl_packages))
> + rapl_remove_core();
> + kfree(rp);
> +}
> +EXPORT_SYMBOL_GPL(rapl_remove_package);
> +
> +/* caller to ensure CPU hotplug lock is held */
> +struct rapl_package *rapl_find_package_domain(int cpu, struct
> rapl_priv *priv)
> +{
> + int id = topology_logical_die_id(cpu);
> + struct rapl_package *rp;
> +
> + list_for_each_entry(rp, &rapl_packages, plist) {
> + if (rp->id == id
> + && rp->priv->control_type == priv->control_type)
> + return rp;
> + }
> +
> + return NULL;
> +}
> +EXPORT_SYMBOL_GPL(rapl_find_package_domain);
> +
> +/* called from CPU hotplug notifier, hotplug lock held */
> +struct rapl_package *rapl_add_package(int cpu, struct rapl_priv
> *priv)
> +{
> + int id = topology_logical_die_id(cpu);
> + struct rapl_package *rp;
> + struct cpuinfo_x86 *c = &cpu_data(cpu);
> + int ret;
> +
> + ret = rapl_init_core();
> + if (ret)
> + return ERR_PTR(ret);
> +
> + rp = kzalloc(sizeof(struct rapl_package), GFP_KERNEL);
> + if (!rp)
> + return ERR_PTR(-ENOMEM);
> +
> + /* add the new package to the list */
> + rp->id = id;
> + rp->lead_cpu = cpu;
> + rp->priv = priv;
> +
> + if (topology_max_die_per_package() > 1)
> + snprintf(rp->name, PACKAGE_DOMAIN_NAME_LENGTH,
> + "package-%d-die-%d", c->phys_proc_id, c-
> >cpu_die_id);
> + else
> + snprintf(rp->name, PACKAGE_DOMAIN_NAME_LENGTH,
> "package-%d",
> + c->phys_proc_id);
> +
> + /* check if the package contains valid domains */
> + if (rapl_detect_domains(rp, cpu) || rapl_defaults-
> >check_unit(rp, cpu)) {
> + ret = -ENODEV;
> + goto err_free_package;
> + }
> + ret = rapl_package_register_powercap(rp);
> + if (!ret) {
> + INIT_LIST_HEAD(&rp->plist);
> + list_add(&rp->plist, &rapl_packages);
> + return rp;
> + }
> +
> +err_free_package:
> + kfree(rp->domains);
> + kfree(rp);
> + return ERR_PTR(ret);
> +}
> +EXPORT_SYMBOL_GPL(rapl_add_package);
> +
> +static void power_limit_state_save(void)
> +{
> + struct rapl_package *rp;
> + struct rapl_domain *rd;
> + int nr_pl, ret, i;
> +
> + get_online_cpus();
> + list_for_each_entry(rp, &rapl_packages, plist) {
> + if (!rp->power_zone)
> + continue;
> + rd = power_zone_to_rapl_domain(rp->power_zone);
> + nr_pl = find_nr_power_limit(rd);
> + for (i = 0; i < nr_pl; i++) {
> + switch (rd->rpl[i].prim_id) {
> + case PL1_ENABLE:
> + ret = rapl_read_data_raw(rd,
> + POWER_LIMIT1, true,
> + &rd-
> >rpl[i].last_power_limit);
> + if (ret)
> + rd->rpl[i].last_power_limit =
> 0;
> + break;
> + case PL2_ENABLE:
> + ret = rapl_read_data_raw(rd,
> + POWER_LIMIT2, true,
> + &rd-
> >rpl[i].last_power_limit);
> + if (ret)
> + rd->rpl[i].last_power_limit =
> 0;
> + break;
> + }
> + }
> + }
> + put_online_cpus();
> +}
> +
> +static void power_limit_state_restore(void)
> +{
> + struct rapl_package *rp;
> + struct rapl_domain *rd;
> + int nr_pl, i;
> +
> + get_online_cpus();
> + list_for_each_entry(rp, &rapl_packages, plist) {
> + if (!rp->power_zone)
> + continue;
> + rd = power_zone_to_rapl_domain(rp->power_zone);
> + nr_pl = find_nr_power_limit(rd);
> + for (i = 0; i < nr_pl; i++) {
> + switch (rd->rpl[i].prim_id) {
> + case PL1_ENABLE:
> + if (rd->rpl[i].last_power_limit)
> + rapl_write_data_raw(rd,
> POWER_LIMIT1,
> + rd-
> >rpl[i].last_power_limit);
> + break;
> + case PL2_ENABLE:
> + if (rd->rpl[i].last_power_limit)
> + rapl_write_data_raw(rd,
> POWER_LIMIT2,
> + rd-
> >rpl[i].last_power_limit);
> + break;
> + }
> + }
> + }
> + put_online_cpus();
> +}
> +
> +static int rapl_pm_callback(struct notifier_block *nb,
> + unsigned long mode, void *_unused)
> +{
> + switch (mode) {
> + case PM_SUSPEND_PREPARE:
> + power_limit_state_save();
> + break;
> + case PM_POST_SUSPEND:
> + power_limit_state_restore();
> + break;
> + }
> + return NOTIFY_OK;
> +}
> +
> +static struct notifier_block rapl_pm_notifier = {
> + .notifier_call = rapl_pm_callback,
> +};
> +
> +static int rapl_init_core(void)
> +{
> + const struct x86_cpu_id *id;
> + int ret;
> +
> + if (rapl_defaults)
> + return 0;
> +
> + id = x86_match_cpu(rapl_ids);
> + if (!id) {
> + pr_err("driver does not support CPU family %d model
> %d\n",
> + boot_cpu_data.x86, boot_cpu_data.x86_model);
> +
> + return -ENODEV;
> + }
> +
> + rapl_defaults = (struct rapl_defaults *)id->driver_data;
> +
> + ret = register_pm_notifier(&rapl_pm_notifier);
> +
> + return 0;
> +}
> +
> +static void rapl_remove_core(void)
> +{
> + unregister_pm_notifier(&rapl_pm_notifier);
> + rapl_defaults = NULL;
> +}
> +
> +MODULE_DESCRIPTION("Runtime Average Power Limit (RAPL) core");
> +MODULE_LICENSE("GPL v2");
> diff --git a/include/linux/intel_rapl.h b/include/linux/intel_rapl.h
> index 1a0df65..e83739f 100644
> --- a/include/linux/intel_rapl.h
> +++ b/include/linux/intel_rapl.h
> @@ -128,4 +128,11 @@ struct rapl_package {
> struct rapl_priv *priv;
> };
>
> +struct rapl_package *rapl_find_package_domain(int cpu, struct
> rapl_priv *priv);
> +struct rapl_package *rapl_add_package(int cpu, struct rapl_priv
> *priv);
> +void rapl_remove_package(struct rapl_package *rp);
> +
> +int rapl_add_platform_domain(struct rapl_priv *priv);
> +void rapl_remove_platform_domain(struct rapl_priv *priv);
> +
> #endif /* __INTEL_RAPL_H__ */
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^ permalink raw reply
* Re: [PATCH 03/13] intel_rapl: introduce intel_rapl.h
From: Pandruvada, Srinivas @ 2019-07-02 22:13 UTC (permalink / raw)
To: Zhang, Rui, rafael@kernel.org; +Cc: linux-pm@vger.kernel.org, rjw@rjwysocki.net
In-Reply-To: <CAJZ5v0hmfUtaQGgkf0p4_xWca+unKDUTsUb-BPXGr-1f4hCWaQ@mail.gmail.com>
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On Wed, 2019-07-03 at 00:01 +0200, Rafael J. Wysocki wrote:
> On Fri, Jun 28, 2019 at 7:50 AM Zhang Rui <rui.zhang@intel.com>
> wrote:
> >
> > Create a new header file for the common definitions that might be
> > used
> > by different RAPL Interface.
> >
> > Signed-off-by: Zhang Rui <rui.zhang@intel.com>
> > ---
> > MAINTAINERS | 1 +
> > drivers/powercap/intel_rapl.c | 101 +-----------------------------
> > -------
> > include/linux/intel_rapl.h | 113
> > ++++++++++++++++++++++++++++++++++++++++++
>
> Does the header need to go into include/linux?
>
> That is, what is there in addition to the code under
> drivers/powercap/
> that will need that header file?
The rapl common functions will be called from outside drivers/powercap.
For MMIO it will be called from processor_thermal driver in
drivers/thermal/intel/int340x
Thanks,
Srinivas
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^ permalink raw reply
* Re: [PATCH 03/13] intel_rapl: introduce intel_rapl.h
From: Rafael J. Wysocki @ 2019-07-02 23:26 UTC (permalink / raw)
To: Pandruvada, Srinivas
Cc: Zhang, Rui, rafael@kernel.org, linux-pm@vger.kernel.org,
rjw@rjwysocki.net
In-Reply-To: <38a3f6de85e55d94a1f3e9aa48e99c9f53d97127.camel@intel.com>
On Wed, Jul 3, 2019 at 12:13 AM Pandruvada, Srinivas
<srinivas.pandruvada@intel.com> wrote:
>
> On Wed, 2019-07-03 at 00:01 +0200, Rafael J. Wysocki wrote:
> > On Fri, Jun 28, 2019 at 7:50 AM Zhang Rui <rui.zhang@intel.com>
> > wrote:
> > >
> > > Create a new header file for the common definitions that might be
> > > used
> > > by different RAPL Interface.
> > >
> > > Signed-off-by: Zhang Rui <rui.zhang@intel.com>
> > > ---
> > > MAINTAINERS | 1 +
> > > drivers/powercap/intel_rapl.c | 101 +-----------------------------
> > > -------
> > > include/linux/intel_rapl.h | 113
> > > ++++++++++++++++++++++++++++++++++++++++++
> >
> > Does the header need to go into include/linux?
> >
> > That is, what is there in addition to the code under
> > drivers/powercap/
> > that will need that header file?
> The rapl common functions will be called from outside drivers/powercap.
> For MMIO it will be called from processor_thermal driver in
> drivers/thermal/intel/int340x
I see, OK
^ permalink raw reply
* Re: [PATCH 04/13] intel_rapl: introduce struct rapl_private
From: Rafael J. Wysocki @ 2019-07-02 21:44 UTC (permalink / raw)
To: Zhang Rui; +Cc: Rafael J. Wysocki, Linux PM, Pandruvada, Srinivas
In-Reply-To: <1561701029-3415-5-git-send-email-rui.zhang@intel.com>
On Fri, Jun 28, 2019 at 7:50 AM Zhang Rui <rui.zhang@intel.com> wrote:
>
> Introduce a new structure, rapl_private, to save the private data
> for different RAPL Interface.
The new structure is called rapl_priv in the patch.
Besides, I would call it rapl_if_priv to indicate that this related to
an interface.
Also, IMO there should be a kerneldoc comment for it.
> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
> ---
> drivers/powercap/intel_rapl.c | 58 +++++++++++++++++++++----------------------
> include/linux/intel_rapl.h | 7 ++++++
> 2 files changed, 35 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/powercap/intel_rapl.c b/drivers/powercap/intel_rapl.c
> index adb35ec..a804370 100644
> --- a/drivers/powercap/intel_rapl.c
> +++ b/drivers/powercap/intel_rapl.c
> @@ -75,6 +75,8 @@ enum unit_type {
> TIME_UNIT,
> };
>
> +static struct rapl_priv rapl_msr_priv;
Please add a comment describing this variable and its role.
BTW, I'd rather call it rapl_if_msr.
> +
> /* per domain data, some are optional */
> #define NR_RAW_PRIMITIVES (NR_RAPL_PRIMITIVES - 2)
>
> @@ -155,17 +157,14 @@ static const char * const rapl_domain_names[] = {
> "psys",
> };
>
> -static struct powercap_control_type *control_type; /* PowerCap Controller */
> -static struct rapl_domain *platform_rapl_domain; /* Platform (PSys) domain */
Why do these things need to go into rapl_priv?
> -
> /* caller to ensure CPU hotplug lock is held */
> -static struct rapl_package *rapl_find_package_domain(int cpu)
> +static struct rapl_package *rapl_find_package_domain(int cpu, struct rapl_priv *priv)
> {
> int id = topology_logical_die_id(cpu);
> struct rapl_package *rp;
>
> list_for_each_entry(rp, &rapl_packages, plist) {
> - if (rp->id == id)
> + if (rp->id == id && rp->priv->control_type == priv->control_type)
> return rp;
> }
>
> @@ -1090,12 +1089,12 @@ static void rapl_update_domain_data(struct rapl_package *rp)
>
> static void rapl_unregister_powercap(void)
> {
> - if (platform_rapl_domain) {
> - powercap_unregister_zone(control_type,
> - &platform_rapl_domain->power_zone);
> - kfree(platform_rapl_domain);
> + if (&rapl_msr_priv.platform_rapl_domain) {
> + powercap_unregister_zone(rapl_msr_priv.control_type,
> + &rapl_msr_priv.platform_rapl_domain->power_zone);
> + kfree(rapl_msr_priv.platform_rapl_domain);
> }
> - powercap_unregister_control_type(control_type);
> + powercap_unregister_control_type(rapl_msr_priv.control_type);
> }
>
> static int rapl_package_register_powercap(struct rapl_package *rp)
> @@ -1113,7 +1112,7 @@ static int rapl_package_register_powercap(struct rapl_package *rp)
> nr_pl = find_nr_power_limit(rd);
> pr_debug("register package domain %s\n", rp->name);
> power_zone = powercap_register_zone(&rd->power_zone,
> - control_type,
> + rp->priv->control_type,
> rp->name, NULL,
> &zone_ops[rd->id],
> nr_pl,
> @@ -1140,7 +1139,7 @@ static int rapl_package_register_powercap(struct rapl_package *rp)
> /* number of power limits per domain varies */
> nr_pl = find_nr_power_limit(rd);
> power_zone = powercap_register_zone(&rd->power_zone,
> - control_type, rd->name,
> + rp->priv->control_type, rd->name,
> rp->power_zone,
> &zone_ops[rd->id], nr_pl,
> &constraint_ops);
> @@ -1161,7 +1160,7 @@ static int rapl_package_register_powercap(struct rapl_package *rp)
> */
> while (--rd >= rp->domains) {
> pr_debug("unregister %s domain %s\n", rp->name, rd->name);
> - powercap_unregister_zone(control_type, &rd->power_zone);
> + powercap_unregister_zone(rp->priv->control_type, &rd->power_zone);
> }
>
> return ret;
> @@ -1191,9 +1190,9 @@ static int __init rapl_register_psys(void)
> rd->rpl[0].name = pl1_name;
> rd->rpl[1].prim_id = PL2_ENABLE;
> rd->rpl[1].name = pl2_name;
> - rd->rp = rapl_find_package_domain(0);
> + rd->rp = rapl_find_package_domain(0, &rapl_msr_priv);
>
> - power_zone = powercap_register_zone(&rd->power_zone, control_type,
> + power_zone = powercap_register_zone(&rd->power_zone, rapl_msr_priv.control_type,
> "psys", NULL,
> &zone_ops[RAPL_DOMAIN_PLATFORM],
> 2, &constraint_ops);
> @@ -1203,17 +1202,17 @@ static int __init rapl_register_psys(void)
> return PTR_ERR(power_zone);
> }
>
> - platform_rapl_domain = rd;
> + rapl_msr_priv.platform_rapl_domain = rd;
>
> return 0;
> }
>
> static int __init rapl_register_powercap(void)
> {
> - control_type = powercap_register_control_type(NULL, "intel-rapl", NULL);
> - if (IS_ERR(control_type)) {
> + rapl_msr_priv.control_type = powercap_register_control_type(NULL, "intel-rapl", NULL);
> + if (IS_ERR(rapl_msr_priv.control_type)) {
> pr_debug("failed to register powercap control_type.\n");
> - return PTR_ERR(control_type);
> + return PTR_ERR(rapl_msr_priv.control_type);
> }
> return 0;
> }
> @@ -1338,16 +1337,16 @@ static void rapl_remove_package(struct rapl_package *rp)
> }
> pr_debug("remove package, undo power limit on %s: %s\n",
> rp->name, rd->name);
> - powercap_unregister_zone(control_type, &rd->power_zone);
> + powercap_unregister_zone(rp->priv->control_type, &rd->power_zone);
> }
> /* do parent zone last */
> - powercap_unregister_zone(control_type, &rd_package->power_zone);
> + powercap_unregister_zone(rp->priv->control_type, &rd_package->power_zone);
> list_del(&rp->plist);
> kfree(rp);
> }
>
> /* called from CPU hotplug notifier, hotplug lock held */
> -static struct rapl_package *rapl_add_package(int cpu)
> +static struct rapl_package *rapl_add_package(int cpu, struct rapl_priv *priv)
> {
> int id = topology_logical_die_id(cpu);
> struct rapl_package *rp;
> @@ -1361,6 +1360,7 @@ static struct rapl_package *rapl_add_package(int cpu)
> /* add the new package to the list */
> rp->id = id;
> rp->lead_cpu = cpu;
> + rp->priv = priv;
>
> if (topology_max_die_per_package() > 1)
> snprintf(rp->name, PACKAGE_DOMAIN_NAME_LENGTH,
> @@ -1399,9 +1399,9 @@ static int rapl_cpu_online(unsigned int cpu)
> {
> struct rapl_package *rp;
>
> - rp = rapl_find_package_domain(cpu);
> + rp = rapl_find_package_domain(cpu, &rapl_msr_priv);
> if (!rp) {
> - rp = rapl_add_package(cpu);
> + rp = rapl_add_package(cpu, &rapl_msr_priv);
> if (IS_ERR(rp))
> return PTR_ERR(rp);
> }
> @@ -1414,7 +1414,7 @@ static int rapl_cpu_down_prep(unsigned int cpu)
> struct rapl_package *rp;
> int lead_cpu;
>
> - rp = rapl_find_package_domain(cpu);
> + rp = rapl_find_package_domain(cpu, &rapl_msr_priv);
> if (!rp)
> return 0;
>
> @@ -1427,8 +1427,6 @@ static int rapl_cpu_down_prep(unsigned int cpu)
> return 0;
> }
>
> -static enum cpuhp_state pcap_rapl_online;
> -
> static void power_limit_state_save(void)
> {
> struct rapl_package *rp;
> @@ -1538,7 +1536,7 @@ static int __init rapl_init(void)
> rapl_cpu_online, rapl_cpu_down_prep);
> if (ret < 0)
> goto err_unreg;
> - pcap_rapl_online = ret;
> + rapl_msr_priv.pcap_rapl_online = ret;
>
> /* Don't bail out if PSys is not supported */
> rapl_register_psys();
> @@ -1550,7 +1548,7 @@ static int __init rapl_init(void)
> return 0;
>
> err_unreg_all:
> - cpuhp_remove_state(pcap_rapl_online);
> + cpuhp_remove_state(rapl_msr_priv.pcap_rapl_online);
>
> err_unreg:
> rapl_unregister_powercap();
> @@ -1560,7 +1558,7 @@ static int __init rapl_init(void)
> static void __exit rapl_exit(void)
> {
> unregister_pm_notifier(&rapl_pm_notifier);
> - cpuhp_remove_state(pcap_rapl_online);
> + cpuhp_remove_state(rapl_msr_priv.pcap_rapl_online);
> rapl_unregister_powercap();
> }
>
> diff --git a/include/linux/intel_rapl.h b/include/linux/intel_rapl.h
> index 9471603..d6a8547 100644
> --- a/include/linux/intel_rapl.h
> +++ b/include/linux/intel_rapl.h
> @@ -88,6 +88,12 @@ struct rapl_domain {
> struct rapl_package *rp;
> };
>
> +struct rapl_priv {
> + struct powercap_control_type *control_type;
> + struct rapl_domain *platform_rapl_domain;
> + enum cpuhp_state pcap_rapl_online;
> +};
> +
> /* maximum rapl package domain name: package-%d-die-%d */
> #define PACKAGE_DOMAIN_NAME_LENGTH 30
>
> @@ -108,6 +114,7 @@ struct rapl_package {
> /* Track active cpus */
> struct cpumask cpumask;
> char name[PACKAGE_DOMAIN_NAME_LENGTH];
> + struct rapl_priv *priv;
> };
>
> #endif /* __INTEL_RAPL_H__ */
> --
> 2.7.4
>
^ permalink raw reply
* Re: [PATCH 09/13] intel_rapl: abstract RAPL common code
From: Rafael J. Wysocki @ 2019-07-02 21:59 UTC (permalink / raw)
To: Zhang Rui; +Cc: Rafael J. Wysocki, Linux PM, Pandruvada, Srinivas
In-Reply-To: <1561701029-3415-10-git-send-email-rui.zhang@intel.com>
On Fri, Jun 28, 2019 at 7:50 AM Zhang Rui <rui.zhang@intel.com> wrote:
>
> Split intel_rapl.c to intel_rapl_common.c and intel_rapl.c, where
> intel_rapl_common.c contains the common code that can be used by both MSR
> and MMIO interface.
> intel_rapl.c still contains the implementation of RAPL MSR interface.
>
> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
> ---
> drivers/powercap/Kconfig | 11 +-
> drivers/powercap/Makefile | 1 +
> drivers/powercap/intel_rapl.c | 1427 +--------------------------------
> drivers/powercap/intel_rapl_common.c | 1468 ++++++++++++++++++++++++++++++++++
intel_rapl_common.c and intel_rapl_msr.c, please.
> include/linux/intel_rapl.h | 7 +
> 5 files changed, 1491 insertions(+), 1423 deletions(-)
> create mode 100644 drivers/powercap/intel_rapl_common.c
^ permalink raw reply
* Re: [PATCH v2] PM: Move disabling/enabling runtime PM to suspend/resume noirq
From: Rafael J. Wysocki @ 2019-07-02 17:54 UTC (permalink / raw)
To: Muchun Song
Cc: Rafael J. Wysocki, Len Brown, Pavel Machek, Greg Kroah-Hartman,
Linux PM, Linux Kernel Mailing List
In-Reply-To: <20190702163715.12649-1-smuchun@gmail.com>
On Tue, Jul 2, 2019 at 6:37 PM Muchun Song <smuchun@gmail.com> wrote:
>
> Currently, the PM core disables runtime PM for all devices right after
> executing subsystem/driver .suspend_late() callbacks for them and
> re-enables it right before executing subsystem/driver .resume_early()
> callbacks for them. This may lead to problems when there are two devices
> such that the irq handler thread function executed for one of them
> depends on runtime PM working for the other. E.g. There are two devices,
> one is i2c slave device depends on another device which can be the i2c
> adapter device. The slave device can generate system wakeup signals and
> is enabled to wake up the system(via call enable_irq_wake()). So, the irq
> of slave device is enabled. If a wakeup signal generate after executing
> subsystem/driver .suspend_late() callbacks. Then, the irq handler thread
> function will be called(The irq is requested via request_threaded_irq())
> and the slave device reads data via i2c adapter device(via i2c_transfer()).
> In that case, it may be failed to read data because of the runtime PM
> disabled.
>
> It is also analogously for resume. If a wakeup signal generate when the
> system is in the sleep state. The irq handler thread function may be
> called before executing subsystem/driver .resume_early(). In that case,
> it also may be failed to read data because of the runtime PM disabled.
>
> To make those issues go away, make the PM core disable runtime PM for
> devices right before executing subsystem/driver .suspend_noirq() callbacks
> for them and enable runtime PM for them right after executing subsystem/
> driver .resume_noirq() callbacks for them.
>
> Signed-off-by: Muchun Song <smuchun@gmail.com>
This has been discussed for a number of times, documented and no, I'm
not going to apply this patch.
PM-runtime cannot be relied on during the "noirq" stages of suspend
and resume, which is why it is disabled by the core in the "late" and
"early" stages, respectively.
> ---
>
> Change in v2:
> Update subject from:
> "PM: Move disabling/enabling runtime PM to noirq suspend/early resume"
> to:
> "PM: Move disabling/enabling runtime PM to suspend/resume noirq"
>
> Documentation/power/runtime_pm.txt | 4 ++--
> drivers/base/power/main.c | 6 +++---
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/Documentation/power/runtime_pm.txt b/Documentation/power/runtime_pm.txt
> index 937e33c46211..8cca4df3adc4 100644
> --- a/Documentation/power/runtime_pm.txt
> +++ b/Documentation/power/runtime_pm.txt
> @@ -691,11 +691,11 @@ out the following operations:
> pm_runtime_barrier() is called for every device right before executing the
> subsystem-level .suspend() callback for it. In addition to that the PM core
> calls __pm_runtime_disable() with 'false' as the second argument for every
> - device right before executing the subsystem-level .suspend_late() callback
> + device right before executing the subsystem-level .suspend_noirq() callback
> for it.
>
> * During system resume pm_runtime_enable() and pm_runtime_put() are called for
> - every device right after executing the subsystem-level .resume_early()
> + every device right after executing the subsystem-level .resume_noirq()
> callback and right after executing the subsystem-level .complete() callback
> for it, respectively.
>
> diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
> index dcfc0a36c8f7..ad0282d637ae 100644
> --- a/drivers/base/power/main.c
> +++ b/drivers/base/power/main.c
> @@ -693,6 +693,7 @@ static int device_resume_noirq(struct device *dev, pm_message_t state, bool asyn
> }
>
> Out:
> + pm_runtime_enable(dev);
> complete_all(&dev->power.completion);
> TRACE_RESUME(error);
> return error;
> @@ -860,7 +861,6 @@ static int device_resume_early(struct device *dev, pm_message_t state, bool asyn
> Out:
> TRACE_RESUME(error);
>
> - pm_runtime_enable(dev);
> complete_all(&dev->power.completion);
> return error;
> }
> @@ -1299,6 +1299,8 @@ static int __device_suspend_noirq(struct device *dev, pm_message_t state, bool a
> TRACE_DEVICE(dev);
> TRACE_SUSPEND(0);
>
> + __pm_runtime_disable(dev, false);
> +
> dpm_wait_for_subordinate(dev, async);
>
> if (async_error)
> @@ -1508,8 +1510,6 @@ static int __device_suspend_late(struct device *dev, pm_message_t state, bool as
> TRACE_DEVICE(dev);
> TRACE_SUSPEND(0);
>
> - __pm_runtime_disable(dev, false);
> -
> dpm_wait_for_subordinate(dev, async);
>
> if (async_error)
> --
> 2.17.1
>
^ permalink raw reply
* [PATCH v2] PM: Move disabling/enabling runtime PM to suspend/resume noirq
From: Muchun Song @ 2019-07-02 16:37 UTC (permalink / raw)
To: rjw, len.brown, pavel, gregkh; +Cc: linux-pm, linux-kernel
Currently, the PM core disables runtime PM for all devices right after
executing subsystem/driver .suspend_late() callbacks for them and
re-enables it right before executing subsystem/driver .resume_early()
callbacks for them. This may lead to problems when there are two devices
such that the irq handler thread function executed for one of them
depends on runtime PM working for the other. E.g. There are two devices,
one is i2c slave device depends on another device which can be the i2c
adapter device. The slave device can generate system wakeup signals and
is enabled to wake up the system(via call enable_irq_wake()). So, the irq
of slave device is enabled. If a wakeup signal generate after executing
subsystem/driver .suspend_late() callbacks. Then, the irq handler thread
function will be called(The irq is requested via request_threaded_irq())
and the slave device reads data via i2c adapter device(via i2c_transfer()).
In that case, it may be failed to read data because of the runtime PM
disabled.
It is also analogously for resume. If a wakeup signal generate when the
system is in the sleep state. The irq handler thread function may be
called before executing subsystem/driver .resume_early(). In that case,
it also may be failed to read data because of the runtime PM disabled.
To make those issues go away, make the PM core disable runtime PM for
devices right before executing subsystem/driver .suspend_noirq() callbacks
for them and enable runtime PM for them right after executing subsystem/
driver .resume_noirq() callbacks for them.
Signed-off-by: Muchun Song <smuchun@gmail.com>
---
Change in v2:
Update subject from:
"PM: Move disabling/enabling runtime PM to noirq suspend/early resume"
to:
"PM: Move disabling/enabling runtime PM to suspend/resume noirq"
Documentation/power/runtime_pm.txt | 4 ++--
drivers/base/power/main.c | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/Documentation/power/runtime_pm.txt b/Documentation/power/runtime_pm.txt
index 937e33c46211..8cca4df3adc4 100644
--- a/Documentation/power/runtime_pm.txt
+++ b/Documentation/power/runtime_pm.txt
@@ -691,11 +691,11 @@ out the following operations:
pm_runtime_barrier() is called for every device right before executing the
subsystem-level .suspend() callback for it. In addition to that the PM core
calls __pm_runtime_disable() with 'false' as the second argument for every
- device right before executing the subsystem-level .suspend_late() callback
+ device right before executing the subsystem-level .suspend_noirq() callback
for it.
* During system resume pm_runtime_enable() and pm_runtime_put() are called for
- every device right after executing the subsystem-level .resume_early()
+ every device right after executing the subsystem-level .resume_noirq()
callback and right after executing the subsystem-level .complete() callback
for it, respectively.
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
index dcfc0a36c8f7..ad0282d637ae 100644
--- a/drivers/base/power/main.c
+++ b/drivers/base/power/main.c
@@ -693,6 +693,7 @@ static int device_resume_noirq(struct device *dev, pm_message_t state, bool asyn
}
Out:
+ pm_runtime_enable(dev);
complete_all(&dev->power.completion);
TRACE_RESUME(error);
return error;
@@ -860,7 +861,6 @@ static int device_resume_early(struct device *dev, pm_message_t state, bool asyn
Out:
TRACE_RESUME(error);
- pm_runtime_enable(dev);
complete_all(&dev->power.completion);
return error;
}
@@ -1299,6 +1299,8 @@ static int __device_suspend_noirq(struct device *dev, pm_message_t state, bool a
TRACE_DEVICE(dev);
TRACE_SUSPEND(0);
+ __pm_runtime_disable(dev, false);
+
dpm_wait_for_subordinate(dev, async);
if (async_error)
@@ -1508,8 +1510,6 @@ static int __device_suspend_late(struct device *dev, pm_message_t state, bool as
TRACE_DEVICE(dev);
TRACE_SUSPEND(0);
- __pm_runtime_disable(dev, false);
-
dpm_wait_for_subordinate(dev, async);
if (async_error)
--
2.17.1
^ permalink raw reply related
* Re: [PATCH] PM: Move disabling/enabling runtime PM to noirq suspend/early resume
From: Muchun Song @ 2019-07-02 16:36 UTC (permalink / raw)
To: rjw, len.brown, pavel, Greg Kroah-Hartman; +Cc: linux-pm, linux-kernel
In-Reply-To: <20190702161253.12016-1-smuchun@gmail.com>
Sorry, There are some problems with the subject, I have re-edited and
sent the v2 patch.
Update subject from:
"PM: Move disabling/enabling runtime PM to noirq
suspend/early resume"
to:
"PM: Move disabling/enabling runtime PM to suspend/resume noirq"
^ permalink raw reply
* [PATCH] PM: Move disabling/enabling runtime PM to noirq suspend/early resume
From: Muchun Song @ 2019-07-02 16:12 UTC (permalink / raw)
To: rjw, len.brown, pavel, gregkh; +Cc: linux-pm, linux-kernel
Currently, the PM core disables runtime PM for all devices right after
executing subsystem/driver .suspend_late() callbacks for them and
re-enables it right before executing subsystem/driver .resume_early()
callbacks for them. This may lead to problems when there are two devices
such that the irq handler thread function executed for one of them
depends on runtime PM working for the other. E.g. There are two devices,
one is i2c slave device depends on another device which can be the i2c
adapter device. The slave device can generate system wakeup signals and
is enabled to wake up the system(via call enable_irq_wake()). So, the irq
of slave device is enabled. If a wakeup signal generate after executing
subsystem/driver .suspend_late() callbacks. Then, the irq handler thread
function will be called(The irq is requested via request_threaded_irq())
and the slave device reads data via i2c adapter device(via i2c_transfer()).
In that case, it may be failed to read data because of the runtime PM
disabled.
It is also analogously for resume. If a wakeup signal generate when the
system is in the sleep state. The irq handler thread function may be
called before executing subsystem/driver .resume_early(). In that case,
it also may be failed to read data because of the runtime PM disabled.
To make those issues go away, make the PM core disable runtime PM for
devices right before executing subsystem/driver .suspend_noirq() callbacks
for them and enable runtime PM for them right after executing subsystem/
driver .resume_noirq() callbacks for them.
Signed-off-by: Muchun Song <smuchun@gmail.com>
---
Documentation/power/runtime_pm.txt | 4 ++--
drivers/base/power/main.c | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/Documentation/power/runtime_pm.txt b/Documentation/power/runtime_pm.txt
index 937e33c46211..8cca4df3adc4 100644
--- a/Documentation/power/runtime_pm.txt
+++ b/Documentation/power/runtime_pm.txt
@@ -691,11 +691,11 @@ out the following operations:
pm_runtime_barrier() is called for every device right before executing the
subsystem-level .suspend() callback for it. In addition to that the PM core
calls __pm_runtime_disable() with 'false' as the second argument for every
- device right before executing the subsystem-level .suspend_late() callback
+ device right before executing the subsystem-level .suspend_noirq() callback
for it.
* During system resume pm_runtime_enable() and pm_runtime_put() are called for
- every device right after executing the subsystem-level .resume_early()
+ every device right after executing the subsystem-level .resume_noirq()
callback and right after executing the subsystem-level .complete() callback
for it, respectively.
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
index dcfc0a36c8f7..ad0282d637ae 100644
--- a/drivers/base/power/main.c
+++ b/drivers/base/power/main.c
@@ -693,6 +693,7 @@ static int device_resume_noirq(struct device *dev, pm_message_t state, bool asyn
}
Out:
+ pm_runtime_enable(dev);
complete_all(&dev->power.completion);
TRACE_RESUME(error);
return error;
@@ -860,7 +861,6 @@ static int device_resume_early(struct device *dev, pm_message_t state, bool asyn
Out:
TRACE_RESUME(error);
- pm_runtime_enable(dev);
complete_all(&dev->power.completion);
return error;
}
@@ -1299,6 +1299,8 @@ static int __device_suspend_noirq(struct device *dev, pm_message_t state, bool a
TRACE_DEVICE(dev);
TRACE_SUSPEND(0);
+ __pm_runtime_disable(dev, false);
+
dpm_wait_for_subordinate(dev, async);
if (async_error)
@@ -1508,8 +1510,6 @@ static int __device_suspend_late(struct device *dev, pm_message_t state, bool as
TRACE_DEVICE(dev);
TRACE_SUSPEND(0);
- __pm_runtime_disable(dev, false);
-
dpm_wait_for_subordinate(dev, async);
if (async_error)
--
2.17.1
^ permalink raw reply related
* Re: [PATCH v2 1/5] PM: ACPI/PCI: Resume all devices during hibernation
From: Rafael J. Wysocki @ 2019-07-02 15:59 UTC (permalink / raw)
To: Mika Westerberg
Cc: Rafael J. Wysocki, Linux PM, Linux PCI, Linux ACPI, LKML,
Bjorn Helgaas, Andy Shevchenko, Hans De Goede, Robert R. Howell
In-Reply-To: <20190701161550.GA2640@lahna.fi.intel.com>
On Mon, Jul 1, 2019 at 6:15 PM Mika Westerberg
<mika.westerberg@linux.intel.com> wrote:
>
> On Mon, Jul 01, 2019 at 12:44:25PM +0200, Rafael J. Wysocki wrote:
> > From: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> >
> > Both the PCI bus type and the ACPI PM domain avoid resuming
> > runtime-suspended devices with DPM_FLAG_SMART_SUSPEND set during
> > hibernation (before creating the snapshot image of system memory),
> > but that turns out to be a mistake. It leads to functional issues
> > and adds complexity that's hard to justify.
> >
> > For this reason, resume all runtime-suspended PCI devices and all
> > devices in the ACPI PM domains before creating a snapshot image of
> > system memory during hibernation.
> >
> > Fixes: 05087360fd7a (ACPI / PM: Take SMART_SUSPEND driver flag into account)
> > Fixes: c4b65157aeef (PCI / PM: Take SMART_SUSPEND driver flag into account)
> > Link: https://lore.kernel.org/linux-acpi/917d4399-2e22-67b1-9d54-808561f9083f@uwyo.edu/T/#maf065fe6e4974f2a9d79f332ab99dfaba635f64c
> > Reported-by: Robert R. Howell <RHowell@uwyo.edu>
> > Tested-by: Robert R. Howell <RHowell@uwyo.edu>
> > Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> > ---
> >
> > -> v2: No changes.
> >
> > ---
> > drivers/acpi/device_pm.c | 13 +++++++------
> > drivers/pci/pci-driver.c | 16 ++++++++--------
> > 2 files changed, 15 insertions(+), 14 deletions(-)
> >
> > Index: linux-pm/drivers/acpi/device_pm.c
> > ===================================================================
> > --- linux-pm.orig/drivers/acpi/device_pm.c
> > +++ linux-pm/drivers/acpi/device_pm.c
> > @@ -1155,13 +1155,14 @@ EXPORT_SYMBOL_GPL(acpi_subsys_resume_ear
> > int acpi_subsys_freeze(struct device *dev)
> > {
> > /*
> > - * This used to be done in acpi_subsys_prepare() for all devices and
> > - * some drivers may depend on it, so do it here. Ideally, however,
> > - * runtime-suspended devices should not be touched during freeze/thaw
> > - * transitions.
> > + * Resume all runtime-suspended devices before creating a snapshot
> > + * image of system memory, because the restore kernel generally cannot
> > + * be expected to always handle them consistently and they need to be
> > + * put into the runtime-active metastate during system resume anyway,
> > + * so it is better to ensure that the state saved in the image will be
> > + * alwyas consistent with that.
>
> alwyas -> always
>
> > */
> > - if (!dev_pm_test_driver_flags(dev, DPM_FLAG_SMART_SUSPEND))
> > - pm_runtime_resume(dev);
> > + pm_runtime_resume(dev);
> >
> > return pm_generic_freeze(dev);
> > }
> > Index: linux-pm/drivers/pci/pci-driver.c
> > ===================================================================
> > --- linux-pm.orig/drivers/pci/pci-driver.c
> > +++ linux-pm/drivers/pci/pci-driver.c
> > @@ -1012,15 +1012,15 @@ static int pci_pm_freeze(struct device *
> > }
> >
> > /*
> > - * This used to be done in pci_pm_prepare() for all devices and some
> > - * drivers may depend on it, so do it here. Ideally, runtime-suspended
> > - * devices should not be touched during freeze/thaw transitions,
> > - * however.
> > + * Resume all runtime-suspended devices before creating a snapshot
> > + * image of system memory, because the restore kernel generally cannot
> > + * be expected to always handle them consistently and they need to be
> > + * put into the runtime-active metastate during system resume anyway,
> > + * so it is better to ensure that the state saved in the image will be
> > + * alwyas consistent with that.
>
> ditto
Thanks, I'll fix these up when applying the patch.
^ permalink raw reply
* Re: [RFC PATCH v2 0/5] sched/cpufreq: Make schedutil energy aware
From: Peter Zijlstra @ 2019-07-02 15:51 UTC (permalink / raw)
To: Douglas RAILLARD
Cc: linux-kernel, linux-pm, mingo, rjw, viresh.kumar, quentin.perret,
patrick.bellasi, dietmar.eggemann
In-Reply-To: <20190627171603.14767-1-douglas.raillard@arm.com>
On Thu, Jun 27, 2019 at 06:15:58PM +0100, Douglas RAILLARD wrote:
> Make schedutil cpufreq governor energy-aware.
>
> - patch 4 adds sugov_cpu_ramp_boost() function.
> - patch 5 updates sugov_update_(single|shared)() to make use of
> sugov_cpu_ramp_boost().
>
> The benefits of using the EM in schedutil are twofold:
> 2) Driving the frequency selection with power in mind, in addition to
> maximizing the utilization of the non-idle CPUs in the system.
> Point 2) is enabled in
> "sched/cpufreq: Boost schedutil frequency ramp up". It allows using
> higher frequencies when it is known that the true utilization of
> currently running tasks is exceeding their previous stable point.
> The benefits are:
>
> * Boosting the frequency when the behavior of a runnable task changes,
> leading to an increase in utilization. That shortens the frequency
> ramp up duration, which in turns allows the utilization signal to
> reach stable values quicker. Since the allowed frequency boost is
> bounded in energy, it will behave consistently across platforms,
> regardless of the OPP cost range.
>
> * The boost is only transient, and should not impact a lot the energy
> consumed of workloads with very stable utilization signals.
So you're allowing a higher pick when the EWMA exceeds the enqueue
thing.
This then obviously has relation to Patrick's patch that makes the EWMA
asymmetric, but I'm thinking that the interaction is mostly favourable?
I'm not immediately seeing how it is transient; that is, PELT has a
wobble in it's steady state, is that accounted for?
^ permalink raw reply
* Re: [RFC PATCH v2 0/5] sched/cpufreq: Make schedutil energy aware
From: Peter Zijlstra @ 2019-07-02 15:44 UTC (permalink / raw)
To: Douglas RAILLARD
Cc: linux-kernel, linux-pm, mingo, rjw, viresh.kumar, quentin.perret,
patrick.bellasi, dietmar.eggemann
In-Reply-To: <20190627171603.14767-1-douglas.raillard@arm.com>
On Thu, Jun 27, 2019 at 06:15:58PM +0100, Douglas RAILLARD wrote:
> Make schedutil cpufreq governor energy-aware.
>
> - patch 1 introduces a function to retrieve a frequency given a base
> frequency and an energy cost margin.
> - patch 2 links Energy Model perf_domain to sugov_policy.
> - patch 3 updates get_next_freq() to make use of the Energy Model.
>
> 1) Selecting the highest possible frequency for a given cost. Some
> platforms can have lower frequencies that are less efficient than
> higher ones, in which case they should be skipped for most purposes.
> They can still be useful to give more freedom to thermal throttling
> mechanisms, but not under normal circumstances.
> note: the EM framework will warn about such OPPs "hertz/watts ratio
> non-monotonically decreasing"
Humm, for some reason I was thinking we explicitly skipped those OPPs
and they already weren't used.
This isn't in fact so, and these first few patches make it so?
^ permalink raw reply
* Re: [PATCH 5/5] drm/bridge: ti-sn65dsi86: support booloader enabled display
From: Rob Clark @ 2019-07-02 15:38 UTC (permalink / raw)
To: Laurent Pinchart
Cc: dri-devel, linux-arm-msm, freedreno, aarch64-laptops, linux-clk,
Linux PM, Rob Clark, Andrzej Hajda, David Airlie, Daniel Vetter,
Linux Kernel Mailing List
In-Reply-To: <20190702152011.GE5033@pendragon.ideasonboard.com>
On Tue, Jul 2, 2019 at 8:20 AM Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>
> Hi Rob,
>
> Thank you for the patch.
>
> On Sun, Jun 30, 2019 at 08:01:43AM -0700, Rob Clark wrote:
> > From: Rob Clark <robdclark@chromium.org>
> >
> > Request the enable gpio ASIS to avoid disabling bridge during probe, if
> > already enabled. And if already enabled, defer enabling runpm until
> > attach to avoid cutting off the power to the bridge.
> >
> > Once we get to attach, we know panel and drm driver are probed
> > successfully, so at this point it i s safe to enable runpm and reset the
> > bridge. If we do it earlier, we kill efifb (in the case that panel or
> > drm driver do not probe successfully, giving the user no way to see what
> > is going on.
> >
> > Signed-off-by: Rob Clark <robdclark@chromium.org>
> > ---
> > drivers/gpu/drm/bridge/ti-sn65dsi86.c | 12 ++++++++++--
> > 1 file changed, 10 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> > index 7a046bcdd81b..8bdc33576992 100644
> > --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> > +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> > @@ -257,6 +257,12 @@ static int ti_sn_bridge_attach(struct drm_bridge *bridge)
> > .node = NULL,
> > };
> >
> > + if (gpiod_get_value(pdata->enable_gpio)) {
> > + pm_runtime_enable(pdata->dev);
>
> Does this need to be balanced with a pm_runtime_disable() call ? Bridges
> can be attached and detached at runtime when reloading the display
> controller drivers, so you need to ensure that detach/re-attach cycles
> work.
It should only be a problem if things don't get shut down properly in
the detach/unload path.
> > + ti_sn_bridge_resume(pdata->dev);
> > + ti_sn_bridge_suspend(pdata->dev);
> > + }
> > +
> > ret = drm_connector_init(bridge->dev, &pdata->connector,
> > &ti_sn_bridge_connector_funcs,
> > DRM_MODE_CONNECTOR_eDP);
> > @@ -813,7 +819,7 @@ static int ti_sn_bridge_probe(struct i2c_client *client,
> > dev_set_drvdata(&client->dev, pdata);
> >
> > pdata->enable_gpio = devm_gpiod_get(pdata->dev, "enable",
> > - GPIOD_OUT_LOW);
> > + GPIOD_ASIS);
> > if (IS_ERR(pdata->enable_gpio)) {
> > DRM_ERROR("failed to get enable gpio from DT\n");
> > ret = PTR_ERR(pdata->enable_gpio);
> > @@ -843,7 +849,9 @@ static int ti_sn_bridge_probe(struct i2c_client *client,
> > if (ret)
> > return ret;
> >
> > - pm_runtime_enable(pdata->dev);
> > + if (!gpiod_get_value(pdata->enable_gpio)) {
> > + pm_runtime_enable(pdata->dev);
> > + }
>
> If I understand the issue correctly, this is part of an effort to avoid
> disabling a potentially display output until we get as close as possible
> to display handover, right ? Is there a drawback in always enabling
> runtime PM when the bridge is attached instead of at probe time ? I
> think we need to come up with a set of rules for bridge driver authors,
> otherwise we'll end up with incompatible expectations of bridge drivers
> and display controller drivers.
That would simplify things slightly.. but perhaps w/ the slight
downside, if things booted with clk running or regulator enabled, but
the panel not actually enabled, then you wouldn't shut things down
until attach.
I'm also about to send a patch that adds debugfs to dump status
registers (and a related fix that I found from that).. which will need
to do a runpm get/put, and could potentially happen before attach (ie.
if bridge driver is probed but drm driver is not).
Maybe those are edge cases not worth worrying about.
I suppose also it is possible that some bridge driver would want to
read out a hw revision register in probe to see if it is a version of
hw that it supports. But fortunately that is not a problem with this
particular bridge.
In the end, I suspect the first time you bring up some platform with
display running, you are going to have some patches spanning clk /
bridge / display / etc, no matter what we do ;-)
BR,
-R
> >
> > i2c_set_clientdata(client, pdata);
> >
>
> --
> Regards,
>
> Laurent Pinchart
^ permalink raw reply
* Re: [PATCH 5/5] drm/bridge: ti-sn65dsi86: support booloader enabled display
From: Laurent Pinchart @ 2019-07-02 15:20 UTC (permalink / raw)
To: Rob Clark
Cc: dri-devel, linux-arm-msm, freedreno, aarch64-laptops, linux-clk,
linux-pm, Rob Clark, Andrzej Hajda, David Airlie, Daniel Vetter,
linux-kernel
In-Reply-To: <20190630150230.7878-6-robdclark@gmail.com>
Hi Rob,
Thank you for the patch.
On Sun, Jun 30, 2019 at 08:01:43AM -0700, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org>
>
> Request the enable gpio ASIS to avoid disabling bridge during probe, if
> already enabled. And if already enabled, defer enabling runpm until
> attach to avoid cutting off the power to the bridge.
>
> Once we get to attach, we know panel and drm driver are probed
> successfully, so at this point it i s safe to enable runpm and reset the
> bridge. If we do it earlier, we kill efifb (in the case that panel or
> drm driver do not probe successfully, giving the user no way to see what
> is going on.
>
> Signed-off-by: Rob Clark <robdclark@chromium.org>
> ---
> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 12 ++++++++++--
> 1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> index 7a046bcdd81b..8bdc33576992 100644
> --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> @@ -257,6 +257,12 @@ static int ti_sn_bridge_attach(struct drm_bridge *bridge)
> .node = NULL,
> };
>
> + if (gpiod_get_value(pdata->enable_gpio)) {
> + pm_runtime_enable(pdata->dev);
Does this need to be balanced with a pm_runtime_disable() call ? Bridges
can be attached and detached at runtime when reloading the display
controller drivers, so you need to ensure that detach/re-attach cycles
work.
> + ti_sn_bridge_resume(pdata->dev);
> + ti_sn_bridge_suspend(pdata->dev);
> + }
> +
> ret = drm_connector_init(bridge->dev, &pdata->connector,
> &ti_sn_bridge_connector_funcs,
> DRM_MODE_CONNECTOR_eDP);
> @@ -813,7 +819,7 @@ static int ti_sn_bridge_probe(struct i2c_client *client,
> dev_set_drvdata(&client->dev, pdata);
>
> pdata->enable_gpio = devm_gpiod_get(pdata->dev, "enable",
> - GPIOD_OUT_LOW);
> + GPIOD_ASIS);
> if (IS_ERR(pdata->enable_gpio)) {
> DRM_ERROR("failed to get enable gpio from DT\n");
> ret = PTR_ERR(pdata->enable_gpio);
> @@ -843,7 +849,9 @@ static int ti_sn_bridge_probe(struct i2c_client *client,
> if (ret)
> return ret;
>
> - pm_runtime_enable(pdata->dev);
> + if (!gpiod_get_value(pdata->enable_gpio)) {
> + pm_runtime_enable(pdata->dev);
> + }
If I understand the issue correctly, this is part of an effort to avoid
disabling a potentially display output until we get as close as possible
to display handover, right ? Is there a drawback in always enabling
runtime PM when the bridge is attached instead of at probe time ? I
think we need to come up with a set of rules for bridge driver authors,
otherwise we'll end up with incompatible expectations of bridge drivers
and display controller drivers.
>
> i2c_set_clientdata(client, pdata);
>
--
Regards,
Laurent Pinchart
^ permalink raw reply
* Re: [PATCH 4/5] drm/msm/dsi: get the clocks into OFF state at init
From: Rob Clark @ 2019-07-02 13:53 UTC (permalink / raw)
To: Jeffrey Hugo
Cc: dri-devel, linux-arm-msm, freedreno, aarch64-laptops, linux-clk,
Linux PM, Rob Clark, Sean Paul, David Airlie, Daniel Vetter,
Jordan Crouse, Abhinav Kumar, Sibi Sankar, Mamta Shukla,
Chandan Uddaraju, Rajesh Yadav, Linux Kernel Mailing List
In-Reply-To: <9fbf9226-578a-90aa-693d-9ea4fcda8281@codeaurora.org>
On Mon, Jul 1, 2019 at 12:07 PM Jeffrey Hugo <jhugo@codeaurora.org> wrote:
>
> On 7/1/2019 12:58 PM, Rob Clark wrote:
> > On Mon, Jul 1, 2019 at 11:37 AM Jeffrey Hugo <jhugo@codeaurora.org> wrote:
> >>
> >> On 6/30/2019 9:01 AM, Rob Clark wrote:
> >>> From: Rob Clark <robdclark@chromium.org>
> >>>
> >>> Do an extra enable/disable cycle at init, to get the clks into disabled
> >>> state in case bootloader left them enabled.
> >>>
> >>> In case they were already enabled, the clk_prepare_enable() has no real
> >>> effect, other than getting the enable_count/prepare_count into the right
> >>> state so that we can disable clocks in the correct order. This way we
> >>> avoid having stuck clocks when we later want to do a modeset and set the
> >>> clock rates.
> >>>
> >>> Signed-off-by: Rob Clark <robdclark@chromium.org>
> >>> ---
> >>> drivers/gpu/drm/msm/dsi/dsi_host.c | 18 +++++++++++++++---
> >>> drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 1 +
> >>> 2 files changed, 16 insertions(+), 3 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
> >>> index aabab6311043..d0172d8db882 100644
> >>> --- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
> >>> +++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
> >>> @@ -354,6 +354,7 @@ static int dsi_pll_10nm_lock_status(struct dsi_pll_10nm *pll)
> >>> if (rc)
> >>> pr_err("DSI PLL(%d) lock failed, status=0x%08x\n",
> >>> pll->id, status);
> >>> +rc = 0; // HACK, this will fail if PLL already running..
> >>
> >> Umm, why? Is this intentional?
> >>
> >
> > I need to sort out a proper solution for this.. but PLL lock will fail
> > if the clk is already running (which, in that case, is fine since it
> > is already running and locked), which will cause the clk_enable to
> > fail..
> >
> > I guess there is some way that I can check that clk is already running
> > and skip this check..
>
>
> I'm sorry, but this makes no sense to me. What clock are we talking
> about here?
>
> If the pll is locked, the the lock check should just drop through. If
> the pll cannot lock, you have an issue. I'm confused as to how any of
> the downstream clocks can actually be running if the pll isn't locked.
>
> I feel like we are not yet on the same page about what situation you
> seem to be in. Can you describe in exacting detail?
>
So, I went back to check some of the kernel logs, and actually the
case where we were hitting the PLL lock fail was -EPROBE_DEFER cases,
so what was happening is the enable/disable cycle would succeed the
first time, but then we'd -EPROBE_DEFER. Then after a suspend/resume
cycle, we'd try again, but this time pll's were reset to power on
state, and we weren't setting rate.
With the other patchset[1] I sent over the weekend, this should no
longer be a problem so I can drop the hack.
BR,
-R
[1] https://patchwork.freedesktop.org/series/63000/
^ permalink raw reply
* Re: [PATCH v11 3/9] drivers: memory: extend of_memory by LPDDR3 support
From: Krzysztof Kozlowski @ 2019-07-02 12:06 UTC (permalink / raw)
To: Lukasz Luba
Cc: devicetree, linux-kernel, linux-pm,
linux-samsung-soc@vger.kernel.org, linux-clk, mturquette, sboyd,
Bartłomiej Żołnierkiewicz, kgene, Chanwoo Choi,
kyungmin.park, Marek Szyprowski, s.nawrocki, myungjoo.ham,
keescook, tony, jroedel, treding, digetx, gregkh,
willy.mh.wolff.ml
In-Reply-To: <20190701131138.22666-4-l.luba@partner.samsung.com>
On Mon, 1 Jul 2019 at 15:11, Lukasz Luba <l.luba@partner.samsung.com> wrote:
>
> The patch adds AC timings information needed to support LPDDR3 and memory
> controllers. The structure is used in of_memory and currently in Exynos
> 5422 DMC. Add parsing data needed for LPDDR3 support.
> It is currently used in Exynos5422 Dynamic Memory Controller.
>
> Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
> Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
> ---
> drivers/memory/of_memory.c | 149 +++++++++++++++++++++++++++++++++++++
> drivers/memory/of_memory.h | 18 +++++
> include/memory/jedec_ddr.h | 61 +++++++++++++++
> 3 files changed, 228 insertions(+)
Hi,
As I mentioned before in v10, I can take entire patchset through
samsung-soc but this one patch requires ack or at least reviews.
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH] thermal: mediatek: add suspend/resume callback
From: michael.kao @ 2019-07-02 9:16 UTC (permalink / raw)
To: Zhang Rui, Eduardo Valentin, Daniel Lezcano, Rob Herring,
Mark Rutland, Matthias Brugger, hsinyi
Cc: linux-pm, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Louis Yu, Michael Kao
From: Louis Yu <louis.yu@mediatek.com>
Add suspend/resume callback to disable/enable Mediatek thermal sensor
respectively. Since thermal power domain is off in suspend, thermal driver
needs re-initialization during resume.
Signed-off-by: Louis Yu <louis.yu@mediatek.com>
Signed-off-by: Michael Kao <michael.kao@mediatek.com>
---
This patch series base on these patches [1][2][3].
[1]thermal: mediatek: mt8183: fix bank number settings (https://patchwork.kernel.org/patch/10938817/)
[2]thermal: mediatek: add another get_temp ops for thermal sensors (https://patchwork.kernel.org/patch/10938829/)
[3]thermal: mediatek: use spinlock to protect PTPCORESEL (https://patchwork.kernel.org/patch/10938841/)
drivers/thermal/mtk_thermal.c | 134 +++++++++++++++++++++++++++++++++++++++---
1 file changed, 125 insertions(+), 9 deletions(-)
diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
index 3d01153..61d4114 100644
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -30,6 +30,7 @@
#include <linux/thermal.h>
#include <linux/reset.h>
#include <linux/types.h>
+#include <linux/iopoll.h>
/* AUXADC Registers */
#define AUXADC_CON1_SET_V 0x008
@@ -39,6 +40,8 @@
#define APMIXED_SYS_TS_CON1 0x604
+#define APMIXED_SYS_TS_CON1_BUFFER_OFF 0x30
+
/* Thermal Controller Registers */
#define TEMP_MONCTL0 0x000
#define TEMP_MONCTL1 0x004
@@ -46,6 +49,7 @@
#define TEMP_MONIDET0 0x014
#define TEMP_MONIDET1 0x018
#define TEMP_MSRCTL0 0x038
+#define TEMP_MSRCTL1 0x03c
#define TEMP_AHBPOLL 0x040
#define TEMP_AHBTO 0x044
#define TEMP_ADCPNP0 0x048
@@ -95,6 +99,9 @@
#define TEMP_ADCVALIDMASK_VALID_HIGH BIT(5)
#define TEMP_ADCVALIDMASK_VALID_POS(bit) (bit)
+#define TEMP_MSRCTL1_BUS_STA (BIT(0) | BIT(7))
+#define TEMP_MSRCTL1_SENSING_POINTS_PAUSE 0x10E
+
/* MT8173 thermal sensors */
#define MT8173_TS1 0
#define MT8173_TS2 1
@@ -266,6 +273,10 @@ struct mtk_thermal_data {
struct mtk_thermal {
struct device *dev;
void __iomem *thermal_base;
+ void __iomem *apmixed_base;
+ void __iomem *auxadc_base;
+ u64 apmixed_phys_base;
+ u64 auxadc_phys_base;
struct clk *clk_peri_therm;
struct clk *clk_auxadc;
@@ -795,6 +806,42 @@ static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
mtk_thermal_put_bank(bank);
}
+static int mtk_thermal_disable_sensing(struct mtk_thermal *mt, int num)
+{
+ struct mtk_thermal_bank *bank = &mt->banks[num];
+ u32 val;
+ unsigned long timeout;
+ void __iomem *addr;
+ int ret = 0;
+
+ bank->id = num;
+ bank->mt = mt;
+
+ mtk_thermal_get_bank(bank);
+
+ val = readl(mt->thermal_base + TEMP_MSRCTL1);
+ /* pause periodic temperature measurement for sensing points */
+ writel(val | TEMP_MSRCTL1_SENSING_POINTS_PAUSE,
+ mt->thermal_base + TEMP_MSRCTL1);
+
+ /* wait until temperature measurement bus idle */
+ timeout = jiffies + HZ;
+ addr = mt->thermal_base + TEMP_MSRCTL1;
+
+ ret = readl_poll_timeout(addr, val, (val & TEMP_MSRCTL1_BUS_STA) == 0x0,
+ 0, timeout);
+ if (ret < 0)
+ goto out;
+
+ /* disable periodic temperature meausrement on sensing points */
+ writel(0x0, mt->thermal_base + TEMP_MONCTL0);
+
+out:
+ mtk_thermal_put_bank(bank);
+
+ return ret;
+}
+
static u64 of_get_phys_base(struct device_node *np)
{
u64 size64;
@@ -917,7 +964,6 @@ static int mtk_thermal_probe(struct platform_device *pdev)
struct device_node *auxadc, *apmixedsys, *np = pdev->dev.of_node;
struct mtk_thermal *mt;
struct resource *res;
- u64 auxadc_phys_base, apmixed_phys_base;
struct thermal_zone_device *tzdev;
struct mtk_thermal_zone *tz;
@@ -954,11 +1000,11 @@ static int mtk_thermal_probe(struct platform_device *pdev)
return -ENODEV;
}
- auxadc_phys_base = of_get_phys_base(auxadc);
+ mt->auxadc_phys_base = of_get_phys_base(auxadc);
of_node_put(auxadc);
- if (auxadc_phys_base == OF_BAD_ADDR) {
+ if (mt->auxadc_phys_base == OF_BAD_ADDR) {
dev_err(&pdev->dev, "Can't get auxadc phys address\n");
return -EINVAL;
}
@@ -969,11 +1015,12 @@ static int mtk_thermal_probe(struct platform_device *pdev)
return -ENODEV;
}
- apmixed_phys_base = of_get_phys_base(apmixedsys);
+ mt->apmixed_phys_base = of_get_phys_base(apmixedsys);
+ mt->apmixed_base = of_iomap(apmixedsys, 0);
of_node_put(apmixedsys);
- if (apmixed_phys_base == OF_BAD_ADDR) {
+ if (mt->apmixed_phys_base == OF_BAD_ADDR) {
dev_err(&pdev->dev, "Can't get auxadc phys address\n");
return -EINVAL;
}
@@ -985,19 +1032,19 @@ static int mtk_thermal_probe(struct platform_device *pdev)
ret = clk_prepare_enable(mt->clk_auxadc);
if (ret) {
dev_err(&pdev->dev, "Can't enable auxadc clk: %d\n", ret);
- return ret;
+ goto err_disable_clk_auxadc;
}
ret = clk_prepare_enable(mt->clk_peri_therm);
if (ret) {
dev_err(&pdev->dev, "Can't enable peri clk: %d\n", ret);
- goto err_disable_clk_auxadc;
+ goto err_disable_clk_peri_therm;
}
for (ctrl_id = 0; ctrl_id < mt->conf->num_controller ; ctrl_id++)
for (i = 0; i < mt->conf->num_banks; i++)
- mtk_thermal_init_bank(mt, i, apmixed_phys_base,
- auxadc_phys_base, ctrl_id);
+ mtk_thermal_init_bank(mt, i, mt->apmixed_phys_base,
+ mt->auxadc_phys_base, ctrl_id);
platform_set_drvdata(pdev, mt);
@@ -1041,11 +1088,80 @@ static int mtk_thermal_remove(struct platform_device *pdev)
return 0;
}
+static int __maybe_unused mtk_thermal_suspend(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct mtk_thermal *mt = platform_get_drvdata(pdev);
+ int i, ret;
+
+ for (i = 0; i < mt->conf->num_banks; i++) {
+ ret = mtk_thermal_disable_sensing(mt, i);
+ if (ret)
+ goto out;
+ }
+
+ /* disable buffer */
+ writel(readl(mt->apmixed_base + APMIXED_SYS_TS_CON1) |
+ APMIXED_SYS_TS_CON1_BUFFER_OFF,
+ mt->apmixed_base + APMIXED_SYS_TS_CON1);
+
+ clk_disable_unprepare(mt->clk_peri_therm);
+ clk_disable_unprepare(mt->clk_auxadc);
+
+ return 0;
+
+out:
+ dev_err(&pdev->dev, "Failed to wait until bus idle\n");
+
+ return ret;
+}
+
+static int __maybe_unused mtk_thermal_resume(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct mtk_thermal *mt = platform_get_drvdata(pdev);
+ int i, ret, ctrl_id;
+
+ ret = device_reset(&pdev->dev);
+ if (ret)
+ return ret;
+
+ ret = clk_prepare_enable(mt->clk_auxadc);
+ if (ret) {
+ dev_err(&pdev->dev, "Can't enable auxadc clk: %d\n", ret);
+ goto err_disable_clk_auxadc;
+ }
+
+ ret = clk_prepare_enable(mt->clk_peri_therm);
+ if (ret) {
+ dev_err(&pdev->dev, "Can't enable peri clk: %d\n", ret);
+ goto err_disable_clk_peri_therm;
+ }
+
+ for (ctrl_id = 0; ctrl_id < mt->conf->num_controller ; ctrl_id++)
+ for (i = 0; i < mt->conf->num_banks; i++)
+ mtk_thermal_init_bank(mt, i, mt->apmixed_phys_base,
+ mt->auxadc_phys_base, ctrl_id);
+
+ return 0;
+
+err_disable_clk_peri_therm:
+ clk_disable_unprepare(mt->clk_peri_therm);
+err_disable_clk_auxadc:
+ clk_disable_unprepare(mt->clk_auxadc);
+
+ return ret;
+}
+
+static SIMPLE_DEV_PM_OPS(mtk_thermal_pm_ops,
+ mtk_thermal_suspend, mtk_thermal_resume);
+
static struct platform_driver mtk_thermal_driver = {
.probe = mtk_thermal_probe,
.remove = mtk_thermal_remove,
.driver = {
.name = "mtk-thermal",
+ .pm = &mtk_thermal_pm_ops,
.of_match_table = mtk_thermal_of_match,
},
};
--
1.9.1
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