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* [PATCH v3 0/2] interconnect: qcom: Add support for upcoming Hawi SoC
From: Vivek Aknurwar @ 2026-04-09 21:01 UTC (permalink / raw)
  To: Georgi Djakov, Rob Herring, Krzysztof Kozlowski, Conor Dooley
  Cc: linux-arm-msm, linux-pm, devicetree, linux-kernel, Mike Tipton,
	Vivek Aknurwar, Konrad Dybcio, Dmitry Baryshkov,
	Krzysztof Kozlowski

Add interconnect bindings and RPMh-based interconnect
driver support for the upcoming Qualcomm Hawi SoC.

Signed-off-by: Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>
---
Changes in v3:
- Fix alignment of macros in the binding header.
- Update binding header commit summary and description to mention
  Qualcomm SoC
- Collected missing Reviewed-bys.
- Link to v2: https://lore.kernel.org/r/20260406-icc-hawi-v2-0-6cfee87a1d25@oss.qualcomm.com

Changes in v2:
- Fix warning reported by dt_binding_check.
- Collected Acked-bys
- Link to v1: https://lore.kernel.org/r/20260330-icc-hawi-v1-0-4b54a9e7d38c@oss.qualcomm.com

---
Vivek Aknurwar (2):
      dt-bindings: interconnect: qcom: document the RPMh NoC for Hawi SoC
      interconnect: qcom: add Hawi interconnect provider driver

 .../bindings/interconnect/qcom,hawi-rpmh.yaml      |  131 ++
 drivers/interconnect/qcom/Kconfig                  |    9 +
 drivers/interconnect/qcom/Makefile                 |    2 +
 drivers/interconnect/qcom/hawi.c                   | 2021 ++++++++++++++++++++
 include/dt-bindings/interconnect/qcom,hawi-rpmh.h  |  164 ++
 5 files changed, 2327 insertions(+)
---
base-commit: e3b32dcb9f23e3c3927ef3eec6a5842a988fb574
change-id: 20260311-icc-hawi-d6dc165f8935

Best regards,
-- 
Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>


^ permalink raw reply

* Re: [GIT PULL] pmdomain fixes for v7.0-rc8
From: pr-tracker-bot @ 2026-04-09 20:57 UTC (permalink / raw)
  To: Ulf Hansson; +Cc: Linus, linux-pm, linux-kernel, Ulf Hansson, linux-arm-kernel
In-Reply-To: <20260409150950.28527-1-ulf.hansson@linaro.org>

The pull request you sent on Thu,  9 Apr 2026 17:09:50 +0200:

> git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm.git tags/pmdomain-v7.0-rc6

has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/d58305b2dbe3434c9b21ede210329b97c44ee9e8

Thank you!

-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/prtracker.html

^ permalink raw reply

* [GIT PULL] thermal drivers changes for v7.1-rc1
From: Daniel Lezcano @ 2026-04-09 20:18 UTC (permalink / raw)
  To: Rafael J. Wysocki
  Cc: Linux Kernel Mailing List, Linux PM mailing list, Alexander Stein,
	Thorsten Blum, Richard Acayan, Manaf Meethalavalappu Pallikunhi,
	Krzysztof Kozlowski, Gopi Krishna Menon, John Madieu

Hi Rafael,

The following changes since commit 1f318b96cc84d7c2ab792fcc0bfd42a7ca890681:

   Linux 7.0-rc3 (2026-03-08 16:56:54 -0700)

are available in the Git repository at:

  
ssh://git@gitolite.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git 
tags/thermal-v7.1-rc1

for you to fetch changes up to bf746e2a41efd98668c97759e06d436ae5af5a82:

   thermal: renesas: rzg3e: Remove stale @trim_offset kernel-doc entry 
(2026-04-09 21:47:15 +0200)

----------------------------------------------------------------
- Added an OF node address to output message to make sensor names more
   distinguishable (Alexander Stein)

- Added hwmon support for the i.MX97 thermal sensor (Alexander Stein)

- Clamped correctly the results when doing value/temperature conversion
   in the Spreadtrum driver (Thorsten Blum)

- Added the SDM670 compatible DT bindings for the Tsens and the lMH
   drivers (Richard Acayan)

- Added the SM8750 compatible DT bindings for the Tsens (Manaf
   Meethalavalappu Pallikunhi)

- Added the Eliza SoC compatible DT bindings for the Tsens (Krzysztof
   Kozlowski)

- Fixed inverted condition check on error in the Spear driver (Gopi
   Krishna Menon)

- Converted the DT bindings documentation into DT schema (Gopi Krishna
   Menon)

- Used max() macro to increase readibility in the Broadcom STB thermal
   sensor (Thorsten Blum)

- Removed stale @trim_offset kernel-doc entry (John Madieu)

----------------------------------------------------------------
Alexander Stein (2):
       thermal/of: Add OF node address to output message
       thermal/drivers/imx91: Add hwmon support

Gopi Krishna Menon (2):
       thermal/drivers/spear: Fix error condition for reading 
st,thermal-flags
       dt-bindings: thermal: st,thermal-spear1340: convert to dtschema

John Madieu (1):
       thermal: renesas: rzg3e: Remove stale @trim_offset kernel-doc entry

Krzysztof Kozlowski (1):
       dt-bindings: thermal: qcom-tsens: Add Eliza SoC TSENS

Manaf Meethalavalappu Pallikunhi (1):
       dt-bindings: thermal: qcom-tsens: Document the SM8750 Temperature 
Sensor

Richard Acayan (2):
       dt-bindings: thermal: tsens: add SDM670 compatible
       dt-bindings: thermal: lmh: Add SDM670 compatible

Thorsten Blum (4):
       thermal/drivers/sprd: Fix temperature clamping in 
sprd_thm_temp_to_rawdata
       thermal/drivers/sprd: Fix raw temperature clamping in 
sprd_thm_rawdata_to_temp
       thermal/drivers/sprd: Use min instead of clamp in 
sprd_thm_temp_to_rawdata
       thermal/drivers/brcmstb_thermal: Use max to simplify brcmstb_get_temp

  .../devicetree/bindings/thermal/qcom-lmh.yaml      |  3 ++
  .../devicetree/bindings/thermal/qcom-tsens.yaml    |  3 ++
  .../devicetree/bindings/thermal/spear-thermal.txt  | 14 ---------
  .../bindings/thermal/st,thermal-spear1340.yaml     | 36 
++++++++++++++++++++++
  drivers/thermal/broadcom/brcmstb_thermal.c         |  8 ++---
  drivers/thermal/imx91_thermal.c                    |  4 +++
  drivers/thermal/renesas/rzg3e_thermal.c            |  1 -
  drivers/thermal/spear_thermal.c                    |  2 +-
  drivers/thermal/sprd_thermal.c                     |  6 ++--
  drivers/thermal/thermal_of.c                       | 20 ++++++------
  10 files changed, 63 insertions(+), 34 deletions(-)
  delete mode 100644 
Documentation/devicetree/bindings/thermal/spear-thermal.txt
  create mode 100644 
Documentation/devicetree/bindings/thermal/st,thermal-spear1340.yaml

^ permalink raw reply

* Re: [patch V2 09/11] power: supply: charger-manager: Switch to alarm_start_timer()
From: Sebastian Reichel @ 2026-04-09 19:20 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, linux-pm, Calvin Owens, Anna-Maria Behnsen,
	Frederic Weisbecker, Peter Zijlstra (Intel), John Stultz,
	Stephen Boyd, Alexander Viro, Christian Brauner, Jan Kara,
	linux-fsdevel, Pablo Neira Ayuso, Florian Westphal, Phil Sutter,
	netfilter-devel, coreteam
In-Reply-To: <20260408114952.536945376@kernel.org>

[-- Attachment #1: Type: text/plain, Size: 1730 bytes --]

Hi,

On Wed, Apr 08, 2026 at 01:54:24PM +0200, Thomas Gleixner wrote:
> The existing alarm_start() interface is replaced with the new
> alarm_start_timer() mechanism, which does not longer queue an already
> expired timer and returns the state. Adjust the code to utilize this.
> 
> No functional change intended.
> 
> Signed-off-by: Thomas Gleixner <tglx@kernel.org>
> Cc: Sebastian Reichel <sre@kernel.org>
> Cc: linux-pm@vger.kernel.org
> ---
> V2: Rename to alarm_start_timer()
> ---

Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com>

Greetings,

-- Sebastian

>  drivers/power/supply/charger-manager.c |   12 +++++++-----
>  1 file changed, 7 insertions(+), 5 deletions(-)
> --- a/drivers/power/supply/charger-manager.c
> +++ b/drivers/power/supply/charger-manager.c
> @@ -881,7 +881,7 @@ static bool cm_setup_timer(void)
>  	mutex_unlock(&cm_list_mtx);
>  
>  	if (timer_req && cm_timer) {
> -		ktime_t now, add;
> +		ktime_t exp;
>  
>  		/*
>  		 * Set alarm with the polling interval (wakeup_ms)
> @@ -893,14 +893,16 @@ static bool cm_setup_timer(void)
>  
>  		pr_info("Charger Manager wakeup timer: %u ms\n", wakeup_ms);
>  
> -		now = ktime_get_boottime();
> -		add = ktime_set(wakeup_ms / MSEC_PER_SEC,
> +		exp = ktime_set(wakeup_ms / MSEC_PER_SEC,
>  				(wakeup_ms % MSEC_PER_SEC) * NSEC_PER_MSEC);
> -		alarm_start(cm_timer, ktime_add(now, add));
>  
>  		cm_suspend_duration_ms = wakeup_ms;
>  
> -		return true;
> +		/*
> +		 * The timer should always be queued as the timeout is at least
> +		 * two seconds out. Handle it correctly nevertheless.
> +		 */
> +		return alarm_start_timer(cm_timer, exp, true);
>  	}
>  	return false;
>  }
> 

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

^ permalink raw reply

* Re: [BUG] Lenovo 83JL / WD SN7100S: intermittent loss of secondary NVMe after s2idle resume, root port 00:02.1 retraining fails
From: Jacopo Labardi @ 2026-04-09 19:18 UTC (permalink / raw)
  To: Bjorn Helgaas; +Cc: linux-nvme, linux-pci, linux-pm
In-Reply-To: <20260409190515.GA407093@bhelgaas>

Bjorn,

Thanks. Below are the redacted logs from the reproducer boot. In that
specific run the failure occurred on the third suspend/resume cycle,
but the issue is intermittent in general and may happen on the first
cycle or only after several cycles.

Redactions are limited to:
- system serial number
- SMBIOS UUID
- root filesystem UUID
- hostname
- Wi-Fi MAC/BSSID
- NVMe serial numbers

===== uname =====

### COMMAND: uname -a

Linux <HOST> 6.19.11-arch1-1 #1 SMP PREEMPT_DYNAMIC Thu, 02 Apr 2026
23:33:01 +0000 x86_64 GNU/Linux


===== root_cmdline =====

### COMMAND: cat /proc/cmdline

quiet nowatchdog rw rootflags=subvol=/@ rootfstype=btrfs
root=UUID=<ROOT_UUID> amd_pstate=active iommu=pt i8042.nopnp
loglevel=3 8250.nr_uarts=0 tpm_tis.interrupts=0 random.trust_cpu=on
snd_hda_intel.power_save=10 snd_hda_intel.power_save_controller=Y


===== kernel_tainted =====

### COMMAND: cat /proc/sys/kernel/tainted

0


===== mem_sleep =====

### COMMAND: cat /sys/power/mem_sleep

[s2idle]


===== pacman_versions =====

### COMMAND: pacman -Q linux linux-headers linux-cachyos
linux-cachyos-headers acpi_call-dkms

linux 6.19.11.arch1-1
linux-headers 6.19.11.arch1-1
linux-cachyos 6.19.11-1
linux-cachyos-headers 6.19.11-1
acpi_call-dkms 1.2.2-3


===== nvme_list =====

### COMMAND: nvme list

Node                  Generic               SN                   Model
                                   Namespace  Usage
  Format           FW Rev
--------------------- --------------------- --------------------
---------------------------------------- ----------
-------------------------- ---------------- --------
/dev/nvme0n1          /dev/ng0n1            <LEXAR_SN>   Lexar SSD
NM790 2TB                      0x1          2.05  TB /   2.05  TB
512   B +  0 B   18950


===== lspci_rootport =====

### COMMAND: lspci -nnvv -s 00:02.1

00:02.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device
[1022:1126] (prog-if 00 [Normal decode])
    Subsystem: Advanced Micro Devices, Inc. [AMD] Device [1022:1453]
    Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop-
ParErr- Stepping- SERR- FastB2B- DisINTx+
    Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
    Latency: 0, Cache Line Size: 64 bytes
    Interrupts: MSI(X) routed to IRQ 32
    IOMMU group: 5
    Bus: primary=00, secondary=bf, subordinate=bf, sec-latency=0
    I/O behind bridge: [disabled] [32-bit]
    Memory behind bridge: 90c00000-90cfffff [size=1M] [32-bit]
    Prefetchable memory behind bridge: [disabled] [64-bit]
    Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- <SERR- <PERR-
    BridgeCtl: Parity- SERR+ NoISA- VGA- VGA16- MAbort- >Reset- FastB2B-
        PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
    Capabilities: <access denied>
    Kernel driver in use: pcieport
    Kernel modules: shpchp



===== lspci_wd =====

### COMMAND: lspci -nnvv -s bf:00.0

bf:00.0 Non-Volatile memory controller [0108]: Sandisk Corp WD PC
SN7100S M.2 2242 NVMe SSD (DRAM-less) [15b7:5044] (rev 01) (prog-if 02
[NVM Express])
    Subsystem: Sandisk Corp WD PC SN7100S M.2 2242 NVMe SSD
(DRAM-less) [15b7:5044]
    !!! Unknown header type 7f
    IOMMU group: 16
    Region 0: Memory at 90c00000 (64-bit, non-prefetchable) [size=16K]
    Kernel driver in use: nvme
    Kernel modules: nvme



===== lspci_tree =====

### COMMAND: lspci -tv

-[0000:00]-+-00.0  Advanced Micro Devices, Inc. [AMD] Krackan Root Complex
           +-00.2  Advanced Micro Devices, Inc. [AMD] Krackan IOMMU
           +-01.0  Advanced Micro Devices, Inc. [AMD] Device 1124
           +-01.1-[01-5f]--
           +-01.2-[60-be]--
           +-02.0  Advanced Micro Devices, Inc. [AMD] Device 1124
           +-02.1-[bf]----00.0  Sandisk Corp WD PC SN7100S M.2 2242
NVMe SSD (DRAM-less)
           +-02.2-[c0]----00.0  O2 Micro, Inc. OZ711 SD/MMC Card
Reader Controller
           +-02.3-[c1]----00.0  Intel Corporation Wi-Fi 6E(802.11ax)
AX210/AX1675* 2x2 [Typhoon Peak]
           +-03.0  Advanced Micro Devices, Inc. [AMD] Device 1124
           +-03.2-[c2]----00.0  Shenzhen Longsys Electronics Co., Ltd.
Lexar NM790 / Patriot Viper VP4300 Lite NVMe SSD (DRAM-less)
           +-08.0  Advanced Micro Devices, Inc. [AMD] Device 1124
           +-08.1-[c3]--+-00.0  Advanced Micro Devices, Inc. [AMD/ATI]
Krackan [Radeon 840M / 860M Graphics]
           |            +-00.1  Advanced Micro Devices, Inc. [AMD/ATI]
Radeon High Definition Audio Controller
           |            +-00.2  Advanced Micro Devices, Inc. [AMD]
Strix/Krackan/Strix Halo CCP/ASP
           |            +-00.4  Advanced Micro Devices, Inc. [AMD] Device 1128
           |            +-00.5  Advanced Micro Devices, Inc. [AMD]
Audio Coprocessor
           |            \-00.6  Advanced Micro Devices, Inc. [AMD]
Ryzen HD Audio Controller
           +-08.2-[c4]--+-00.0  Advanced Micro Devices, Inc. [AMD]
Krackan PCIe Dummy Function
           |            \-00.1  Advanced Micro Devices, Inc. [AMD]
Strix/Krackan/Strix Halo Neural Processing Unit
           +-08.3-[c5]--+-00.0  Advanced Micro Devices, Inc. [AMD] Device 1118
           |            +-00.3  Advanced Micro Devices, Inc. [AMD] Device 111c
           |            +-00.4  Advanced Micro Devices, Inc. [AMD] Device 111e
           |            +-00.5  Advanced Micro Devices, Inc. [AMD] Device 1120
           |            \-00.6  Advanced Micro Devices, Inc. [AMD] Device 1121
           +-14.0  Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller
           +-14.3  Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge
           +-18.0  Advanced Micro Devices, Inc. [AMD] Krackan Data
Fabric; Function 0
           +-18.1  Advanced Micro Devices, Inc. [AMD] Krackan Data
Fabric; Function 1
           +-18.2  Advanced Micro Devices, Inc. [AMD] Krackan Data
Fabric; Function 2
           +-18.3  Advanced Micro Devices, Inc. [AMD] Krackan Data
Fabric; Function 3
           +-18.4  Advanced Micro Devices, Inc. [AMD] Krackan Data
Fabric; Function 4
           +-18.5  Advanced Micro Devices, Inc. [AMD] Krackan Data
Fabric; Function 5
           +-18.6  Advanced Micro Devices, Inc. [AMD] Krackan Data
Fabric; Function 6
           \-18.7  Advanced Micro Devices, Inc. [AMD] Krackan Data
Fabric; Function 7


===== journal_suspend_current =====

### COMMAND: sudo journalctl -b -u systemd-suspend.service --no-pager

apr 09 16:23:10 <HOST> systemd[1]: Starting System Suspend...
apr 09 16:23:10 <HOST> systemd-sleep[3579]: Successfully froze unit
'user.slice'.
apr 09 16:23:10 <HOST> systemd-sleep[3579]: Performing sleep operation
'suspend'...
apr 09 16:23:37 <HOST> systemd-sleep[3579]: System returned from sleep
operation 'suspend'.
apr 09 16:23:37 <HOST> systemd-sleep[3579]: Successfully thawed unit
'user.slice'.
apr 09 16:23:37 <HOST> systemd[1]: systemd-suspend.service:
Deactivated successfully.
apr 09 16:23:37 <HOST> systemd[1]: Finished System Suspend.
apr 09 16:24:10 <HOST> systemd[1]: Starting System Suspend...
apr 09 16:24:10 <HOST> systemd-sleep[3861]: Successfully froze unit
'user.slice'.
apr 09 16:24:10 <HOST> systemd-sleep[3861]: Performing sleep operation
'suspend'...
apr 09 16:24:14 <HOST> systemd-sleep[3861]: System returned from sleep
operation 'suspend'.
apr 09 16:24:14 <HOST> systemd-sleep[3861]: Successfully thawed unit
'user.slice'.
apr 09 16:24:14 <HOST> systemd[1]: systemd-suspend.service:
Deactivated successfully.
apr 09 16:24:14 <HOST> systemd[1]: Finished System Suspend.
apr 09 16:24:34 <HOST> systemd[1]: Starting System Suspend...
apr 09 16:24:34 <HOST> systemd-sleep[4078]: Successfully froze unit
'user.slice'.
apr 09 16:24:34 <HOST> systemd-sleep[4078]: Performing sleep operation
'suspend'...
apr 09 16:24:54 <HOST> systemd-sleep[4078]: System returned from sleep
operation 'suspend'.
apr 09 16:24:54 <HOST> systemd-sleep[4078]: Successfully thawed unit
'user.slice'.
apr 09 16:24:54 <HOST> systemd[1]: systemd-suspend.service:
Deactivated successfully.
apr 09 16:24:54 <HOST> systemd[1]: Finished System Suspend.


===== journal_kernel_current =====

### COMMAND: sudo journalctl -k -b --no-pager

apr 09 16:19:36 archlinux kernel: Linux version 6.19.11-arch1-1
(linux@archlinux) (gcc (GCC) 15.2.1 20260209, GNU ld (GNU Binutils)
2.46) #1 SMP PREEMPT_DYNAMIC Thu, 02 Apr 2026 23:33:01 +0000
apr 09 16:19:36 archlinux kernel: Command line: quiet nowatchdog rw
rootflags=subvol=/@ rootfstype=btrfs root=UUID=<ROOT_UUID>
amd_pstate=active iommu=pt i8042.nopnp loglevel=3 8250.nr_uarts=0
tpm_tis.interrupts=0 random.trust_cpu=on snd_hda_intel.power_save=10
snd_hda_intel.power_save_controller=Y
apr 09 16:19:36 archlinux kernel: x86/split lock detection: #DB:
warning on user-space bus_locks
apr 09 16:19:36 archlinux kernel: BIOS-provided physical RAM map:
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x0000000000000000-0x000000000009efff] usable
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x000000000009f000-0x00000000000fffff] reserved
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x0000000000100000-0x0000000009afffff] usable
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x0000000009b00000-0x0000000009dfffff] reserved
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x0000000009e00000-0x0000000009efffff] usable
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x0000000009f00000-0x0000000009f3bfff] ACPI NVS
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x0000000009f3c000-0x000000006894dfff] usable
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x000000006894e000-0x000000006ab4dfff] reserved
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x000000006ab4e000-0x000000006ab66fff] usable
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x000000006ab67000-0x000000006ab6cfff] reserved
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x000000006ab6d000-0x000000006ab6efff] usable
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x000000006ab6f000-0x000000006ab6ffff] reserved
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x000000006ab70000-0x0000000076d7efff] usable
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x0000000076d7f000-0x000000007977efff] reserved
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x000000007977f000-0x0000000079f7efff] ACPI NVS
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x0000000079f7f000-0x0000000079ffefff] ACPI data
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x0000000079fff000-0x0000000079ffffff] usable
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x000000007a000000-0x000000007bffffff] reserved
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x000000007d675000-0x00000000ffffffff] reserved
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x0000000100000000-0x00000007fe27ffff] usable
apr 09 16:19:36 archlinux kernel: BIOS-e820: [mem
0x00000007fe280000-0x00000008a01fffff] reserved
apr 09 16:19:36 archlinux kernel: NX (Execute Disable) protection: active
apr 09 16:19:36 archlinux kernel: APIC: Static calls initialized
apr 09 16:19:36 archlinux kernel: efi: EFI v2.9 by INSYDE Corp.
apr 09 16:19:36 archlinux kernel: efi: ACPI=0x79ffe000 ACPI
2.0=0x79ffe014 TPMFinalLog=0x79f3e000 SMBIOS=0x77e6e000 SMBIOS
3.0=0x77e6b000 MEMATTR=0x7236a018 ESRT=0x72396a98
apr 09 16:19:36 archlinux kernel: efi: [Firmware Bug]: Invalid EFI
memory map entries:
apr 09 16:19:36 archlinux kernel: efi: mem65:
[type=1605912689|attr=0xed5d4358e11d435c]
range=[0xee55f47ae215f47e-0xd66cb75821dbf35b47d] (invalid)
apr 09 16:19:36 archlinux kernel: efi: mem66:
[type=1159884594|attr=0xcd65669ac125669e]
range=[0x4a6ad814462ad810-0xf65a9ae87b5a56eb80f] (invalid)
apr 09 16:19:36 archlinux kernel: efi: Removing 2 invalid memory map entries.
apr 09 16:19:36 archlinux kernel: efi: Remove mem62: MMIO
range=[0x80000000-0xffffffff] (2048MB) from e820 map
apr 09 16:19:36 archlinux kernel: e820: remove [mem
0x80000000-0xffffffff] reserved
apr 09 16:19:36 archlinux kernel: efi: Remove mem64: MMIO
range=[0x880000000-0x8a01fffff] (514MB) from e820 map
apr 09 16:19:36 archlinux kernel: e820: remove [mem
0x880000000-0x8a01fffff] reserved
apr 09 16:19:36 archlinux kernel: SMBIOS 3.3.0 present.
apr 09 16:19:36 archlinux kernel: DMI: LENOVO 83JL/LNVNB161216, BIOS
QKCN29WW 12/23/2025
apr 09 16:19:36 archlinux kernel: DMI: Memory slots populated: 4/4
apr 09 16:19:36 archlinux kernel: tsc: Fast TSC calibration using PIT
apr 09 16:19:36 archlinux kernel: tsc: Detected 1996.356 MHz processor
apr 09 16:19:36 archlinux kernel: e820: update [mem
0x00000000-0x00000fff] usable ==> reserved
apr 09 16:19:36 archlinux kernel: e820: remove [mem
0x000a0000-0x000fffff] usable
apr 09 16:19:36 archlinux kernel: last_pfn = 0x7fe280 max_arch_pfn = 0x400000000
apr 09 16:19:36 archlinux kernel: MTRR map: 8 entries (3 fixed + 5
variable; max 20), built from 9 variable MTRRs
apr 09 16:19:36 archlinux kernel: x86/PAT: Configuration [0-7]: WB  WC
 UC- UC  WB  WP  UC- WT
apr 09 16:19:36 archlinux kernel: last_pfn = 0x7a000 max_arch_pfn = 0x400000000
apr 09 16:19:36 archlinux kernel: esrt: Reserving ESRT space from
0x0000000072396a98 to 0x0000000072396b98.
apr 09 16:19:36 archlinux kernel: e820: update [mem
0x72396000-0x72396fff] usable ==> reserved
apr 09 16:19:36 archlinux kernel: Using GB pages for direct mapping
apr 09 16:19:36 archlinux kernel: Secure boot could not be determined
apr 09 16:19:36 archlinux kernel: RAMDISK: [mem 0x5d100000-0x60f2afff]
apr 09 16:19:36 archlinux kernel: ACPI: Early table checksum
verification disabled
apr 09 16:19:36 archlinux kernel: ACPI: RSDP 0x0000000079FFE014 000024
(v02 LENOVO)
apr 09 16:19:36 archlinux kernel: ACPI: XSDT 0x0000000079F9F228 0001CC
(v01 LENOVO CB-01    00000001      01000013)
apr 09 16:19:36 archlinux kernel: ACPI: FACP 0x0000000079FDE000 000114
(v06 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: DSDT 0x0000000079FB4000 0091FB
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: FACS 0x0000000079EB1000 000040
apr 09 16:19:36 archlinux kernel: ACPI: UEFI 0x0000000079F66000 0001CF
(v01 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FFC000 000103
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FEF000 00C922
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FEE000 00094F
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FED000 000033
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FEB000 001011
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FE3000 007F18
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FE2000 00033E
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: MSDM 0x0000000079FE1000 000055
(v03 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: ASF! 0x0000000079FE0000 0000A5
(v32 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: BOOT 0x0000000079FDF000 000028
(v01 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: HPET 0x0000000079FDD000 000038
(v01 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: MCFG 0x0000000079FDC000 00003C
(v01 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SLIC 0x0000000079FDB000 000176
(v01 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: APIC 0x0000000079FCF000 0000EA
(v06 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: VFCT 0x0000000079FC9000 005484
(v01 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: ABLT 0x0000000079FC8000 0002C2
(v00 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FFD000 0000FA
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SDEV 0x0000000079FC6000 000144
(v01 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FC5000 00021A
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: PCCT 0x0000000079FC4000 0000D4
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FBE000 00547E
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FD8000 000D54
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FD6000 001504
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FD5000 000A70
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FD3000 001DB7
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FD2000 0006CD
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FD1000 000CA9
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FB1000 002AA6
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FA7000 009A53
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: FPDT 0x0000000079FD0000 000044
(v01 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: BGRT 0x0000000079FA6000 000038
(v01 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: WSMT 0x0000000079FA5000 000028
(v01 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: TPM2 0x0000000079FDA000 000050
(v05 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FA3000 001B4C
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FD9000 00010D
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FA2000 000051
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: IVRS 0x0000000079FA1000 0001F6
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FA0000 000B9B
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079FC7000 000D1E
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079F9E000 000D1E
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079F9D000 0004AE
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079F9B000 00192F
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079F9A000 000500
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079F99000 000813
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079F97000 00101C
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079F8D000 0097CD
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079F88000 004606
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079F87000 0008DF
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079F86000 00096A
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079F85000 00008D
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: SSDT 0x0000000079F84000 000F5C
(v02 LENOVO CB-01    00000001 ACPI 00040000)
apr 09 16:19:36 archlinux kernel: ACPI: Reserving FACP table memory at
[mem 0x79fde000-0x79fde113]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving DSDT table memory at
[mem 0x79fb4000-0x79fbd1fa]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving FACS table memory at
[mem 0x79eb1000-0x79eb103f]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving UEFI table memory at
[mem 0x79f66000-0x79f661ce]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79ffc000-0x79ffc102]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fef000-0x79ffb921]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fee000-0x79fee94e]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fed000-0x79fed032]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79feb000-0x79fec010]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fe3000-0x79feaf17]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fe2000-0x79fe233d]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving MSDM table memory at
[mem 0x79fe1000-0x79fe1054]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving ASF! table memory at
[mem 0x79fe0000-0x79fe00a4]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving BOOT table memory at
[mem 0x79fdf000-0x79fdf027]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving HPET table memory at
[mem 0x79fdd000-0x79fdd037]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving MCFG table memory at
[mem 0x79fdc000-0x79fdc03b]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SLIC table memory at
[mem 0x79fdb000-0x79fdb175]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving APIC table memory at
[mem 0x79fcf000-0x79fcf0e9]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving VFCT table memory at
[mem 0x79fc9000-0x79fce483]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving ABLT table memory at
[mem 0x79fc8000-0x79fc82c1]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79ffd000-0x79ffd0f9]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SDEV table memory at
[mem 0x79fc6000-0x79fc6143]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fc5000-0x79fc5219]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving PCCT table memory at
[mem 0x79fc4000-0x79fc40d3]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fbe000-0x79fc347d]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fd8000-0x79fd8d53]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fd6000-0x79fd7503]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fd5000-0x79fd5a6f]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fd3000-0x79fd4db6]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fd2000-0x79fd26cc]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fd1000-0x79fd1ca8]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fb1000-0x79fb3aa5]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fa7000-0x79fb0a52]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving FPDT table memory at
[mem 0x79fd0000-0x79fd0043]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving BGRT table memory at
[mem 0x79fa6000-0x79fa6037]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving WSMT table memory at
[mem 0x79fa5000-0x79fa5027]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving TPM2 table memory at
[mem 0x79fda000-0x79fda04f]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fa3000-0x79fa4b4b]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fd9000-0x79fd910c]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fa2000-0x79fa2050]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving IVRS table memory at
[mem 0x79fa1000-0x79fa11f5]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fa0000-0x79fa0b9a]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79fc7000-0x79fc7d1d]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79f9e000-0x79f9ed1d]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79f9d000-0x79f9d4ad]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79f9b000-0x79f9c92e]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79f9a000-0x79f9a4ff]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79f99000-0x79f99812]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79f97000-0x79f9801b]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79f8d000-0x79f967cc]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79f88000-0x79f8c605]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79f87000-0x79f878de]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79f86000-0x79f86969]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79f85000-0x79f8508c]
apr 09 16:19:36 archlinux kernel: ACPI: Reserving SSDT table memory at
[mem 0x79f84000-0x79f84f5b]
apr 09 16:19:36 archlinux kernel: No NUMA configuration found
apr 09 16:19:36 archlinux kernel: Faking a node at [mem
0x0000000000000000-0x00000007fe27ffff]
apr 09 16:19:36 archlinux kernel: NODE_DATA(0) allocated [mem
0x7fe255280-0x7fe27ffff]
apr 09 16:19:36 archlinux kernel: Zone ranges:
apr 09 16:19:36 archlinux kernel:   DMA      [mem
0x0000000000001000-0x0000000000ffffff]
apr 09 16:19:36 archlinux kernel:   DMA32    [mem
0x0000000001000000-0x00000000ffffffff]
apr 09 16:19:36 archlinux kernel:   Normal   [mem
0x0000000100000000-0x00000007fe27ffff]
apr 09 16:19:36 archlinux kernel:   Device   empty
apr 09 16:19:36 archlinux kernel: Movable zone start for each node
apr 09 16:19:36 archlinux kernel: Early memory node ranges
apr 09 16:19:36 archlinux kernel:   node   0: [mem
0x0000000000001000-0x000000000009efff]
apr 09 16:19:36 archlinux kernel:   node   0: [mem
0x0000000000100000-0x0000000009afffff]
apr 09 16:19:36 archlinux kernel:   node   0: [mem
0x0000000009e00000-0x0000000009efffff]
apr 09 16:19:36 archlinux kernel:   node   0: [mem
0x0000000009f3c000-0x000000006894dfff]
apr 09 16:19:36 archlinux kernel:   node   0: [mem
0x000000006ab4e000-0x000000006ab66fff]
apr 09 16:19:36 archlinux kernel:   node   0: [mem
0x000000006ab6d000-0x000000006ab6efff]
apr 09 16:19:36 archlinux kernel:   node   0: [mem
0x000000006ab70000-0x0000000076d7efff]
apr 09 16:19:36 archlinux kernel:   node   0: [mem
0x0000000079fff000-0x0000000079ffffff]
apr 09 16:19:36 archlinux kernel:   node   0: [mem
0x0000000100000000-0x00000007fe27ffff]
apr 09 16:19:36 archlinux kernel: Initmem setup node 0 [mem
0x0000000000001000-0x00000007fe27ffff]
apr 09 16:19:36 archlinux kernel: On node 0, zone DMA: 1 pages in
unavailable ranges
apr 09 16:19:36 archlinux kernel: On node 0, zone DMA: 97 pages in
unavailable ranges
apr 09 16:19:36 archlinux kernel: On node 0, zone DMA32: 768 pages in
unavailable ranges
apr 09 16:19:36 archlinux kernel: On node 0, zone DMA32: 60 pages in
unavailable ranges
apr 09 16:19:36 archlinux kernel: On node 0, zone DMA32: 8704 pages in
unavailable ranges
apr 09 16:19:36 archlinux kernel: On node 0, zone DMA32: 6 pages in
unavailable ranges
apr 09 16:19:36 archlinux kernel: On node 0, zone DMA32: 1 pages in
unavailable ranges
apr 09 16:19:36 archlinux kernel: On node 0, zone DMA32: 12928 pages
in unavailable ranges
apr 09 16:19:36 archlinux kernel: On node 0, zone Normal: 24576 pages
in unavailable ranges
apr 09 16:19:36 archlinux kernel: On node 0, zone Normal: 7552 pages
in unavailable ranges
apr 09 16:19:36 archlinux kernel: ACPI: PM-Timer IO Port: 0x408
apr 09 16:19:36 archlinux kernel: ACPI: X2APIC_NMI (uid[0xffffffff]
high level lint[0x1])
apr 09 16:19:36 archlinux kernel: ACPI: LAPIC_NMI (acpi_id[0xff] high
level lint[0x1])
apr 09 16:19:36 archlinux kernel: IOAPIC[0]: apic_id 33, version 33,
address 0xfec00000, GSI 0-23
apr 09 16:19:36 archlinux kernel: IOAPIC[1]: apic_id 34, version 33,
address 0xfd280000, GSI 24-55
apr 09 16:19:36 archlinux kernel: ACPI: INT_SRC_OVR (bus 0 bus_irq 0
global_irq 2 dfl dfl)
apr 09 16:19:36 archlinux kernel: ACPI: INT_SRC_OVR (bus 0 bus_irq 9
global_irq 9 low level)
apr 09 16:19:36 archlinux kernel: ACPI: Using ACPI (MADT) for SMP
configuration information
apr 09 16:19:36 archlinux kernel: ACPI: HPET id: 0x10228201 base: 0xfed00000
apr 09 16:19:36 archlinux kernel: e820: update [mem
0x70e19000-0x71078fff] usable ==> reserved
apr 09 16:19:36 archlinux kernel: CPU topo: Max. logical packages:   1
apr 09 16:19:36 archlinux kernel: CPU topo: Max. logical nodes:      1
apr 09 16:19:36 archlinux kernel: CPU topo: Num. nodes per package:  1
apr 09 16:19:36 archlinux kernel: CPU topo: Max. logical dies:       1
apr 09 16:19:36 archlinux kernel: CPU topo: Max. dies per package:   1
apr 09 16:19:36 archlinux kernel: CPU topo: Max. threads per core:   2
apr 09 16:19:36 archlinux kernel: CPU topo: Num. cores per package:     8
apr 09 16:19:36 archlinux kernel: CPU topo: Num. threads per package:  16
apr 09 16:19:36 archlinux kernel: CPU topo: Allowing 16 present CPUs
plus 0 hotplug CPUs
apr 09 16:19:36 archlinux kernel: PM: hibernation: Registered nosave
memory: [mem 0x00000000-0x00000fff]
apr 09 16:19:36 archlinux kernel: PM: hibernation: Registered nosave
memory: [mem 0x0009f000-0x000fffff]
apr 09 16:19:36 archlinux kernel: PM: hibernation: Registered nosave
memory: [mem 0x09b00000-0x09dfffff]
apr 09 16:19:36 archlinux kernel: PM: hibernation: Registered nosave
memory: [mem 0x09f00000-0x09f3bfff]
apr 09 16:19:36 archlinux kernel: PM: hibernation: Registered nosave
memory: [mem 0x6894e000-0x6ab4dfff]
apr 09 16:19:36 archlinux kernel: PM: hibernation: Registered nosave
memory: [mem 0x6ab67000-0x6ab6cfff]
apr 09 16:19:36 archlinux kernel: PM: hibernation: Registered nosave
memory: [mem 0x6ab6f000-0x6ab6ffff]
apr 09 16:19:36 archlinux kernel: PM: hibernation: Registered nosave
memory: [mem 0x70e19000-0x71078fff]
apr 09 16:19:36 archlinux kernel: PM: hibernation: Registered nosave
memory: [mem 0x72396000-0x72396fff]
apr 09 16:19:36 archlinux kernel: PM: hibernation: Registered nosave
memory: [mem 0x76d7f000-0x79ffefff]
apr 09 16:19:36 archlinux kernel: PM: hibernation: Registered nosave
memory: [mem 0x7a000000-0xffffffff]
apr 09 16:19:36 archlinux kernel: [mem 0x80000000-0xffffffff]
available for PCI devices
apr 09 16:19:36 archlinux kernel: Booting paravirtualized kernel on
bare hardware
apr 09 16:19:36 archlinux kernel: clocksource: refined-jiffies: mask:
0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1910969940391419 ns
apr 09 16:19:36 archlinux kernel: setup_percpu: NR_CPUS:8192
nr_cpumask_bits:16 nr_cpu_ids:16 nr_node_ids:1
apr 09 16:19:36 archlinux kernel: percpu: Embedded 63 pages/cpu
s221184 r8192 d28672 u262144
apr 09 16:19:36 archlinux kernel: pcpu-alloc: s221184 r8192 d28672
u262144 alloc=1*2097152
apr 09 16:19:36 archlinux kernel: pcpu-alloc: [0] 00 01 02 03 04 05 06
07 [0] 08 09 10 11 12 13 14 15
apr 09 16:19:36 archlinux kernel: Kernel command line: quiet
nowatchdog rw rootflags=subvol=/@ rootfstype=btrfs
root=UUID=<ROOT_UUID> amd_pstate=active iommu=pt i8042.nopnp
loglevel=3 8250.nr_uarts=0 tpm_tis.interrupts=0 random.trust_cpu=on
snd_hda_intel.power_save=10 snd_hda_intel.power_save_controller=Y
apr 09 16:19:36 archlinux kernel: random: crng init done
apr 09 16:19:36 archlinux kernel: printk: log buffer data + meta data:
131072 + 458752 = 589824 bytes
apr 09 16:19:36 archlinux kernel: Dentry cache hash table entries:
4194304 (order: 13, 33554432 bytes, linear)
apr 09 16:19:36 archlinux kernel: Inode-cache hash table entries:
2097152 (order: 12, 16777216 bytes, linear)
apr 09 16:19:36 archlinux kernel: software IO TLB: area num 16.
apr 09 16:19:36 archlinux kernel: Fallback order for Node 0: 0
apr 09 16:19:36 archlinux kernel: Built 1 zonelists, mobility grouping
on.  Total pages: 7809627
apr 09 16:19:36 archlinux kernel: Policy zone: Normal
apr 09 16:19:36 archlinux kernel: mem auto-init: stack:all(zero), heap
alloc:on, heap free:off
apr 09 16:19:36 archlinux kernel: SLUB: HWalign=64, Order=0-3,
MinObjects=0, CPUs=16, Nodes=1
apr 09 16:19:36 archlinux kernel: ftrace: allocating 57677 entries in 228 pages
apr 09 16:19:36 archlinux kernel: ftrace: allocated 228 pages with 4 groups
apr 09 16:19:36 archlinux kernel: Dynamic Preempt: full
apr 09 16:19:36 archlinux kernel: rcu: Preemptible hierarchical RCU
implementation.
apr 09 16:19:36 archlinux kernel: rcu:         RCU restricting CPUs
from NR_CPUS=8192 to nr_cpu_ids=16.
apr 09 16:19:36 archlinux kernel: rcu:         RCU priority boosting:
priority 1 delay 500 ms.
apr 09 16:19:36 archlinux kernel:         Trampoline variant of Tasks
RCU enabled.
apr 09 16:19:36 archlinux kernel:         Rude variant of Tasks RCU enabled.
apr 09 16:19:36 archlinux kernel:         Tracing variant of Tasks RCU enabled.
apr 09 16:19:36 archlinux kernel: rcu: RCU calculated value of
scheduler-enlistment delay is 100 jiffies.
apr 09 16:19:36 archlinux kernel: rcu: Adjusting geometry for
rcu_fanout_leaf=16, nr_cpu_ids=16
apr 09 16:19:36 archlinux kernel: RCU Tasks: Setting shift to 4 and
lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=16.
apr 09 16:19:36 archlinux kernel: RCU Tasks Rude: Setting shift to 4
and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=16.
apr 09 16:19:36 archlinux kernel: RCU Tasks Trace: Setting shift to 4
and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=16.
apr 09 16:19:36 archlinux kernel: NR_IRQS: 524544, nr_irqs: 1096,
preallocated irqs: 16
apr 09 16:19:36 archlinux kernel: rcu: srcu_init: Setting srcu_struct
sizes based on contention.
apr 09 16:19:36 archlinux kernel: kfence: initialized - using 2097152
bytes for 255 objects at 0x(____ptrval____)-0x(____ptrval____)
apr 09 16:19:36 archlinux kernel: Console: colour dummy device 80x25
apr 09 16:19:36 archlinux kernel: printk: legacy console [tty0] enabled
apr 09 16:19:36 archlinux kernel: ACPI: Core revision 20250807
apr 09 16:19:36 archlinux kernel: clocksource: hpet: mask: 0xffffffff
max_cycles: 0xffffffff, max_idle_ns: 133484873504 ns
apr 09 16:19:36 archlinux kernel: APIC: Switch to symmetric I/O mode setup
apr 09 16:19:36 archlinux kernel: AMD-Vi: ivrs, add hid:AMDI0020,
uid:ID00, rdevid:0xa0
apr 09 16:19:36 archlinux kernel: AMD-Vi: ivrs, add hid:AMDI0020,
uid:ID01, rdevid:0xa0
apr 09 16:19:36 archlinux kernel: AMD-Vi: ivrs, add hid:AMDI0020,
uid:ID02, rdevid:0xa0
apr 09 16:19:36 archlinux kernel: AMD-Vi: ivrs, add hid:AMDI0020,
uid:ID03, rdevid:0x98
apr 09 16:19:36 archlinux kernel: AMD-Vi: ivrs, add hid:MSFT0201,
uid:1, rdevid:0x60
apr 09 16:19:36 archlinux kernel: AMD-Vi: ivrs, add hid:AMDI0020,
uid:ID04, rdevid:0x98
apr 09 16:19:36 archlinux kernel: AMD-Vi: Using global IVHD
EFR:0x246577efa2254afa, EFR2:0x10
apr 09 16:19:36 archlinux kernel: ..TIMER: vector=0x30 apic1=0 pin1=2
apic2=-1 pin2=-1
apr 09 16:19:36 archlinux kernel: clocksource: tsc-early: mask:
0xffffffffffffffff max_cycles: 0x398d7801cfe, max_idle_ns:
881590659101 ns
apr 09 16:19:36 archlinux kernel: Calibrating delay loop (skipped),
value calculated using timer frequency.. 3992.71 BogoMIPS
(lpj=1996356)
apr 09 16:19:36 archlinux kernel: x86/cpu: User Mode Instruction
Prevention (UMIP) activated
apr 09 16:19:36 archlinux kernel: LVT offset 1 assigned for vector 0xf9
apr 09 16:19:36 archlinux kernel: LVT offset 2 assigned for vector 0xf4
apr 09 16:19:36 archlinux kernel: Last level iTLB entries: 4KB 64, 2MB
64, 4MB 32
apr 09 16:19:36 archlinux kernel: Last level dTLB entries: 4KB 128,
2MB 128, 4MB 64, 1GB 0
apr 09 16:19:36 archlinux kernel: process: using mwait in idle threads
apr 09 16:19:36 archlinux kernel: mitigations: Enabled attack vectors:
user_kernel, user_user, guest_host, guest_guest, SMT mitigations: auto
apr 09 16:19:36 archlinux kernel: Speculative Store Bypass:
Mitigation: Speculative Store Bypass disabled via prctl
apr 09 16:19:36 archlinux kernel: Spectre V2 : Mitigation: Enhanced /
Automatic IBRS
apr 09 16:19:36 archlinux kernel: Spectre V2 : User space: Mitigation:
STIBP always-on protection
apr 09 16:19:36 archlinux kernel: Speculative Return Stack Overflow:
Mitigation: IBPB on VMEXIT only
apr 09 16:19:36 archlinux kernel: VMSCAPE: Mitigation: IBPB on VMEXIT
apr 09 16:19:36 archlinux kernel: Spectre V1 : Mitigation:
usercopy/swapgs barriers and __user pointer sanitization
apr 09 16:19:36 archlinux kernel: Spectre V2 : mitigation: Enabling
conditional Indirect Branch Prediction Barrier
apr 09 16:19:36 archlinux kernel: x86/fpu: Supporting XSAVE feature
0x001: 'x87 floating point registers'
apr 09 16:19:36 archlinux kernel: x86/fpu: Supporting XSAVE feature
0x002: 'SSE registers'
apr 09 16:19:36 archlinux kernel: x86/fpu: Supporting XSAVE feature
0x004: 'AVX registers'
apr 09 16:19:36 archlinux kernel: x86/fpu: Supporting XSAVE feature
0x020: 'AVX-512 opmask'
apr 09 16:19:36 archlinux kernel: x86/fpu: Supporting XSAVE feature
0x040: 'AVX-512 Hi256'
apr 09 16:19:36 archlinux kernel: x86/fpu: Supporting XSAVE feature
0x080: 'AVX-512 ZMM_Hi256'
apr 09 16:19:36 archlinux kernel: x86/fpu: Supporting XSAVE feature
0x200: 'Protection Keys User registers'
apr 09 16:19:36 archlinux kernel: x86/fpu: Supporting XSAVE feature
0x800: 'Control-flow User registers'
apr 09 16:19:36 archlinux kernel: x86/fpu: Supporting XSAVE feature
0x1000: 'Control-flow Kernel registers (KVM only)'
apr 09 16:19:36 archlinux kernel: x86/fpu: xstate_offset[2]:  576,
xstate_sizes[2]:  256
apr 09 16:19:36 archlinux kernel: x86/fpu: xstate_offset[5]:  832,
xstate_sizes[5]:   64
apr 09 16:19:36 archlinux kernel: x86/fpu: xstate_offset[6]:  896,
xstate_sizes[6]:  512
apr 09 16:19:36 archlinux kernel: x86/fpu: xstate_offset[7]: 1408,
xstate_sizes[7]: 1024
apr 09 16:19:36 archlinux kernel: x86/fpu: xstate_offset[9]: 2432,
xstate_sizes[9]:    8
apr 09 16:19:36 archlinux kernel: x86/fpu: xstate_offset[11]: 2440,
xstate_sizes[11]:   16
apr 09 16:19:36 archlinux kernel: x86/fpu: xstate_offset[12]: 2456,
xstate_sizes[12]:   24
apr 09 16:19:36 archlinux kernel: x86/fpu: Enabled xstate features
0x1ae7, context size is 2480 bytes, using 'compacted' format.
apr 09 16:19:36 archlinux kernel: Freeing SMP alternatives memory: 56K
apr 09 16:19:36 archlinux kernel: pid_max: default: 32768 minimum: 301
apr 09 16:19:36 archlinux kernel: landlock: Up and running.
apr 09 16:19:36 archlinux kernel: Yama: becoming mindful.
apr 09 16:19:36 archlinux kernel: LSM support for eBPF active
apr 09 16:19:36 archlinux kernel: Mount-cache hash table entries:
65536 (order: 7, 524288 bytes, linear)
apr 09 16:19:36 archlinux kernel: Mountpoint-cache hash table entries:
65536 (order: 7, 524288 bytes, linear)
apr 09 16:19:36 archlinux kernel: smpboot: CPU0: AMD Ryzen AI 7 350 w/
Radeon 860M (family: 0x1a, model: 0x60, stepping: 0x0)
apr 09 16:19:36 archlinux kernel: Performance Events: Fam17h+ 16-deep
LBR, core perfctr, AMD PMU driver.
apr 09 16:19:36 archlinux kernel: ... version:                   2
apr 09 16:19:36 archlinux kernel: ... bit width:                 48
apr 09 16:19:36 archlinux kernel: ... generic counters:          6
apr 09 16:19:36 archlinux kernel: ... generic bitmap:
000000000000003f
apr 09 16:19:36 archlinux kernel: ... fixed-purpose counters:    0
apr 09 16:19:36 archlinux kernel: ... fixed-purpose bitmap:
0000000000000000
apr 09 16:19:36 archlinux kernel: ... value mask:
0000ffffffffffff
apr 09 16:19:36 archlinux kernel: ... max period:
00007fffffffffff
apr 09 16:19:36 archlinux kernel: ... global_ctrl mask:
000000000000003f
apr 09 16:19:36 archlinux kernel: signal: max sigframe size: 3376
apr 09 16:19:36 archlinux kernel: rcu: Hierarchical SRCU implementation.
apr 09 16:19:36 archlinux kernel: rcu:         Max phase no-delay
instances is 400.
apr 09 16:19:36 archlinux kernel: Timer migration: 2 hierarchy levels;
8 children per group; 2 crossnode level
apr 09 16:19:36 archlinux kernel: MCE: In-kernel MCE decoding enabled.
apr 09 16:19:36 archlinux kernel: smp: Bringing up secondary CPUs ...
apr 09 16:19:36 archlinux kernel: smpboot: x86: Booting SMP configuration:
apr 09 16:19:36 archlinux kernel: .... node  #0, CPUs:        #1  #2
#3  #4  #5  #6  #7  #8  #9 #10 #11 #12 #13 #14 #15
apr 09 16:19:36 archlinux kernel: Spectre V2 : Update user space SMT
mitigation: STIBP always-on
apr 09 16:19:36 archlinux kernel: smp: Brought up 1 node, 16 CPUs
apr 09 16:19:36 archlinux kernel: smpboot: Total of 16 processors
activated (63883.39 BogoMIPS)
apr 09 16:19:36 archlinux kernel: Memory: 30350944K/31238508K
available (20570K kernel code, 2951K rwdata, 16744K rodata, 4776K
init, 4596K bss, 869516K reserved, 0K cma-reserved)
apr 09 16:19:36 archlinux kernel: devtmpfs: initialized
apr 09 16:19:36 archlinux kernel: x86/mm: Memory block size: 128MB
apr 09 16:19:36 archlinux kernel: ACPI: PM: Registering ACPI NVS
region [mem 0x09f00000-0x09f3bfff] (245760 bytes)
apr 09 16:19:36 archlinux kernel: ACPI: PM: Registering ACPI NVS
region [mem 0x7977f000-0x79f7efff] (8388608 bytes)
apr 09 16:19:36 archlinux kernel: clocksource: jiffies: mask:
0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns
apr 09 16:19:36 archlinux kernel: posixtimers hash table entries: 8192
(order: 5, 131072 bytes, linear)
apr 09 16:19:36 archlinux kernel: futex hash table entries: 4096
(262144 bytes on 1 NUMA nodes, total 256 KiB, linear).
apr 09 16:19:36 archlinux kernel: PM: RTC time: 14:19:34, date: 2026-04-09
apr 09 16:19:36 archlinux kernel: NET: Registered PF_NETLINK/PF_ROUTE
protocol family
apr 09 16:19:36 archlinux kernel: DMA: preallocated 4096 KiB
GFP_KERNEL pool for atomic allocations
apr 09 16:19:36 archlinux kernel: DMA: preallocated 4096 KiB
GFP_KERNEL|GFP_DMA pool for atomic allocations
apr 09 16:19:36 archlinux kernel: DMA: preallocated 4096 KiB
GFP_KERNEL|GFP_DMA32 pool for atomic allocations
apr 09 16:19:36 archlinux kernel: audit: initializing netlink subsys (disabled)
apr 09 16:19:36 archlinux kernel: audit: type=2000
audit(1775744373.159:1): state=initialized audit_enabled=0 res=1
apr 09 16:19:36 archlinux kernel: thermal_sys: Registered thermal
governor 'fair_share'
apr 09 16:19:36 archlinux kernel: thermal_sys: Registered thermal
governor 'bang_bang'
apr 09 16:19:36 archlinux kernel: thermal_sys: Registered thermal
governor 'step_wise'
apr 09 16:19:36 archlinux kernel: thermal_sys: Registered thermal
governor 'user_space'
apr 09 16:19:36 archlinux kernel: thermal_sys: Registered thermal
governor 'power_allocator'
apr 09 16:19:36 archlinux kernel: cpuidle: using governor ladder
apr 09 16:19:36 archlinux kernel: cpuidle: using governor menu
apr 09 16:19:36 archlinux kernel: Detected 1 PCC Subspaces
apr 09 16:19:36 archlinux kernel: Registering PCC driver as Mailbox controller
apr 09 16:19:36 archlinux kernel: Simple Boot Flag at 0x44 set to 0x1
apr 09 16:19:36 archlinux kernel: efi: Freeing EFI boot services memory: 129648K
apr 09 16:19:36 archlinux kernel: acpiphp: ACPI Hot Plug PCI
Controller Driver version: 0.5
apr 09 16:19:36 archlinux kernel: PCI: ECAM [mem
0xe0000000-0xefffffff] (base 0xe0000000) for domain 0000 [bus 00-ff]
apr 09 16:19:36 archlinux kernel: PCI: Using configuration type 1 for
base access
apr 09 16:19:36 archlinux kernel: kprobes: kprobe jump-optimization is
enabled. All kprobes are optimized if possible.
apr 09 16:19:36 archlinux kernel: HugeTLB: registered 1.00 GiB page
size, pre-allocated 0 pages
apr 09 16:19:36 archlinux kernel: HugeTLB: 16380 KiB vmemmap can be
freed for a 1.00 GiB page
apr 09 16:19:36 archlinux kernel: HugeTLB: registered 2.00 MiB page
size, pre-allocated 0 pages
apr 09 16:19:36 archlinux kernel: HugeTLB: 28 KiB vmemmap can be freed
for a 2.00 MiB page
apr 09 16:19:36 archlinux kernel: raid6: skipped pq benchmark and
selected avx512x4
apr 09 16:19:36 archlinux kernel: raid6: using avx512x2 recovery algorithm
apr 09 16:19:36 archlinux kernel: ACPI: Added _OSI(Module Device)
apr 09 16:19:36 archlinux kernel: ACPI: Added _OSI(Processor Device)
apr 09 16:19:36 archlinux kernel: ACPI: Added _OSI(Processor Aggregator Device)
apr 09 16:19:36 archlinux kernel: ACPI BIOS Error (bug): Failure
creating named object [\_SB.PCI0.GPP5.WLAN._DSM], AE_ALREADY_EXISTS
(20250807/dswload2-326)
apr 09 16:19:36 archlinux kernel: ACPI Error: AE_ALREADY_EXISTS,
During name lookup/catalog (20250807/psobject-220)
apr 09 16:19:36 archlinux kernel: ACPI: Skipping parse of AML opcode:
Method (0x0014)
apr 09 16:19:36 archlinux kernel: ACPI: 36 ACPI AML tables
successfully acquired and loaded
apr 09 16:19:36 archlinux kernel: ACPI: USB4 _OSC: OS supports USB3+
DisplayPort+ PCIe+ XDomain+
apr 09 16:19:36 archlinux kernel: ACPI: USB4 _OSC: OS controls USB3+
DisplayPort+ PCIe+ XDomain+
apr 09 16:19:36 archlinux kernel: ACPI: EC: EC started
apr 09 16:19:36 archlinux kernel: ACPI: EC: interrupt blocked
apr 09 16:19:36 archlinux kernel: ACPI: EC: EC_CMD/EC_SC=0x66, EC_DATA=0x62
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.LPC0.EC0_: Boot
DSDT EC used to handle transactions
apr 09 16:19:36 archlinux kernel: ACPI: Interpreter enabled
apr 09 16:19:36 archlinux kernel: ACPI: PM: (supports S0 S4 S5)
apr 09 16:19:36 archlinux kernel: ACPI: Using IOAPIC for interrupt routing
apr 09 16:19:36 archlinux kernel: PCI: Using host bridge windows from
ACPI; if necessary, use "pci=nocrs" and report a bug
apr 09 16:19:36 archlinux kernel: PCI: Ignoring E820 reservations for
host bridge windows
apr 09 16:19:36 archlinux kernel: ACPI: Enabled 3 GPEs in block 00 to 1F
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.GPP0.PWRS: New power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.GPP0.SWUS.PWRS: New
power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.GPP1.PWRS: New power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.GPP1.SWUS.PWRS: New
power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.GPP3.P0NV: New power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.GPP5.PWSR: New power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.GP10.P0NV: New power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.GPPA.PWRS: New power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.GPPA.VGA_.PWRS: New
power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.GPPA.ACP_.PWRS: New
power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.GPPA.AZAL.PWRS: New
power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.GPPA.HDAU.PWRS: New
power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.GPPA.XHC1.PWRS: New
power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.GPPC.XHC0.PWRS: New
power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.GPPC.XHC3.PWRS: New
power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.GPPC.XHC4.PWRS: New
power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.GPPC.NHI0.PWRS: New
power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.GPPC.NHI1.PWRS: New
power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PRWL: New power resource
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PRWB: New power resource
apr 09 16:19:36 archlinux kernel: ACPI: PCI Root Bridge [PCI0] (domain
0000 [bus 00-ff])
apr 09 16:19:36 archlinux kernel: acpi PNP0A08:00: _OSC: OS supports
[ExtendedConfig ASPM ClockPM Segments MSI EDR HPX-Type3]
apr 09 16:19:36 archlinux kernel: acpi PNP0A08:00: _OSC: platform does
not support [SHPCHotplug AER]
apr 09 16:19:36 archlinux kernel: acpi PNP0A08:00: _OSC: OS now
controls [PCIeHotplug PME PCIeCapability LTR DPC]
apr 09 16:19:36 archlinux kernel: PCI host bridge to bus 0000:00
apr 09 16:19:36 archlinux kernel: pci_bus 0000:00: root bus resource
[io  0x0000-0x0cf7 window]
apr 09 16:19:36 archlinux kernel: pci_bus 0000:00: root bus resource
[io  0x0d00-0xfeff window]
apr 09 16:19:36 archlinux kernel: pci_bus 0000:00: root bus resource
[mem 0x000a0000-0x000bffff window]
apr 09 16:19:36 archlinux kernel: pci_bus 0000:00: root bus resource
[mem 0x000c0000-0x000cffff window]
apr 09 16:19:36 archlinux kernel: pci_bus 0000:00: root bus resource
[mem 0x000d0000-0x000effff window]
apr 09 16:19:36 archlinux kernel: pci_bus 0000:00: root bus resource
[mem 0x80000000-0xdfffffff window]
apr 09 16:19:36 archlinux kernel: pci_bus 0000:00: root bus resource
[mem 0xf0000000-0xfcffffff window]
apr 09 16:19:36 archlinux kernel: pci_bus 0000:00: root bus resource
[mem 0xfec00000-0xfec01fff window]
apr 09 16:19:36 archlinux kernel: pci_bus 0000:00: root bus resource
[mem 0xfed45000-0xfed811ff window]
apr 09 16:19:36 archlinux kernel: pci_bus 0000:00: root bus resource
[mem 0xfed81900-0xfed81fff window]
apr 09 16:19:36 archlinux kernel: pci_bus 0000:00: root bus resource
[mem 0xfedc0000-0xfedc0fff window]
apr 09 16:19:36 archlinux kernel: pci_bus 0000:00: root bus resource
[mem 0xfedc6000-0xfedc6fff window]
apr 09 16:19:36 archlinux kernel: pci_bus 0000:00: root bus resource
[mem 0xfee01000-0xffffffff window]
apr 09 16:19:36 archlinux kernel: pci_bus 0000:00: root bus resource
[mem 0x8a0200000-0x833fffffff window]
apr 09 16:19:36 archlinux kernel: pci_bus 0000:00: root bus resource [bus 00-ff]
apr 09 16:19:36 archlinux kernel: pci 0000:00:00.0: [1022:1122] type
00 class 0x060000 conventional PCI endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:00:00.2: [1022:1123] type
00 class 0x080600 conventional PCI endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.0: [1022:1124] type
00 class 0x060000 conventional PCI endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.1: [1022:1125] type
01 class 0x060400 PCIe Root Port
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.1: PCI bridge to [bus 01-5f]
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.1:   bridge window
[io  0x6000-0x9fff]
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.1:   bridge window
[mem 0xac000000-0xc3ffffff]
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.1:   bridge window
[mem 0x3000000000-0x4fffffffff 64bit pref]
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.1: PME# supported
from D0 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.2: [1022:1125] type
01 class 0x060400 PCIe Root Port
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.2: PCI bridge to [bus 60-be]
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.2:   bridge window
[io  0x2000-0x5fff]
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.2:   bridge window
[mem 0x94000000-0xabffffff]
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.2:   bridge window
[mem 0x1000000000-0x2fffffffff 64bit pref]
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.2: PME# supported
from D0 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.0: [1022:1124] type
00 class 0x060000 conventional PCI endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.1: [1022:1126] type
01 class 0x060400 PCIe Root Port
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.1: PCI bridge to [bus bf]
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.1:   bridge window
[mem 0x90c00000-0x90cfffff]
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.1: PME# supported
from D0 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.2: [1022:1126] type
01 class 0x060400 PCIe Root Port
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.2: PCI bridge to [bus c0]
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.2:   bridge window
[mem 0x90b00000-0x90bfffff]
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.2: PME# supported
from D0 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.3: [1022:1126] type
01 class 0x060400 PCIe Root Port
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.3: PCI bridge to [bus c1]
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.3:   bridge window
[mem 0x90a00000-0x90afffff]
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.3: PME# supported
from D0 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:00:03.0: [1022:1124] type
00 class 0x060000 conventional PCI endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:00:03.2: [1022:1126] type
01 class 0x060400 PCIe Root Port
apr 09 16:19:36 archlinux kernel: pci 0000:00:03.2: PCI bridge to [bus c2]
apr 09 16:19:36 archlinux kernel: pci 0000:00:03.2:   bridge window
[mem 0x90900000-0x909fffff]
apr 09 16:19:36 archlinux kernel: pci 0000:00:03.2: PME# supported
from D0 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.0: [1022:1124] type
00 class 0x060000 conventional PCI endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.1: [1022:1110] type
01 class 0x060400 PCIe Root Port
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.1: PCI bridge to [bus c3]
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.1:   bridge window
[io  0x1000-0x1fff]
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.1:   bridge window
[mem 0x80000000-0x902fffff]
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.1:   bridge window
[mem 0x5000000000-0x50807fffff 64bit pref]
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.1: enabling Extended Tags
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.1: PME# supported
from D0 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.2: [1022:1111] type
01 class 0x060400 PCIe Root Port
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.2: PCI bridge to [bus c4]
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.2:   bridge window
[mem 0x90700000-0x908fffff]
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.2:   bridge window
[mem 0x5080800000-0x50808fffff 64bit pref]
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.2: enabling Extended Tags
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.2: PME# supported
from D0 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.3: [1022:1112] type
01 class 0x060400 PCIe Root Port
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.3: PCI bridge to [bus c5]
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.3:   bridge window
[mem 0x90300000-0x906fffff]
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.3: enabling Extended Tags
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.3: PME# supported
from D0 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:00:14.0: [1022:790b] type
00 class 0x0c0500 conventional PCI endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:00:14.3: [1022:790e] type
00 class 0x060100 conventional PCI endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:00:18.0: [1022:1248] type
00 class 0x060000 conventional PCI endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:00:18.1: [1022:1249] type
00 class 0x060000 conventional PCI endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:00:18.2: [1022:124a] type
00 class 0x060000 conventional PCI endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:00:18.3: [1022:124b] type
00 class 0x060000 conventional PCI endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:00:18.4: [1022:124c] type
00 class 0x060000 conventional PCI endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:00:18.5: [1022:124d] type
00 class 0x060000 conventional PCI endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:00:18.6: [1022:124e] type
00 class 0x060000 conventional PCI endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:00:18.7: [1022:124f] type
00 class 0x060000 conventional PCI endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.1: PCI bridge to [bus 01-5f]
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.2: PCI bridge to [bus 60-be]
apr 09 16:19:36 archlinux kernel: pci 0000:bf:00.0: [15b7:5044] type
00 class 0x010802 PCIe Endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:bf:00.0: BAR 0 [mem
0x90c00000-0x90c03fff 64bit]
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.1: PCI bridge to [bus bf]
apr 09 16:19:36 archlinux kernel: pci 0000:c0:00.0: [1217:8621] type
00 class 0x080501 PCIe Endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:c0:00.0: BAR 0 [mem
0x90b01000-0x90b01fff]
apr 09 16:19:36 archlinux kernel: pci 0000:c0:00.0: BAR 1 [mem
0x90b00000-0x90b007ff]
apr 09 16:19:36 archlinux kernel: pci 0000:c0:00.0: PME# supported
from D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.2: PCI bridge to [bus c0]
apr 09 16:19:36 archlinux kernel: pci 0000:c1:00.0: [8086:2725] type
00 class 0x028000 PCIe Endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:c1:00.0: BAR 0 [mem
0x90a00000-0x90a03fff 64bit]
apr 09 16:19:36 archlinux kernel: pci 0000:c1:00.0: PME# supported
from D0 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.3: PCI bridge to [bus c1]
apr 09 16:19:36 archlinux kernel: pci 0000:c2:00.0: [1d97:1602] type
00 class 0x010802 PCIe Endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:c2:00.0: BAR 0 [mem
0x90900000-0x90903fff 64bit]
apr 09 16:19:36 archlinux kernel: pci 0000:00:03.2: PCI bridge to [bus c2]
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.0: [1002:1114] type
00 class 0x038000 PCIe Legacy Endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.0: BAR 0 [mem
0x5000000000-0x507fffffff 64bit pref]
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.0: BAR 2 [mem
0x80000000-0x8fffffff 64bit pref]
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.0: BAR 4 [io  0x1000-0x10ff]
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.0: BAR 5 [mem
0x90200000-0x9027ffff]
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.0: enabling Extended Tags
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.0: PME# supported
from D1 D2 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.1: [1002:1640] type
00 class 0x040300 PCIe Legacy Endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.1: BAR 0 [mem
0x902c8000-0x902cbfff]
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.1: enabling Extended Tags
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.1: PME# supported
from D1 D2 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.2: [1022:17e0] type
00 class 0x108000 PCIe Endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.2: BAR 2 [mem
0x90100000-0x901fffff]
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.2: BAR 5 [mem
0x902cc000-0x902cdfff]
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.2: enabling Extended Tags
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.4: [1022:1128] type
00 class 0x0c0330 PCIe Endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.4: BAR 0 [mem
0x90000000-0x900fffff 64bit]
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.4: enabling Extended Tags
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.4: PME# supported
from D0 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.5: [1022:15e2] type
00 class 0x048000 PCIe Endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.5: BAR 0 [mem
0x90280000-0x902bffff]
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.5: BAR 2 [mem
0x5080000000-0x50807fffff 64bit pref]
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.5: enabling Extended Tags
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.5: PME# supported
from D0 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.6: [1022:15e3] type
00 class 0x040300 PCIe Endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.6: BAR 0 [mem
0x902c0000-0x902c7fff]
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.6: enabling Extended Tags
apr 09 16:19:36 archlinux kernel: pci 0000:c3:00.6: PME# supported
from D0 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.1: PCI bridge to [bus c3]
apr 09 16:19:36 archlinux kernel: pci 0000:c4:00.0: [1022:1116] type
00 class 0x130000 PCIe Endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:c4:00.0: enabling Extended Tags
apr 09 16:19:36 archlinux kernel: pci 0000:c4:00.1: [1022:17f0] type
00 class 0x118000 PCIe Endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:c4:00.1: BAR 0 [mem
0x90700000-0x907fffff]
apr 09 16:19:36 archlinux kernel: pci 0000:c4:00.1: BAR 1 [mem
0x90800000-0x90801fff]
apr 09 16:19:36 archlinux kernel: pci 0000:c4:00.1: BAR 2 [mem
0x5080800000-0x508087ffff 64bit pref]
apr 09 16:19:36 archlinux kernel: pci 0000:c4:00.1: BAR 4 [mem
0x90803000-0x90803fff]
apr 09 16:19:36 archlinux kernel: pci 0000:c4:00.1: BAR 5 [mem
0x90802000-0x90802fff]
apr 09 16:19:36 archlinux kernel: pci 0000:c4:00.1: enabling Extended Tags
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.2: PCI bridge to [bus c4]
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.0: [1022:1118] type
00 class 0x0c0330 PCIe Endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.0: BAR 0 [mem
0x90300000-0x903fffff 64bit]
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.0: enabling Extended Tags
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.0: PME# supported
from D0 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.3: [1022:111c] type
00 class 0x0c0330 PCIe Endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.3: BAR 0 [mem
0x90400000-0x904fffff 64bit]
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.3: enabling Extended Tags
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.3: PME# supported
from D0 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.4: [1022:111e] type
00 class 0x0c0330 PCIe Endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.4: BAR 0 [mem
0x90500000-0x905fffff 64bit]
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.4: enabling Extended Tags
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.4: PME# supported
from D0 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.5: [1022:1120] type
00 class 0x0c0340 PCIe Endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.5: BAR 0 [mem
0x90600000-0x9067ffff 64bit]
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.5: Max Payload Size
set to 128 (was 256, max 256)
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.5: enabling Extended Tags
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.5: PME# supported
from D0 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.6: [1022:1121] type
00 class 0x0c0340 PCIe Endpoint
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.6: BAR 0 [mem
0x90680000-0x906fffff 64bit]
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.6: Max Payload Size
set to 128 (was 256, max 256)
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.6: enabling Extended Tags
apr 09 16:19:36 archlinux kernel: pci 0000:c5:00.6: PME# supported
from D0 D3hot D3cold
apr 09 16:19:36 archlinux kernel: pci 0000:00:08.3: PCI bridge to [bus c5]
apr 09 16:19:36 archlinux kernel: Low-power S0 idle used by default
for system suspend
apr 09 16:19:36 archlinux kernel: ACPI: EC: interrupt unblocked
apr 09 16:19:36 archlinux kernel: ACPI: EC: event unblocked
apr 09 16:19:36 archlinux kernel: ACPI: EC: EC_CMD/EC_SC=0x66, EC_DATA=0x62
apr 09 16:19:36 archlinux kernel: ACPI: EC: GPE=0xa
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.LPC0.EC0_: Boot
DSDT EC initialization complete
apr 09 16:19:36 archlinux kernel: ACPI: \_SB_.PCI0.LPC0.EC0_: EC: Used
to handle transactions and events
apr 09 16:19:36 archlinux kernel: iommu: Default domain type:
Passthrough (set via kernel command line)
apr 09 16:19:36 archlinux kernel: SCSI subsystem initialized
apr 09 16:19:36 archlinux kernel: libata version 3.00 loaded.
apr 09 16:19:36 archlinux kernel: ACPI: bus type USB registered
apr 09 16:19:36 archlinux kernel: usbcore: registered new interface driver usbfs
apr 09 16:19:36 archlinux kernel: usbcore: registered new interface driver hub
apr 09 16:19:36 archlinux kernel: usbcore: registered new device driver usb
apr 09 16:19:36 archlinux kernel: EDAC MC: Ver: 3.0.0
apr 09 16:19:36 archlinux kernel: efivars: Registered efivars operations
apr 09 16:19:36 archlinux kernel: NetLabel: Initializing
apr 09 16:19:36 archlinux kernel: NetLabel:  domain hash size = 128
apr 09 16:19:36 archlinux kernel: NetLabel:  protocols = UNLABELED
CIPSOv4 CALIPSO
apr 09 16:19:36 archlinux kernel: NetLabel:  unlabeled traffic allowed
by default
apr 09 16:19:36 archlinux kernel: mctp: management component transport
protocol core
apr 09 16:19:36 archlinux kernel: NET: Registered PF_MCTP protocol family
apr 09 16:19:36 archlinux kernel: PCI: Using ACPI for IRQ routing
apr 09 16:19:36 archlinux kernel: PCI: pci_cache_line_size set to 64 bytes
apr 09 16:19:36 archlinux kernel: e820: reserve RAM buffer [mem
0x0009f000-0x0009ffff]
apr 09 16:19:36 archlinux kernel: e820: reserve RAM buffer [mem
0x09b00000-0x0bffffff]
apr 09 16:19:36 archlinux kernel: e820: reserve RAM buffer [mem
0x09f00000-0x0bffffff]
apr 09 16:19:36 archlinux kernel: e820: reserve RAM buffer [mem
0x6894e000-0x6bffffff]
apr 09 16:19:36 archlinux kernel: e820: reserve RAM buffer [mem
0x6ab67000-0x6bffffff]
apr 09 16:19:36 archlinux kernel: e820: reserve RAM buffer [mem
0x6ab6f000-0x6bffffff]
apr 09 16:19:36 archlinux kernel: e820: reserve RAM buffer [mem
0x70e19000-0x73ffffff]
apr 09 16:19:36 archlinux kernel: e820: reserve RAM buffer [mem
0x72396000-0x73ffffff]
apr 09 16:19:36 archlinux kernel: e820: reserve RAM buffer [mem
0x76d7f000-0x77ffffff]
apr 09 16:19:36 archlinux kernel: e820: reserve RAM buffer [mem
0x7a000000-0x7bffffff]
apr 09 16:19:36 archlinux kernel: e820: reserve RAM buffer [mem
0x7fe280000-0x7ffffffff]
apr 09 16:19:36 archlinux kernel: vgaarb: loaded
apr 09 16:19:36 archlinux kernel: hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0
apr 09 16:19:36 archlinux kernel: hpet0: 3 comparators, 32-bit
14.318180 MHz counter
apr 09 16:19:36 archlinux kernel: clocksource: Switched to clocksource tsc-early
apr 09 16:19:36 archlinux kernel: VFS: Disk quotas dquot_6.6.0
apr 09 16:19:36 archlinux kernel: VFS: Dquot-cache hash table entries:
512 (order 0, 4096 bytes)
apr 09 16:19:36 archlinux kernel: pnp: PnP ACPI init
apr 09 16:19:36 archlinux kernel: system 00:00: [mem
0xe0000000-0xefffffff] has been reserved
apr 09 16:19:36 archlinux kernel: system 00:02: [io  0x0400-0x04cf]
has been reserved
apr 09 16:19:36 archlinux kernel: system 00:02: [io  0x04d0-0x04d1]
has been reserved
apr 09 16:19:36 archlinux kernel: system 00:02: [io  0x04d6] has been reserved
apr 09 16:19:36 archlinux kernel: system 00:02: [io  0x0c00-0x0c01]
has been reserved
apr 09 16:19:36 archlinux kernel: system 00:02: [io  0x0c14] has been reserved
apr 09 16:19:36 archlinux kernel: system 00:02: [io  0x0c50-0x0c52]
has been reserved
apr 09 16:19:36 archlinux kernel: system 00:02: [io  0x0c6c] has been reserved
apr 09 16:19:36 archlinux kernel: system 00:02: [io  0x0c6f] has been reserved
apr 09 16:19:36 archlinux kernel: system 00:02: [io  0x0cd0-0x0cdb]
has been reserved
apr 09 16:19:36 archlinux kernel: system 00:02: [io  0x0700-0x0707]
has been reserved
apr 09 16:19:36 archlinux kernel: system 00:02: [io  0x0d00-0x0d07]
has been reserved
apr 09 16:19:36 archlinux kernel: system 00:03: [mem
0xff000000-0xffffffff] has been reserved
apr 09 16:19:36 archlinux kernel: pnp: PnP ACPI: found 5 devices
apr 09 16:19:36 archlinux kernel: clocksource: acpi_pm: mask: 0xffffff
max_cycles: 0xffffff, max_idle_ns: 2085701024 ns
apr 09 16:19:36 archlinux kernel: NET: Registered PF_INET protocol family
apr 09 16:19:36 archlinux kernel: IP idents hash table entries: 262144
(order: 9, 2097152 bytes, linear)
apr 09 16:19:36 archlinux kernel: tcp_listen_portaddr_hash hash table
entries: 16384 (order: 6, 262144 bytes, linear)
apr 09 16:19:36 archlinux kernel: Table-perturb hash table entries:
65536 (order: 6, 262144 bytes, linear)
apr 09 16:19:36 archlinux kernel: TCP established hash table entries:
262144 (order: 9, 2097152 bytes, linear)
apr 09 16:19:36 archlinux kernel: TCP bind hash table entries: 65536
(order: 9, 2097152 bytes, linear)
apr 09 16:19:36 archlinux kernel: TCP: Hash tables configured
(established 262144 bind 65536)
apr 09 16:19:36 archlinux kernel: MPTCP token hash table entries:
32768 (order: 8, 786432 bytes, linear)
apr 09 16:19:36 archlinux kernel: UDP hash table entries: 16384
(order: 8, 1048576 bytes, linear)
apr 09 16:19:36 archlinux kernel: UDP-Lite hash table entries: 16384
(order: 8, 1048576 bytes, linear)
apr 09 16:19:36 archlinux kernel: NET: Registered PF_UNIX/PF_LOCAL
protocol family
apr 09 16:19:36 archlinux kernel: NET: Registered PF_XDP protocol family
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.1: PCI bridge to [bus 01-5f]
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.1:   bridge window
[io  0x6000-0x9fff]
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.1:   bridge window
[mem 0xac000000-0xc3ffffff]
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.1:   bridge window
[mem 0x3000000000-0x4fffffffff 64bit pref]
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.2: PCI bridge to [bus 60-be]
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.2:   bridge window
[io  0x2000-0x5fff]
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.2:   bridge window
[mem 0x94000000-0xabffffff]
apr 09 16:19:36 archlinux kernel: pci 0000:00:01.2:   bridge window
[mem 0x1000000000-0x2fffffffff 64bit pref]
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.1: PCI bridge to [bus bf]
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.1:   bridge window
[mem 0x90c00000-0x90cfffff]
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.2: PCI bridge to [bus c0]
apr 09 16:19:36 archlinux kernel: pci 0000:00:02.2:   bridge window
[mem 0x90b00000-0x90bfffff]
apr 09 16:19:37 archlinux kernel: pci 0000:00:02.3: PCI bridge to [bus c1]
apr 09 16:19:37 archlinux kernel: pci 0000:00:02.3:   bridge window
[mem 0x90a00000-0x90afffff]
apr 09 16:19:37 archlinux kernel: pci 0000:00:03.2: PCI bridge to [bus c2]
apr 09 16:19:37 archlinux kernel: pci 0000:00:03.2:   bridge window
[mem 0x90900000-0x909fffff]
apr 09 16:19:37 archlinux kernel: pci 0000:00:08.1: PCI bridge to [bus c3]
apr 09 16:19:37 archlinux kernel: pci 0000:00:08.1:   bridge window
[io  0x1000-0x1fff]
apr 09 16:19:37 archlinux kernel: pci 0000:00:08.1:   bridge window
[mem 0x80000000-0x902fffff]
apr 09 16:19:37 archlinux kernel: pci 0000:00:08.1:   bridge window
[mem 0x5000000000-0x50807fffff 64bit pref]
apr 09 16:19:37 archlinux kernel: pci 0000:00:08.2: PCI bridge to [bus c4]
apr 09 16:19:37 archlinux kernel: pci 0000:00:08.2:   bridge window
[mem 0x90700000-0x908fffff]
apr 09 16:19:37 archlinux kernel: pci 0000:00:08.2:   bridge window
[mem 0x5080800000-0x50808fffff 64bit pref]
apr 09 16:19:37 archlinux kernel: pci 0000:00:08.3: PCI bridge to [bus c5]
apr 09 16:19:37 archlinux kernel: pci 0000:00:08.3:   bridge window
[mem 0x90300000-0x906fffff]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:00: resource 4 [io
0x0000-0x0cf7 window]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:00: resource 5 [io
0x0d00-0xfeff window]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:00: resource 6 [mem
0x000a0000-0x000bffff window]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:00: resource 7 [mem
0x000c0000-0x000cffff window]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:00: resource 8 [mem
0x000d0000-0x000effff window]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:00: resource 9 [mem
0x80000000-0xdfffffff window]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:00: resource 10 [mem
0xf0000000-0xfcffffff window]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:00: resource 11 [mem
0xfec00000-0xfec01fff window]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:00: resource 12 [mem
0xfed45000-0xfed811ff window]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:00: resource 13 [mem
0xfed81900-0xfed81fff window]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:00: resource 14 [mem
0xfedc0000-0xfedc0fff window]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:00: resource 15 [mem
0xfedc6000-0xfedc6fff window]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:00: resource 16 [mem
0xfee01000-0xffffffff window]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:00: resource 17 [mem
0x8a0200000-0x833fffffff window]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:01: resource 0 [io
0x6000-0x9fff]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:01: resource 1 [mem
0xac000000-0xc3ffffff]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:01: resource 2 [mem
0x3000000000-0x4fffffffff 64bit pref]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:60: resource 0 [io
0x2000-0x5fff]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:60: resource 1 [mem
0x94000000-0xabffffff]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:60: resource 2 [mem
0x1000000000-0x2fffffffff 64bit pref]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:bf: resource 1 [mem
0x90c00000-0x90cfffff]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:c0: resource 1 [mem
0x90b00000-0x90bfffff]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:c1: resource 1 [mem
0x90a00000-0x90afffff]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:c2: resource 1 [mem
0x90900000-0x909fffff]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:c3: resource 0 [io
0x1000-0x1fff]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:c3: resource 1 [mem
0x80000000-0x902fffff]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:c3: resource 2 [mem
0x5000000000-0x50807fffff 64bit pref]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:c4: resource 1 [mem
0x90700000-0x908fffff]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:c4: resource 2 [mem
0x5080800000-0x50808fffff 64bit pref]
apr 09 16:19:37 archlinux kernel: pci_bus 0000:c5: resource 1 [mem
0x90300000-0x906fffff]
apr 09 16:19:37 archlinux kernel: pci 0000:c3:00.1: D0 power state
depends on 0000:c3:00.0
apr 09 16:19:37 archlinux kernel: PCI: CLS 64 bytes, default 64
apr 09 16:19:37 archlinux kernel: pci 0000:00:00.2: AMD-Vi: IOMMU
performance counters supported
apr 09 16:19:37 archlinux kernel: Trying to unpack rootfs image as initramfs...
apr 09 16:19:37 archlinux kernel: platform MSFT0201:00: Adding to iommu group 0
apr 09 16:19:37 archlinux kernel: pci 0000:00:01.0: Adding to iommu group 1
apr 09 16:19:37 archlinux kernel: pci 0000:00:01.1: Adding to iommu group 2
apr 09 16:19:37 archlinux kernel: pci 0000:00:01.2: Adding to iommu group 3
apr 09 16:19:37 archlinux kernel: pci 0000:00:02.0: Adding to iommu group 4
apr 09 16:19:37 archlinux kernel: pci 0000:00:02.1: Adding to iommu group 5
apr 09 16:19:37 archlinux kernel: pci 0000:00:02.2: Adding to iommu group 6
apr 09 16:19:37 archlinux kernel: pci 0000:00:02.3: Adding to iommu group 7
apr 09 16:19:37 archlinux kernel: pci 0000:00:03.0: Adding to iommu group 8
apr 09 16:19:37 archlinux kernel: pci 0000:00:03.2: Adding to iommu group 9
apr 09 16:19:37 archlinux kernel: pci 0000:00:08.0: Adding to iommu group 10
apr 09 16:19:37 archlinux kernel: pci 0000:00:08.1: Adding to iommu group 11
apr 09 16:19:37 archlinux kernel: pci 0000:00:08.2: Adding to iommu group 12
apr 09 16:19:37 archlinux kernel: pci 0000:00:08.3: Adding to iommu group 13
apr 09 16:19:37 archlinux kernel: pci 0000:00:14.0: Adding to iommu group 14
apr 09 16:19:37 archlinux kernel: pci 0000:00:14.3: Adding to iommu group 14
apr 09 16:19:37 archlinux kernel: pci 0000:00:18.0: Adding to iommu group 15
apr 09 16:19:37 archlinux kernel: pci 0000:00:18.1: Adding to iommu group 15
apr 09 16:19:37 archlinux kernel: pci 0000:00:18.2: Adding to iommu group 15
apr 09 16:19:37 archlinux kernel: pci 0000:00:18.3: Adding to iommu group 15
apr 09 16:19:37 archlinux kernel: pci 0000:00:18.4: Adding to iommu group 15
apr 09 16:19:37 archlinux kernel: pci 0000:00:18.5: Adding to iommu group 15
apr 09 16:19:37 archlinux kernel: pci 0000:00:18.6: Adding to iommu group 15
apr 09 16:19:37 archlinux kernel: pci 0000:00:18.7: Adding to iommu group 15
apr 09 16:19:37 archlinux kernel: pci 0000:bf:00.0: Adding to iommu group 16
apr 09 16:19:37 archlinux kernel: pci 0000:c0:00.0: Adding to iommu group 17
apr 09 16:19:37 archlinux kernel: pci 0000:c1:00.0: Adding to iommu group 18
apr 09 16:19:37 archlinux kernel: pci 0000:c2:00.0: Adding to iommu group 19
apr 09 16:19:37 archlinux kernel: pci 0000:c3:00.0: Adding to iommu group 20
apr 09 16:19:37 archlinux kernel: pci 0000:c3:00.1: Adding to iommu group 21
apr 09 16:19:37 archlinux kernel: pci 0000:c3:00.2: Adding to iommu group 22
apr 09 16:19:37 archlinux kernel: pci 0000:c3:00.4: Adding to iommu group 23
apr 09 16:19:37 archlinux kernel: pci 0000:c3:00.5: Adding to iommu group 24
apr 09 16:19:37 archlinux kernel: pci 0000:c3:00.6: Adding to iommu group 25
apr 09 16:19:37 archlinux kernel: pci 0000:c4:00.0: Adding to iommu group 26
apr 09 16:19:37 archlinux kernel: pci 0000:c4:00.1: Adding to iommu group 27
apr 09 16:19:37 archlinux kernel: pci 0000:c5:00.0: Adding to iommu group 28
apr 09 16:19:37 archlinux kernel: pci 0000:c5:00.3: Adding to iommu group 29
apr 09 16:19:37 archlinux kernel: pci 0000:c5:00.4: Adding to iommu group 30
apr 09 16:19:37 archlinux kernel: pci 0000:c5:00.5: Adding to iommu group 31
apr 09 16:19:37 archlinux kernel: pci 0000:c5:00.6: Adding to iommu group 32
apr 09 16:19:37 archlinux kernel: AMD-Vi: Extended features
(0x246577efa2254afa, 0x10): PPR NX GT [5] IA GA PC GA_vAPIC
apr 09 16:19:37 archlinux kernel: AMD-Vi: Interrupt remapping enabled
apr 09 16:19:37 archlinux kernel: AMD-Vi: Virtual APIC enabled
apr 09 16:19:37 archlinux kernel: PCI-DMA: Using software bounce
buffering for IO (SWIOTLB)
apr 09 16:19:37 archlinux kernel: software IO TLB: mapped [mem
0x000000006ce19000-0x0000000070e19000] (64MB)
apr 09 16:19:37 archlinux kernel: LVT offset 0 assigned for vector 0x400
apr 09 16:19:37 archlinux kernel: perf: AMD IBS detected (0x00081bff)
apr 09 16:19:37 archlinux kernel: perf/amd_iommu: Detected AMD IOMMU
#0 (2 banks, 4 counters/bank).
apr 09 16:19:37 archlinux kernel: Initialise system trusted keyrings
apr 09 16:19:37 archlinux kernel: Key type blacklist registered
apr 09 16:19:37 archlinux kernel: workingset: timestamp_bits=36
max_order=23 bucket_order=0
apr 09 16:19:37 archlinux kernel: fuse: init (API version 7.45)
apr 09 16:19:37 archlinux kernel: integrity: Platform Keyring initialized
apr 09 16:19:37 archlinux kernel: integrity: Machine keyring initialized
apr 09 16:19:37 archlinux kernel: xor: automatically using best
checksumming function   avx
apr 09 16:19:37 archlinux kernel: Key type asymmetric registered
apr 09 16:19:37 archlinux kernel: Asymmetric key parser 'x509' registered
apr 09 16:19:37 archlinux kernel: Block layer SCSI generic (bsg)
driver version 0.4 loaded (major 245)
apr 09 16:19:37 archlinux kernel: io scheduler mq-deadline registered
apr 09 16:19:37 archlinux kernel: io scheduler kyber registered
apr 09 16:19:37 archlinux kernel: io scheduler bfq registered
apr 09 16:19:37 archlinux kernel: ledtrig-cpu: registered to indicate
activity on CPUs
apr 09 16:19:37 archlinux kernel: pcieport 0000:00:01.1: PME:
Signaling with IRQ 30
apr 09 16:19:37 archlinux kernel: pcieport 0000:00:01.1: pciehp: Slot
#0 AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+
Interlock- NoCompl+ IbPresDis- LLActRep+
apr 09 16:19:37 archlinux kernel: pcieport 0000:00:01.2: PME:
Signaling with IRQ 31
apr 09 16:19:37 archlinux kernel: pcieport 0000:00:01.2: pciehp: Slot
#0 AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+
Interlock- NoCompl+ IbPresDis- LLActRep+
apr 09 16:19:37 archlinux kernel: pcieport 0000:00:02.1: PME:
Signaling with IRQ 32
apr 09 16:19:37 archlinux kernel: pcieport 0000:00:02.2: PME:
Signaling with IRQ 33
apr 09 16:19:37 archlinux kernel: pcieport 0000:00:02.3: PME:
Signaling with IRQ 34
apr 09 16:19:37 archlinux kernel: pcieport 0000:00:03.2: PME:
Signaling with IRQ 35
apr 09 16:19:37 archlinux kernel: pcieport 0000:00:08.1: PME:
Signaling with IRQ 36
apr 09 16:19:37 archlinux kernel: pcieport 0000:00:08.2: PME:
Signaling with IRQ 37
apr 09 16:19:37 archlinux kernel: pcieport 0000:00:08.3: PME:
Signaling with IRQ 38
apr 09 16:19:37 archlinux kernel: ACPI: AC: AC Adapter [ACAD] (on-line)
apr 09 16:19:37 archlinux kernel: input: Lid Switch as
/devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:40/PNP0C0D:00/input/input0
apr 09 16:19:37 archlinux kernel: ACPI: button: Lid Switch [LID0]
apr 09 16:19:37 archlinux kernel: input: Sleep Button as
/devices/LNXSYSTM:00/PNP0C0E:00/input/input1
apr 09 16:19:37 archlinux kernel: ACPI: button: Sleep Button [SLPB]
apr 09 16:19:37 archlinux kernel: Monitor-Mwait will be used to enter C-1 state
apr 09 16:19:37 archlinux kernel: Estimated ratio of average max
frequency by base frequency (times 1024): 1815
apr 09 16:19:37 archlinux kernel: thermal LNXTHERM:00: registered as
thermal_zone0
apr 09 16:19:37 archlinux kernel: ACPI: thermal: Thermal Zone [TZ01] (37 C)
apr 09 16:19:37 archlinux kernel: Non-volatile memory driver v1.3
apr 09 16:19:37 archlinux kernel: Linux agpgart interface v0.103
apr 09 16:19:37 archlinux kernel: ACPI: battery: Slot [BAT1] (battery present)
apr 09 16:19:37 archlinux kernel: Freeing initrd memory: 63660K
apr 09 16:19:37 archlinux kernel: tsc: Refined TSC clocksource
calibration: 1996.222 MHz
apr 09 16:19:37 archlinux kernel: clocksource: tsc: mask:
0xffffffffffffffff max_cycles: 0x398c7ae93a9, max_idle_ns:
881590667579 ns
apr 09 16:19:37 archlinux kernel: clocksource: Switched to clocksource tsc
apr 09 16:19:37 archlinux kernel: tpm_crb MSFT0101:00: Disabling hwrng
apr 09 16:19:37 archlinux kernel: ACPI: bus type drm_connector registered
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c3:00.4: xHCI Host Controller
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c3:00.4: new USB bus
registered, assigned bus number 1
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c3:00.4: hcc params
0x0118ffc5 hci version 0x120 quirks 0x0000000200000010
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c3:00.4: xHCI Host Controller
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c3:00.4: new USB bus
registered, assigned bus number 2
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c3:00.4: Host supports
USB 3.1 Enhanced SuperSpeed
apr 09 16:19:37 archlinux kernel: usb usb1: New USB device found,
idVendor=1d6b, idProduct=0002, bcdDevice= 6.19
apr 09 16:19:37 archlinux kernel: usb usb1: New USB device strings:
Mfr=3, Product=2, SerialNumber=1
apr 09 16:19:37 archlinux kernel: usb usb1: Product: xHCI Host Controller
apr 09 16:19:37 archlinux kernel: usb usb1: Manufacturer: Linux
6.19.11-arch1-1 xhci-hcd
apr 09 16:19:37 archlinux kernel: usb usb1: SerialNumber: 0000:c3:00.4
apr 09 16:19:37 archlinux kernel: hub 1-0:1.0: USB hub found
apr 09 16:19:37 archlinux kernel: hub 1-0:1.0: 1 port detected
apr 09 16:19:37 archlinux kernel: usb usb2: We don't know the
algorithms for LPM for this host, disabling LPM.
apr 09 16:19:37 archlinux kernel: usb usb2: New USB device found,
idVendor=1d6b, idProduct=0003, bcdDevice= 6.19
apr 09 16:19:37 archlinux kernel: usb usb2: New USB device strings:
Mfr=3, Product=2, SerialNumber=1
apr 09 16:19:37 archlinux kernel: usb usb2: Product: xHCI Host Controller
apr 09 16:19:37 archlinux kernel: usb usb2: Manufacturer: Linux
6.19.11-arch1-1 xhci-hcd
apr 09 16:19:37 archlinux kernel: usb usb2: SerialNumber: 0000:c3:00.4
apr 09 16:19:37 archlinux kernel: hub 2-0:1.0: USB hub found
apr 09 16:19:37 archlinux kernel: hub 2-0:1.0: 1 port detected
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c5:00.0: xHCI Host Controller
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c5:00.0: new USB bus
registered, assigned bus number 3
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c5:00.0: hcc params
0x0128ffc5 hci version 0x120 quirks 0x0000000200000010
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c5:00.0: xHCI Host Controller
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c5:00.0: new USB bus
registered, assigned bus number 4
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c5:00.0: Host supports
USB 3.1 Enhanced SuperSpeed
apr 09 16:19:37 archlinux kernel: usb usb3: New USB device found,
idVendor=1d6b, idProduct=0002, bcdDevice= 6.19
apr 09 16:19:37 archlinux kernel: usb usb3: New USB device strings:
Mfr=3, Product=2, SerialNumber=1
apr 09 16:19:37 archlinux kernel: usb usb3: Product: xHCI Host Controller
apr 09 16:19:37 archlinux kernel: usb usb3: Manufacturer: Linux
6.19.11-arch1-1 xhci-hcd
apr 09 16:19:37 archlinux kernel: usb usb3: SerialNumber: 0000:c5:00.0
apr 09 16:19:37 archlinux kernel: hub 3-0:1.0: USB hub found
apr 09 16:19:37 archlinux kernel: hub 3-0:1.0: 5 ports detected
apr 09 16:19:37 archlinux kernel: usb usb4: We don't know the
algorithms for LPM for this host, disabling LPM.
apr 09 16:19:37 archlinux kernel: usb usb4: New USB device found,
idVendor=1d6b, idProduct=0003, bcdDevice= 6.19
apr 09 16:19:37 archlinux kernel: usb usb4: New USB device strings:
Mfr=3, Product=2, SerialNumber=1
apr 09 16:19:37 archlinux kernel: usb usb4: Product: xHCI Host Controller
apr 09 16:19:37 archlinux kernel: usb usb4: Manufacturer: Linux
6.19.11-arch1-1 xhci-hcd
apr 09 16:19:37 archlinux kernel: usb usb4: SerialNumber: 0000:c5:00.0
apr 09 16:19:37 archlinux kernel: hub 4-0:1.0: USB hub found
apr 09 16:19:37 archlinux kernel: hub 4-0:1.0: 2 ports detected
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c5:00.3: xHCI Host Controller
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c5:00.3: new USB bus
registered, assigned bus number 5
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c5:00.3: hcc params
0x0118ffc5 hci version 0x120 quirks 0x0000000200000010
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c5:00.3: xHCI Host Controller
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c5:00.3: new USB bus
registered, assigned bus number 6
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c5:00.3: Host supports
USB 3.1 Enhanced SuperSpeed
apr 09 16:19:37 archlinux kernel: usb usb5: New USB device found,
idVendor=1d6b, idProduct=0002, bcdDevice= 6.19
apr 09 16:19:37 archlinux kernel: usb usb5: New USB device strings:
Mfr=3, Product=2, SerialNumber=1
apr 09 16:19:37 archlinux kernel: usb usb5: Product: xHCI Host Controller
apr 09 16:19:37 archlinux kernel: usb usb5: Manufacturer: Linux
6.19.11-arch1-1 xhci-hcd
apr 09 16:19:37 archlinux kernel: usb usb5: SerialNumber: 0000:c5:00.3
apr 09 16:19:37 archlinux kernel: hub 5-0:1.0: USB hub found
apr 09 16:19:37 archlinux kernel: hub 5-0:1.0: 1 port detected
apr 09 16:19:37 archlinux kernel: usb usb6: We don't know the
algorithms for LPM for this host, disabling LPM.
apr 09 16:19:37 archlinux kernel: usb usb6: New USB device found,
idVendor=1d6b, idProduct=0003, bcdDevice= 6.19
apr 09 16:19:37 archlinux kernel: usb usb6: New USB device strings:
Mfr=3, Product=2, SerialNumber=1
apr 09 16:19:37 archlinux kernel: usb usb6: Product: xHCI Host Controller
apr 09 16:19:37 archlinux kernel: usb usb6: Manufacturer: Linux
6.19.11-arch1-1 xhci-hcd
apr 09 16:19:37 archlinux kernel: usb usb6: SerialNumber: 0000:c5:00.3
apr 09 16:19:37 archlinux kernel: hub 6-0:1.0: USB hub found
apr 09 16:19:37 archlinux kernel: hub 6-0:1.0: 1 port detected
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c5:00.4: xHCI Host Controller
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c5:00.4: new USB bus
registered, assigned bus number 7
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c5:00.4: hcc params
0x0118ffc5 hci version 0x120 quirks 0x0000000200000010
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c5:00.4: xHCI Host Controller
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c5:00.4: new USB bus
registered, assigned bus number 8
apr 09 16:19:37 archlinux kernel: xhci_hcd 0000:c5:00.4: Host supports
USB 3.1 Enhanced SuperSpeed
apr 09 16:19:37 archlinux kernel: usb usb7: New USB device found,
idVendor=1d6b, idProduct=0002, bcdDevice= 6.19
apr 09 16:19:37 archlinux kernel: usb usb7: New USB device strings:
Mfr=3, Product=2, SerialNumber=1
apr 09 16:19:37 archlinux kernel: usb usb7: Product: xHCI Host Controller
apr 09 16:19:37 archlinux kernel: usb usb7: Manufacturer: Linux
6.19.11-arch1-1 xhci-hcd
apr 09 16:19:37 archlinux kernel: usb usb7: SerialNumber: 0000:c5:00.4
apr 09 16:19:37 archlinux kernel: hub 7-0:1.0: USB hub found
apr 09 16:19:37 archlinux kernel: hub 7-0:1.0: 1 port detected
apr 09 16:19:37 archlinux kernel: usb usb8: We don't know the
algorithms for LPM for this host, disabling LPM.
apr 09 16:19:37 archlinux kernel: usb usb8: New USB device found,
idVendor=1d6b, idProduct=0003, bcdDevice= 6.19
apr 09 16:19:37 archlinux kernel: usb usb8: New USB device strings:
Mfr=3, Product=2, SerialNumber=1
apr 09 16:19:37 archlinux kernel: usb usb8: Product: xHCI Host Controller
apr 09 16:19:37 archlinux kernel: usb usb8: Manufacturer: Linux
6.19.11-arch1-1 xhci-hcd
apr 09 16:19:37 archlinux kernel: usb usb8: SerialNumber: 0000:c5:00.4
apr 09 16:19:37 archlinux kernel: hub 8-0:1.0: USB hub found
apr 09 16:19:37 archlinux kernel: hub 8-0:1.0: 1 port detected
apr 09 16:19:37 archlinux kernel: usbcore: registered new interface
driver usbserial_generic
apr 09 16:19:37 archlinux kernel: usbserial: USB Serial support
registered for generic
apr 09 16:19:37 archlinux kernel: i8042: PNP detection disabled
apr 09 16:19:37 archlinux kernel: usb 3-1: new full-speed USB device
number 2 using xhci_hcd
apr 09 16:19:37 archlinux kernel: usb 1-1: new high-speed USB device
number 2 using xhci_hcd
apr 09 16:19:37 archlinux kernel: serio: i8042 KBD port at 0x60,0x64 irq 1
apr 09 16:19:37 archlinux kernel: rtc_cmos 00:01: RTC can wake from S4
apr 09 16:19:37 archlinux kernel: rtc_cmos 00:01: registered as rtc0
apr 09 16:19:37 archlinux kernel: rtc_cmos 00:01: setting system clock
to 2026-04-09T14:19:36 UTC (1775744376)
apr 09 16:19:37 archlinux kernel: rtc_cmos 00:01: alarms up to one
month, y3k, 114 bytes nvram
apr 09 16:19:37 archlinux kernel: input: AT Translated Set 2 keyboard
as /devices/platform/i8042/serio0/input/input2
apr 09 16:19:37 archlinux kernel: simple-framebuffer
simple-framebuffer.0: [drm] Registered 1 planes with drm panic
apr 09 16:19:37 archlinux kernel: [drm] Initialized simpledrm 1.0.0
for simple-framebuffer.0 on minor 0
apr 09 16:19:37 archlinux kernel: fbcon: Deferring console take-over
apr 09 16:19:37 archlinux kernel: simple-framebuffer
simple-framebuffer.0: [drm] fb0: simpledrmdrmfb frame buffer device
apr 09 16:19:37 archlinux kernel: hid: raw HID events driver (C) Jiri Kosina
apr 09 16:19:37 archlinux kernel: usbcore: registered new interface
driver usbhid
apr 09 16:19:37 archlinux kernel: usbhid: USB HID core driver
apr 09 16:19:37 archlinux kernel: rust_binder: Loaded Rust Binder.
apr 09 16:19:37 archlinux kernel: drop_monitor: Initializing network
drop monitor service
apr 09 16:19:37 archlinux kernel: NET: Registered PF_INET6 protocol family
apr 09 16:19:37 archlinux kernel: Segment Routing with IPv6
apr 09 16:19:37 archlinux kernel: RPL Segment Routing with IPv6
apr 09 16:19:37 archlinux kernel: In-situ OAM (IOAM) with IPv6
apr 09 16:19:37 archlinux kernel: NET: Registered PF_PACKET protocol family
apr 09 16:19:37 archlinux kernel: x86/amd: Previous system reset
reason [0x00200800]: ACPI power state transition occurred
apr 09 16:19:37 archlinux kernel: microcode: Current revision: 0x0b600037
apr 09 16:19:37 archlinux kernel: microcode: Updated early from: 0x0b600037
apr 09 16:19:37 archlinux kernel: resctrl: L3 allocation detected
apr 09 16:19:37 archlinux kernel: resctrl: MB allocation detected
apr 09 16:19:37 archlinux kernel: resctrl: SMBA allocation detected
apr 09 16:19:37 archlinux kernel: resctrl: L3 monitoring detected
apr 09 16:19:37 archlinux kernel: IPI shorthand broadcast: enabled
apr 09 16:19:37 archlinux kernel: sched_clock: Marking stable
(2272000686, 1705177)->(2294144713, -20438850)
apr 09 16:19:37 archlinux kernel: registered taskstats version 1
apr 09 16:19:37 archlinux kernel: Loading compiled-in X.509 certificates
apr 09 16:19:37 archlinux kernel: Loaded X.509 cert 'Build time
autogenerated kernel key: 3a9ca8bee785b4bb1fe8be4990c52511f4d6bad3'
apr 09 16:19:37 archlinux kernel: zswap: loaded using pool zstd
apr 09 16:19:37 archlinux kernel: Demotion targets for Node 0: null
apr 09 16:19:37 archlinux kernel: Key type .fscrypt registered
apr 09 16:19:37 archlinux kernel: Key type fscrypt-provisioning registered
apr 09 16:19:37 archlinux kernel: Btrfs loaded, zoned=yes, fsverity=yes
apr 09 16:19:37 archlinux kernel: Key type big_key registered
apr 09 16:19:37 archlinux kernel: integrity: Loading X.509 certificate: UEFI:db
apr 09 16:19:37 archlinux kernel: integrity: Loaded X.509 cert
'Microsoft Windows Production PCA 2011:
a92902398e16c49778cd90f99e4f9ae17c55af53'
apr 09 16:19:37 archlinux kernel: integrity: Loading X.509 certificate: UEFI:db
apr 09 16:19:37 archlinux kernel: integrity: Loaded X.509 cert
'Microsoft Corporation: Windows UEFI CA 2023:
aefc5fbbbe055d8f8daa585473499417ab5a5272'
apr 09 16:19:37 archlinux kernel: integrity: Loading X.509 certificate: UEFI:db
apr 09 16:19:37 archlinux kernel: integrity: Loaded X.509 cert 'Lenovo
Consumer SMB UEFI: 5252936d671a8a37b34d76030d24385e3589d606'
apr 09 16:19:37 archlinux kernel: integrity: Loading X.509 certificate: UEFI:db
apr 09 16:19:37 archlinux kernel: integrity: Loaded X.509 cert 'OK
Certificate: c8c73a37546046ab495c33f4d0856052'
apr 09 16:19:37 archlinux kernel: PM:   Magic number: 6:419:333
apr 09 16:19:37 archlinux kernel: tty tty54: hash matches
apr 09 16:19:37 archlinux kernel: memory memory183: hash matches
apr 09 16:19:37 archlinux kernel: RAS: Correctable Errors collector initialized.
apr 09 16:19:37 archlinux kernel: clk: Disabling unused clocks
apr 09 16:19:37 archlinux kernel: PM: genpd: Disabling unused power domains
apr 09 16:19:37 archlinux kernel: Freeing unused decrypted memory: 2028K
apr 09 16:19:37 archlinux kernel: Freeing unused kernel image
(initmem) memory: 4776K
apr 09 16:19:37 archlinux kernel: Write protecting the kernel
read-only data: 40960k
apr 09 16:19:37 archlinux kernel: Freeing unused kernel image
(text/rodata gap) memory: 1956K
apr 09 16:19:37 archlinux kernel: Freeing unused kernel image
(rodata/data gap) memory: 1688K
apr 09 16:19:37 archlinux kernel: x86/mm: Checked W+X mappings:
passed, no W+X pages found.
apr 09 16:19:37 archlinux kernel: rodata_test: all tests were successful
apr 09 16:19:37 archlinux kernel: Run /init as init process
apr 09 16:19:37 archlinux kernel:   with arguments:
apr 09 16:19:37 archlinux kernel:     /init
apr 09 16:19:37 archlinux kernel:   with environment:
apr 09 16:19:37 archlinux kernel:     HOME=/
apr 09 16:19:37 archlinux kernel:     TERM=linux
apr 09 16:19:37 archlinux systemd[1]: Successfully made /usr/ read-only.
apr 09 16:19:37 archlinux kernel: usb 1-1: New USB device found,
idVendor=04f2, idProduct=b829, bcdDevice=78.01
apr 09 16:19:37 archlinux kernel: usb 1-1: New USB device strings:
Mfr=3, Product=1, SerialNumber=2
apr 09 16:19:37 archlinux kernel: usb 1-1: Product: Integrated Camera
apr 09 16:19:37 archlinux kernel: usb 1-1: Manufacturer: Chicony
Electronics Co.,Ltd.
apr 09 16:19:37 archlinux kernel: usb 1-1: SerialNumber: 0001
apr 09 16:19:37 archlinux kernel: usb 3-1: New USB device found,
idVendor=046d, idProduct=c52b, bcdDevice=24.10
apr 09 16:19:37 archlinux kernel: usb 3-1: New USB device strings:
Mfr=1, Product=2, SerialNumber=0
apr 09 16:19:37 archlinux kernel: usb 3-1: Product: USB Receiver
apr 09 16:19:37 archlinux kernel: usb 3-1: Manufacturer: Logitech
apr 09 16:19:37 archlinux kernel: input: Logitech USB Receiver as
/devices/pci0000:00/0000:00:08.3/0000:c5:00.0/usb3/3-1/3-1:1.0/0003:046D:C52B.0001/input/input3
apr 09 16:19:37 archlinux kernel: hid-generic 0003:046D:C52B.0001:
input,hidraw0: USB HID v1.11 Keyboard [Logitech USB Receiver] on
usb-0000:c5:00.0-1/input0
apr 09 16:19:37 archlinux kernel: input: Logitech USB Receiver Mouse
as /devices/pci0000:00/0000:00:08.3/0000:c5:00.0/usb3/3-1/3-1:1.1/0003:046D:C52B.0002/input/input4
apr 09 16:19:37 archlinux kernel: input: Logitech USB Receiver
Consumer Control as
/devices/pci0000:00/0000:00:08.3/0000:c5:00.0/usb3/3-1/3-1:1.1/0003:046D:C52B.0002/input/input5
apr 09 16:19:37 archlinux kernel: input: Logitech USB Receiver System
Control as /devices/pci0000:00/0000:00:08.3/0000:c5:00.0/usb3/3-1/3-1:1.1/0003:046D:C52B.0002/input/input6
apr 09 16:19:37 archlinux kernel: hid-generic 0003:046D:C52B.0002:
input,hiddev96,hidraw1: USB HID v1.11 Mouse [Logitech USB Receiver] on
usb-0000:c5:00.0-1/input1
apr 09 16:19:37 archlinux kernel: hid-generic 0003:046D:C52B.0003:
hiddev97,hidraw2: USB HID v1.11 Device [Logitech USB Receiver] on
usb-0000:c5:00.0-1/input2
apr 09 16:19:37 archlinux systemd[1]: systemd 260.1-1-arch running in
system mode (+PAM +AUDIT -SELINUX +APPARMOR -IMA +IPE +SMACK +SECCOMP
+GCRYPT +GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2
+KMOD +LIBCRYPTSETUP +LIBCRYPTSETUP_PLUGINS +LIBFDISK +PCRE2
+PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD
+BPF_FRAMEWORK +BTF +XKBCOMMON +UTMP +LIBARCHIVE)
apr 09 16:19:37 archlinux systemd[1]: Detected architecture x86-64.
apr 09 16:19:37 archlinux systemd[1]: Running in initrd.
apr 09 16:19:37 archlinux systemd[1]: Initializing machine ID from
random generator.
apr 09 16:19:37 archlinux kernel: usb 3-5: new full-speed USB device
number 3 using xhci_hcd
apr 09 16:19:37 archlinux systemd[1]: Queued start job for default
target Initrd Default Target.
apr 09 16:19:37 archlinux systemd[1]: Expecting device
/dev/disk/by-uuid/<ROOT_UUID>...
apr 09 16:19:37 archlinux systemd[1]: Reached target Path Units.
apr 09 16:19:37 archlinux systemd[1]: Reached target Slice Units.
apr 09 16:19:37 archlinux systemd[1]: Reached target Swaps.
apr 09 16:19:37 archlinux systemd[1]: Reached target Timer Units.
apr 09 16:19:37 archlinux systemd[1]: Listening on Journal Socket (/dev/log).
apr 09 16:19:37 archlinux systemd[1]: Listening on Journal Sockets.
apr 09 16:19:37 archlinux systemd[1]: Listening on udev Control Socket.
apr 09 16:19:37 archlinux systemd[1]: Listening on udev Kernel Socket.
apr 09 16:19:37 archlinux systemd[1]: Reached target Socket Units.
apr 09 16:19:37 archlinux systemd[1]: Create List of Static Device
Nodes skipped, unmet condition check
ConditionFileNotEmpty=/lib/modules/6.19.11-arch1-1/modules.devname
apr 09 16:19:37 archlinux systemd[1]: Starting Journal Service...
apr 09 16:19:37 archlinux systemd[1]: Starting Load Kernel Modules...
apr 09 16:19:37 archlinux systemd[1]: TPM PCR Barrier (initrd)
skipped, unmet condition check ConditionSecurity=measured-uki
apr 09 16:19:37 archlinux systemd[1]: Starting Create Static Device
Nodes in /dev...
apr 09 16:19:37 archlinux systemd[1]: Starting Coldplug All udev Devices...
apr 09 16:19:37 archlinux systemd[1]: Starting Virtual Console Setup...
apr 09 16:19:37 archlinux systemd[1]: Finished Create Static Device
Nodes in /dev.
apr 09 16:19:37 archlinux systemd-journald[233]: Collecting audit
messages is disabled.
apr 09 16:19:37 archlinux systemd[1]: Finished Virtual Console Setup.
apr 09 16:19:37 archlinux systemd[1]: Reached target Preparation for
Local File Systems.
apr 09 16:19:37 archlinux systemd[1]: Reached target Local File Systems.
apr 09 16:19:37 archlinux systemd[1]: Starting Rule-based Manager for
Device Events and Files...
apr 09 16:19:37 archlinux kernel: wmi_bus wmi_bus-PNP0C14:02:
[Firmware Bug]: WQA4 data block query control method not found
apr 09 16:19:37 archlinux kernel: wmi_bus wmi_bus-PNP0C14:02:
[Firmware Bug]: WQA6 data block query control method not found
apr 09 16:19:37 archlinux kernel: wmi_bus wmi_bus-PNP0C14:02:
[Firmware Bug]: WQA7 data block query control method not found
apr 09 16:19:37 archlinux kernel: wmi_bus wmi_bus-PNP0C14:02:
[Firmware Bug]: WQA8 data block query control method not found
apr 09 16:19:37 archlinux kernel: wmi_bus wmi_bus-PNP0C14:02:
[Firmware Bug]: WQA9 data block query control method not found
apr 09 16:19:37 archlinux kernel: wmi_bus wmi_bus-PNP0C14:02:
[Firmware Bug]: WMA9 method block execution control method not found
apr 09 16:19:37 archlinux kernel: ACPI: video: Video Device [VGA]
(multi-head: yes  rom: no  post: no)
apr 09 16:19:37 archlinux kernel: input: Video Bus as
/devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:16/LNXVIDEO:00/input/input8
apr 09 16:19:37 archlinux systemd[1]: Started Rule-based Manager for
Device Events and Files.
apr 09 16:19:37 archlinux systemd[1]: Started Journal Service.
apr 09 16:19:37 archlinux kernel: usb 3-5: New USB device found,
idVendor=8087, idProduct=0032, bcdDevice= 0.00
apr 09 16:19:37 archlinux kernel: usb 3-5: New USB device strings:
Mfr=0, Product=0, SerialNumber=0
apr 09 16:19:37 archlinux kernel: fbcon: Taking over console
apr 09 16:19:37 archlinux kernel: Console: switching to colour frame
buffer device 180x56
apr 09 16:19:38 archlinux kernel: Key type psk registered
apr 09 16:19:38 archlinux kernel: sdhci: Secure Digital Host
Controller Interface driver
apr 09 16:19:38 archlinux kernel: sdhci: Copyright(c) Pierre Ossman
apr 09 16:19:38 archlinux kernel: sdhci-pci 0000:c0:00.0: SDHCI
controller found [1217:8621] (rev 1)
apr 09 16:19:38 archlinux kernel: sdhci-pci 0000:c0:00.0: enabling
device (0000 -> 0002)
apr 09 16:19:38 archlinux kernel: nvme 0000:c2:00.0: platform quirk:
setting simple suspend
apr 09 16:19:38 archlinux kernel: nvme 0000:bf:00.0: platform quirk:
setting simple suspend
apr 09 16:19:38 archlinux kernel: nvme nvme0: pci function 0000:c2:00.0
apr 09 16:19:38 archlinux kernel: nvme nvme1: pci function 0000:bf:00.0
apr 09 16:19:38 archlinux kernel: amdgpu: Virtual CRAT table created for CPU
apr 09 16:19:38 archlinux kernel: amdgpu: Topology: Add CPU node
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: enabling device
(0006 -> 0007)
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu:
initializing kernel modesetting (IP DISCOVERY 0x1002:0x1114
0x17AA:0x3801 0xC2).
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu:
register mmio base: 0x90200000
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu:
register mmio size: 524288
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu:
detected ip block number 0 <common_v1_0_0> (soc21_common)
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu:
detected ip block number 1 <gmc_v11_0_0> (gmc_v11_0)
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu:
detected ip block number 2 <ih_v6_0_0> (ih_v6_1)
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu:
detected ip block number 3 <psp_v13_0_0> (psp)
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu:
detected ip block number 4 <smu_v14_0_0> (smu)
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu:
detected ip block number 5 <dce_v1_0_0> (dm)
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu:
detected ip block number 6 <gfx_v11_0_0> (gfx_v11_0)
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu:
detected ip block number 7 <sdma_v6_0_0> (sdma_v6_0)
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu:
detected ip block number 8 <vcn_v4_0_5> (vcn_v4_0_5)
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu:
detected ip block number 9 <jpeg_v4_0_5> (jpeg_v4_0_5)
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu:
detected ip block number 10 <mes_v11_0_0> (mes_v11_0)
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu:
detected ip block number 11 <vpe_v6_1_0> (vpe_v6_1)
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: Fetched
VBIOS from VFCT
apr 09 16:19:38 archlinux kernel: amdgpu: ATOM BIOS: 113-STRIXEMU-001
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: VPE:
collaborate mode false
apr 09 16:19:38 archlinux kernel: nvme nvme0: allocated 40 MiB host
memory buffer (10 segments).
apr 09 16:19:38 archlinux kernel: mmc0: SDHCI controller on PCI
[0000:c0:00.0] using ADMA
apr 09 16:19:38 archlinux kernel: Console: switching to colour dummy
device 80x25
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: Trusted
Memory Zone (TMZ) feature disabled as experimental (default)
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: vm size
is 262144 GB, 4 levels, block size is 9-bit, fragment size is 9-bit
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: VRAM:
2048M 0x0000008000000000 - 0x000000807FFFFFFF (2048M used)
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: GART:
512M 0x00007FFF00000000 - 0x00007FFF1FFFFFFF
apr 09 16:19:38 archlinux kernel: [drm] Detected VRAM RAM=2048M, BAR=2048M
apr 09 16:19:38 archlinux kernel: [drm] RAM width 128bits LPDDR5
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: amdgpu:
2048M of VRAM memory ready
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: amdgpu:
14928M of GTT memory ready.
apr 09 16:19:38 archlinux kernel: [drm] GART: num cpu pages 131072,
num gpu pages 131072
apr 09 16:19:38 archlinux kernel: [drm] PCIE GART of 512M enabled
(table at 0x000000807FB00000).
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: [drm]
Loading DMUB firmware via PSP: version=0x09003E00
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: [VCN
instance 0] Found VCN firmware Version ENC: 1.24 DEC: 9 VEP: 0
Revision: 16
apr 09 16:19:38 archlinux kernel: nvme nvme0: 16/0/0 default/read/poll queues
apr 09 16:19:38 archlinux kernel: logitech-djreceiver
0003:046D:C52B.0003: hiddev96,hidraw0: USB HID v1.11 Device [Logitech
USB Receiver] on usb-0000:c5:00.0-1/input2
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: reserve
0x1100000 from 0x807c000000 for PSP TMR
apr 09 16:19:38 archlinux kernel: nvme nvme1: allocated 32 MiB host
memory buffer (8 segments).
apr 09 16:19:38 archlinux kernel: nvme nvme1: 16/0/0 default/read/poll queues
apr 09 16:19:38 archlinux kernel:  nvme0n1: p1 p2
apr 09 16:19:38 archlinux kernel:  nvme1n1: p1 p2 p3 p4 p5
apr 09 16:19:38 archlinux kernel: BTRFS: device label cachyos devid 1
transid 68735 /dev/nvme0n1p2 (259:2) scanned by mount (350)
apr 09 16:19:38 archlinux kernel: BTRFS info (device nvme0n1p2): first
mount of filesystem <ROOT_UUID>
apr 09 16:19:38 archlinux kernel: BTRFS info (device nvme0n1p2): using
crc32c (crc32c-lib) checksum algorithm
apr 09 16:19:38 archlinux kernel: BTRFS info (device nvme0n1p2):
enabling ssd optimizations
apr 09 16:19:38 archlinux kernel: BTRFS info (device nvme0n1p2):
turning on async discard
apr 09 16:19:38 archlinux kernel: BTRFS info (device nvme0n1p2):
enabling free space tree
apr 09 16:19:38 archlinux kernel: input: Logitech Wireless Device
PID:404a Keyboard as
/devices/pci0000:00/0000:00:08.3/0000:c5:00.0/usb3/3-1/3-1:1.2/0003:046D:C52B.0003/0003:046D:404A.0004/input/input9
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: RAS:
optional ras ta ucode is not available
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: RAP:
optional rap ta ucode is not available
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu:
SECUREDISPLAY: optional securedisplay ta ucode is not available
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: SMU is
initialized successfully!
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: [drm]
Display Core v3.2.359 initialized on DCN 3.5
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: [drm]
DP-HDMI FRL PCON supported
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: [drm]
DMUB hardware initialized: version=0x09003E00
apr 09 16:19:38 archlinux kernel: input: Logitech Wireless Device
PID:404a Mouse as
/devices/pci0000:00/0000:00:08.3/0000:c5:00.0/usb3/3-1/3-1:1.2/0003:046D:C52B.0003/0003:046D:404A.0004/input/input10
apr 09 16:19:38 archlinux kernel: hid-generic 0003:046D:404A.0004:
input,hidraw1: USB HID v1.11 Keyboard [Logitech Wireless Device
PID:404a] on usb-0000:c5:00.0-1/input2:1
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: [drm]
Using ACPI provided EDID for eDP-1
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: [drm]
eDP-1: PSR support 1, DC PSR ver 0, sink PSR ver 1 DPCD caps 0x76
su_y_granularity 4
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: [drm]
HDMI-A-1: PSR support 0, DC PSR ver -1, sink PSR ver 0 DPCD caps 0x0
su_y_granularity 0
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: [drm]
DP-1: PSR support 0, DC PSR ver -1, sink PSR ver 0 DPCD caps 0x0
su_y_granularity 0
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: [drm]
DP-2: PSR support 0, DC PSR ver -1, sink PSR ver 0 DPCD caps 0x0
su_y_granularity 0
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: [drm]
DP-3: PSR support 0, DC PSR ver -1, sink PSR ver 0 DPCD caps 0x0
su_y_granularity 0
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: [drm]
DP-4: PSR support 0, DC PSR ver -1, sink PSR ver 0 DPCD caps 0x0
su_y_granularity 0
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: [drm]
DP-5: PSR support 0, DC PSR ver -1, sink PSR ver 0 DPCD caps 0x0
su_y_granularity 0
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: [drm]
DP-6: PSR support 0, DC PSR ver -1, sink PSR ver 0 DPCD caps 0x0
su_y_granularity 0
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: [drm]
DP-7: PSR support 0, DC PSR ver -1, sink PSR ver 0 DPCD caps 0x0
su_y_granularity 0
apr 09 16:19:38 archlinux kernel: kfd kfd: amdgpu: Allocated 3969056
bytes on gart
apr 09 16:19:38 archlinux kernel: kfd kfd: amdgpu: Total number of KFD
nodes to be created: 1
apr 09 16:19:38 archlinux kernel: amdgpu: Virtual CRAT table created for GPU
apr 09 16:19:38 archlinux kernel: amdgpu: Topology: Add dGPU node
[0x1114:0x1002]
apr 09 16:19:38 archlinux kernel: kfd kfd: amdgpu: added device 1002:1114
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: SE 1,
SH per SE 2, CU per SH 4, active_cu_number 8
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: ring
gfx_0.0.0 uses VM inv eng 0 on hub 0
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.0.0 uses VM inv eng 1 on hub 0
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.1.0 uses VM inv eng 4 on hub 0
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.2.0 uses VM inv eng 6 on hub 0
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.3.0 uses VM inv eng 7 on hub 0
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.0.1 uses VM inv eng 8 on hub 0
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.1.1 uses VM inv eng 9 on hub 0
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.2.1 uses VM inv eng 10 on hub 0
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.3.1 uses VM inv eng 11 on hub 0
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: ring
sdma0 uses VM inv eng 12 on hub 0
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: ring
vcn_unified_0 uses VM inv eng 0 on hub 8
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: ring
jpeg_dec_0 uses VM inv eng 1 on hub 8
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: ring
mes_kiq_3.1.0 uses VM inv eng 13 on hub 0
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: ring
vpe uses VM inv eng 4 on hub 8
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: Runtime
PM not available
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: amdgpu: [drm]
Using custom brightness curve
apr 09 16:19:38 archlinux kernel: amdgpu 0000:c3:00.0: [drm]
Registered 4 planes with drm panic
apr 09 16:19:38 archlinux kernel: [drm] Initialized amdgpu 3.64.0 for
0000:c3:00.0 on minor 1
apr 09 16:19:38 archlinux kernel: fbcon: amdgpudrmfb (fb0) is primary device
apr 09 16:19:38 archlinux kernel: [drm] pre_validate_dsc:1667 MST_DSC
dsc precompute is not needed
apr 09 16:19:38 archlinux kernel: input: Logitech MX Anywhere 2 as
/devices/pci0000:00/0000:00:08.3/0000:c5:00.0/usb3/3-1/3-1:1.2/0003:046D:C52B.0003/0003:046D:404A.0004/input/input14
apr 09 16:19:38 archlinux kernel: logitech-hidpp-device
0003:046D:404A.0004: input,hidraw1: USB HID v1.11 Keyboard [Logitech
MX Anywhere 2] on usb-0000:c5:00.0-1/input2:1
apr 09 16:19:40 archlinux kernel: Console: switching to colour frame
buffer device 180x56
apr 09 16:19:40 archlinux kernel: amdgpu 0000:c3:00.0: [drm] fb0:
amdgpudrmfb frame buffer device
apr 09 16:19:41 <HOST> systemd-journald[233]: Received SIGTERM from
PID 1 (systemd).
apr 09 16:19:41 <HOST> systemd[1]: systemd 260.1-1-arch running in
system mode (+PAM +AUDIT -SELINUX +APPARMOR -IMA +IPE +SMACK +SECCOMP
+GCRYPT +GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2
+KMOD +LIBCRYPTSETUP +LIBCRYPTSETUP_PLUGINS +LIBFDISK +PCRE2
+PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD
+BPF_FRAMEWORK +BTF +XKBCOMMON +UTMP +LIBARCHIVE)
apr 09 16:19:41 <HOST> systemd[1]: Detected architecture x86-64.
apr 09 16:19:41 <HOST> systemd[1]: Hostname set to <<HOST>>.
apr 09 16:19:41 <HOST> systemd[1]: bpf-restrict-fs: LSM BPF program attached
apr 09 16:19:41 <HOST> kernel: zram: Added device: zram0
apr 09 16:19:41 <HOST> systemd[1]: initrd-switch-root.service:
Deactivated successfully.
apr 09 16:19:41 <HOST> systemd[1]: Stopped Switch Root.
apr 09 16:19:41 <HOST> systemd[1]: systemd-journald.service: Scheduled
restart job, restart counter is at 1.
apr 09 16:19:41 <HOST> systemd[1]: Created slice Slice /system/dirmngr.
apr 09 16:19:41 <HOST> systemd[1]: Created slice Slice /system/getty.
apr 09 16:19:41 <HOST> systemd[1]: Created slice Slice /system/gpg-agent.
apr 09 16:19:41 <HOST> systemd[1]: Created slice Slice
/system/gpg-agent-browser.
apr 09 16:19:41 <HOST> systemd[1]: Created slice Slice /system/gpg-agent-extra.
apr 09 16:19:41 <HOST> systemd[1]: Created slice Slice /system/gpg-agent-ssh.
apr 09 16:19:41 <HOST> systemd[1]: Created slice Slice /system/keyboxd.
apr 09 16:19:41 <HOST> systemd[1]: Created slice Slice /system/modprobe.
apr 09 16:19:41 <HOST> systemd[1]: Created slice Slice /system/systemd-fsck.
apr 09 16:19:41 <HOST> systemd[1]: Created slice Slice
/system/systemd-zram-setup.
apr 09 16:19:41 <HOST> systemd[1]: Created slice User and Session Slice.
apr 09 16:19:41 <HOST> systemd[1]: systemd-ask-password-plymouth.path:
Deactivated successfully.
apr 09 16:19:41 <HOST> systemd[1]: Stopped Forward Password Requests
to Plymouth Directory Watch.
apr 09 16:19:41 <HOST> systemd[1]: Started Forward Password Requests
to Wall Directory Watch.
apr 09 16:19:41 <HOST> systemd[1]: Set up automount Arbitrary
Executable File Formats File System Automount Point.
apr 09 16:19:41 <HOST> systemd[1]: Expecting device
/dev/disk/by-uuid/A25D-6277...
apr 09 16:19:41 <HOST> systemd[1]: Expecting device
/dev/disk/by-uuid/<ROOT_UUID>...
apr 09 16:19:41 <HOST> systemd[1]: Expecting device /dev/zram0...
apr 09 16:19:41 <HOST> systemd[1]: Reached target Login Prompts.
apr 09 16:19:41 <HOST> systemd[1]: Reached target Image Downloads.
apr 09 16:19:41 <HOST> systemd[1]: Stopped target Switch Root.
apr 09 16:19:41 <HOST> systemd[1]: Stopped target Initrd File Systems.
apr 09 16:19:41 <HOST> systemd[1]: Stopped target Initrd Root File System.
apr 09 16:19:41 <HOST> systemd[1]: Reached target Local Integrity
Protected Volumes.
apr 09 16:19:41 <HOST> systemd[1]: Reached target Remote File Systems.
apr 09 16:19:41 <HOST> systemd[1]: Reached target Slice Units.
apr 09 16:19:41 <HOST> systemd[1]: Reached target Local Verity
Protected Volumes.
apr 09 16:19:41 <HOST> systemd[1]: Listening on Device-mapper event
daemon FIFOs.
apr 09 16:19:41 <HOST> systemd[1]: Listening on LVM2 poll daemon socket.
apr 09 16:19:41 <HOST> systemd[1]: Listening on Query the User
Interactively for a Password.
apr 09 16:19:41 <HOST> systemd[1]: Listening on Process Core Dump Socket.
apr 09 16:19:41 <HOST> systemd[1]: Listening on Credential
Encryption/Decryption.
apr 09 16:19:41 <HOST> systemd[1]: Listening on Factory Reset Management.
apr 09 16:19:41 <HOST> systemd[1]: Listening on Console Output Muting
Service Socket.
apr 09 16:19:41 <HOST> systemd[1]: TPM PCR Measurements skipped, unmet
condition check ConditionSecurity=measured-uki
apr 09 16:19:41 <HOST> systemd[1]: Make TPM PCR Policy skipped, unmet
condition check ConditionSecurity=measured-uki
apr 09 16:19:41 <HOST> systemd[1]: Listening on Disk Repartitioning
Service Socket.
apr 09 16:19:41 <HOST> systemd[1]: Listening on Resolve Monitor Varlink Socket.
apr 09 16:19:41 <HOST> systemd[1]: Listening on Resolve Service Varlink Socket.
apr 09 16:19:41 <HOST> systemd[1]: Listening on udev Control Socket.
apr 09 16:19:41 <HOST> systemd[1]: Listening on udev Varlink Socket.
apr 09 16:19:41 <HOST> systemd[1]: Listening on User Database Manager Socket.
apr 09 16:19:41 <HOST> systemd[1]: Mounting Huge Pages File System...
apr 09 16:19:41 <HOST> systemd[1]: Mounting POSIX Message Queue File System...
apr 09 16:19:41 <HOST> systemd[1]: Mounting Kernel Debug File System...
apr 09 16:19:41 <HOST> systemd[1]: Mounting Kernel Trace File System...
apr 09 16:19:41 <HOST> systemd[1]: Starting Create List of Static
Device Nodes...
apr 09 16:19:41 <HOST> systemd[1]: Starting Monitoring of LVM2
mirrors, snapshots etc. using dmeventd or progress polling...
apr 09 16:19:41 <HOST> systemd[1]: Load Kernel Module configfs
skipped, unmet condition check ConditionKernelModuleLoaded=!configfs
apr 09 16:19:41 <HOST> systemd[1]: Mounting Kernel Configuration File System...
apr 09 16:19:41 <HOST> systemd[1]: Load Kernel Module drm skipped,
unmet condition check ConditionKernelModuleLoaded=!drm
apr 09 16:19:41 <HOST> systemd[1]: Load Kernel Module fuse skipped,
unmet condition check ConditionKernelModuleLoaded=!fuse
apr 09 16:19:41 <HOST> systemd[1]: Mounting FUSE Control File System...
apr 09 16:19:41 <HOST> systemd[1]: Stopping plymouth-start.service...
apr 09 16:19:41 <HOST> systemd[1]: plymouth-switch-root.service:
Deactivated successfully.
apr 09 16:19:41 <HOST> systemd[1]: Stopped Plymouth switch root service.
apr 09 16:19:41 <HOST> systemd[1]: Clear Stale Hibernate Storage Info
skipped, unmet condition check
ConditionPathExists=/sys/firmware/efi/efivars/HibernateLocation-8cf2644b-4b0b-428f-9387-6d876050dc67
apr 09 16:19:41 <HOST> systemd[1]: Starting Journal Service...
apr 09 16:19:41 <HOST> systemd[1]: Starting Load Kernel Modules...
apr 09 16:19:41 <HOST> systemd[1]: TPM PCR Machine ID Measurement
skipped, unmet condition check ConditionSecurity=measured-uki
apr 09 16:19:41 <HOST> systemd[1]: TPM NvPCR Product ID Measurement
skipped, unmet condition check ConditionSecurity=measured-uki
apr 09 16:19:41 <HOST> systemd[1]: Starting Remount Root and Kernel
File Systems...
apr 09 16:19:41 <HOST> systemd[1]: Early TPM SRK Setup skipped, unmet
condition check ConditionSecurity=measured-uki
apr 09 16:19:41 <HOST> systemd[1]: Starting Load udev Rules from Credentials...
apr 09 16:19:41 <HOST> systemd[1]: Starting Coldplug All udev Devices...
apr 09 16:19:41 <HOST> systemd[1]: systemd-vconsole-setup.service:
Deactivated successfully.
apr 09 16:19:41 <HOST> systemd[1]: Stopped Virtual Console Setup.
apr 09 16:19:41 <HOST> systemd[1]: Mounted Huge Pages File System.
apr 09 16:19:41 <HOST> systemd[1]: Mounted POSIX Message Queue File System.
apr 09 16:19:41 <HOST> systemd[1]: Mounted Kernel Debug File System.
apr 09 16:19:41 <HOST> systemd[1]: Mounted Kernel Trace File System.
apr 09 16:19:41 <HOST> systemd[1]: Finished Create List of Static Device Nodes.
apr 09 16:19:41 <HOST> systemd[1]: Mounted Kernel Configuration File System.
apr 09 16:19:41 <HOST> systemd[1]: Mounted FUSE Control File System.
apr 09 16:19:41 <HOST> systemd[1]: Starting Create Static Device Nodes
in /dev gracefully...
apr 09 16:19:41 <HOST> kernel: BTRFS info (device nvme0n1p2 state M):
use zstd compression, level 1
apr 09 16:19:41 <HOST> systemd[1]: Finished Remount Root and Kernel
File Systems.
apr 09 16:19:41 <HOST> systemd[1]: Finished Load udev Rules from Credentials.
apr 09 16:19:41 <HOST> kernel: Asymmetric key parser 'pkcs8' registered
apr 09 16:19:41 <HOST> systemd[1]: Rebuild Hardware Database skipped,
unmet condition check ConditionNeedsUpdate=/etc
apr 09 16:19:41 <HOST> kernel: i2c_dev: i2c /dev entries driver
apr 09 16:19:41 <HOST> systemd[1]: Starting Load/Save OS Random Seed...
apr 09 16:19:41 <HOST> systemd[1]: TPM SRK Setup skipped, unmet
condition check ConditionSecurity=measured-uki
apr 09 16:19:41 <HOST> systemd[1]: TPM PCR NvPCR Initialization
Separator skipped, unmet condition check
ConditionSecurity=measured-uki
apr 09 16:19:41 <HOST> systemd[1]: Finished Load Kernel Modules.
apr 09 16:19:41 <HOST> systemd-journald[589]: Collecting audit
messages is disabled.
apr 09 16:19:41 <HOST> systemd[1]: Starting Apply Kernel Variables...
apr 09 16:19:41 <HOST> systemd[1]: Started Journal Service.
apr 09 16:19:41 <HOST> kernel: device-mapper: uevent: version 1.0.3
apr 09 16:19:41 <HOST> kernel: device-mapper: ioctl: 4.50.0-ioctl
(2025-04-28) initialised: dm-devel@lists.linux.dev
apr 09 16:19:42 <HOST> kernel: zram0: detected capacity change from 0
to 61145088
apr 09 16:19:42 <HOST> kernel: ccp 0000:c3:00.2: enabling device (0000 -> 0002)
apr 09 16:19:42 <HOST> kernel: ccp 0000:c3:00.2: tee enabled
apr 09 16:19:42 <HOST> kernel: ccp 0000:c3:00.2: psp enabled
apr 09 16:19:42 <HOST> kernel: amdxdna 0000:c4:00.1: enabling device
(0000 -> 0002)
apr 09 16:19:42 <HOST> kernel: ACPI: bus type thunderbolt registered
apr 09 16:19:42 <HOST> kernel: cfg80211: Loading compiled-in X.509
certificates for regulatory database
apr 09 16:19:42 <HOST> kernel: mc: Linux media interface: v0.10
apr 09 16:19:42 <HOST> kernel: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
apr 09 16:19:42 <HOST> kernel: Loaded X.509 cert 'wens:
61c038651aabdcf94bd0ac7ff06c7248db18c600'
apr 09 16:19:42 <HOST> kernel: ACPI: battery: new hook: Ideapad
Battery Extension
apr 09 16:19:42 <HOST> kernel: input: Ideapad extra buttons as
/devices/pci0000:00/0000:00:14.3/PNP0C09:00/VPC2004:00/input/input15
apr 09 16:19:42 <HOST> kernel: RAPL PMU: API unit is 2^-32 Joules, 2
fixed counters, 163840 ms ovfl timer
apr 09 16:19:42 <HOST> kernel: RAPL PMU: hw unit of domain package 2^-16 Joules
apr 09 16:19:42 <HOST> kernel: RAPL PMU: hw unit of domain core 2^-16 Joules
apr 09 16:19:42 <HOST> kernel: input: PC Speaker as
/devices/platform/pcspkr/input/input16
apr 09 16:19:42 <HOST> kernel: mousedev: PS/2 mouse device common for all mice
apr 09 16:19:42 <HOST> kernel: Bluetooth: Core ver 2.22
apr 09 16:19:42 <HOST> kernel: NET: Registered PF_BLUETOOTH protocol family
apr 09 16:19:42 <HOST> kernel: Bluetooth: HCI device and connection
manager initialized
apr 09 16:19:42 <HOST> kernel: Bluetooth: HCI socket layer initialized
apr 09 16:19:42 <HOST> kernel: Bluetooth: L2CAP socket layer initialized
apr 09 16:19:42 <HOST> kernel: Bluetooth: SCO socket layer initialized
apr 09 16:19:42 <HOST> kernel: input: SYNA2BA6:00 06CB:CF00 Mouse as
/devices/platform/AMDI0010:00/i2c-0/i2c-SYNA2BA6:00/0018:06CB:CF00.0005/input/input17
apr 09 16:19:42 <HOST> kernel: input: SYNA2BA6:00 06CB:CF00 Touchpad
as /devices/platform/AMDI0010:00/i2c-0/i2c-SYNA2BA6:00/0018:06CB:CF00.0005/input/input18
apr 09 16:19:42 <HOST> kernel: hid-generic 0018:06CB:CF00.0005:
input,hidraw2: I2C HID v1.00 Mouse [SYNA2BA6:00 06CB:CF00] on
i2c-SYNA2BA6:00
apr 09 16:19:42 <HOST> kernel: hid-generic 0018:048D:8353.0006:
hidraw3: I2C HID v1.00 Device [ITE8353:00 048D:8353] on i2c-ITE8353:00
apr 09 16:19:42 <HOST> kernel: [drm] Initialized amdxdna_accel_driver
0.6.0 for 0000:c4:00.1 on minor 0
apr 09 16:19:42 <HOST> kernel: piix4_smbus 0000:00:14.0: SMBus Host
Controller at 0xb00, revision 0
apr 09 16:19:42 <HOST> kernel: piix4_smbus 0000:00:14.0: Using
register 0x02 for SMBus port selection
apr 09 16:19:42 <HOST> kernel: videodev: Linux video capture interface: v2.00
apr 09 16:19:42 <HOST> kernel: Adding 30572540k swap on /dev/zram0.
Priority:100 extents:1 across:30572540k SSDsc
apr 09 16:19:42 <HOST> kernel: piix4_smbus 0000:00:14.0: Auxiliary
SMBus Host Controller at 0xb20
apr 09 16:19:42 <HOST> kernel: i2c i2c-23: Successfully instantiated SPD at 0x50
apr 09 16:19:42 <HOST> kernel: i2c i2c-23: Successfully instantiated SPD at 0x51
apr 09 16:19:42 <HOST> kernel: i2c i2c-23: Successfully instantiated SPD at 0x52
apr 09 16:19:42 <HOST> kernel: i2c i2c-23: Successfully instantiated SPD at 0x53
apr 09 16:19:42 <HOST> kernel: lenovo_wmi_other
DC2A8805-3A8C-41BA-A6F7-092E0089CD3B-16: bound
7A8F5407-CB67-4D6E-B547-39B3BE018154-10 (ops lwmi_cd01_component_ops
[lenovo_wmi_capdata01])
apr 09 16:19:42 <HOST> kernel: iwlwifi 0000:c1:00.0: enabling device
(0000 -> 0002)
apr 09 16:19:42 <HOST> kernel: usbcore: registered new interface driver btusb
apr 09 16:19:42 <HOST> kernel: input: gpio-keys as
/devices/platform/ACPI0011:00/gpio-keys.1.auto/input/input20
apr 09 16:19:42 <HOST> kernel: Bluetooth: hci0: Device revision is 0
apr 09 16:19:42 <HOST> kernel: Bluetooth: hci0: Secure boot is enabled
apr 09 16:19:42 <HOST> kernel: Bluetooth: hci0: OTP lock is enabled
apr 09 16:19:42 <HOST> kernel: Bluetooth: hci0: API lock is enabled
apr 09 16:19:42 <HOST> kernel: Bluetooth: hci0: Debug lock is disabled
apr 09 16:19:42 <HOST> kernel: Bluetooth: hci0: Minimum firmware build
1 week 10 2014
apr 09 16:19:42 <HOST> kernel: Bluetooth: hci0: Bootloader timestamp
2019.40 buildtype 1 build 38
apr 09 16:19:42 <HOST> kernel: Bluetooth: hci0: No dsm support to set
reset delay
apr 09 16:19:42 <HOST> kernel: iwlwifi 0000:c1:00.0: Detected crf-id
0x400410, cnv-id 0x400410 wfpm id 0x80000000
apr 09 16:19:42 <HOST> kernel: iwlwifi 0000:c1:00.0: PCI dev
2725/0024, rev=0x420, rfid=0x10d000
apr 09 16:19:42 <HOST> kernel: iwlwifi 0000:c1:00.0: Detected Intel(R)
Wi-Fi 6E AX210 160MHz
apr 09 16:19:42 <HOST> kernel: Bluetooth: hci0: Found device firmware:
intel/ibt-0041-0041.sfi
apr 09 16:19:42 <HOST> kernel: Bluetooth: hci0: Boot Address: 0x100800
apr 09 16:19:42 <HOST> kernel: Bluetooth: hci0: Firmware Version: 202-5.26
apr 09 16:19:42 <HOST> kernel: iwlwifi 0000:c1:00.0: loaded firmware
version 89.123cf747.0 ty-a0-gf-a0-89.ucode op_mode iwlmvm
apr 09 16:19:42 <HOST> kernel: snd_acp_pci 0000:c3:00.5: enabling
device (0000 -> 0002)
apr 09 16:19:42 <HOST> kernel: kvm_amd: TSC scaling supported
apr 09 16:19:42 <HOST> kernel: kvm_amd: Nested Virtualization enabled
apr 09 16:19:42 <HOST> kernel: kvm_amd: Nested Paging enabled
apr 09 16:19:42 <HOST> kernel: kvm_amd: LBR virtualization supported
apr 09 16:19:42 <HOST> kernel: kvm_amd: AVIC enabled
apr 09 16:19:42 <HOST> kernel: kvm_amd: x2AVIC enabled (max 512 vCPUs)
apr 09 16:19:42 <HOST> kernel: kvm_amd: Virtual VMLOAD VMSAVE supported
apr 09 16:19:42 <HOST> kernel: kvm_amd: Virtual GIF supported
apr 09 16:19:42 <HOST> kernel: kvm_amd: Virtual NMI enabled
apr 09 16:19:42 <HOST> kernel: uvcvideo 1-1:1.0: Found UVC 1.50 device
Integrated Camera (04f2:b829)
apr 09 16:19:42 <HOST> kernel: hid-sensor-hub 0018:048D:8353.0006:
hidraw3: I2C HID v1.00 Device [ITE8353:00 048D:8353] on i2c-ITE8353:00
apr 09 16:19:42 <HOST> kernel: pps_core: LinuxPPS API ver. 1 registered
apr 09 16:19:42 <HOST> kernel: pps_core: Software ver. 5.3.6 -
Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
apr 09 16:19:42 <HOST> kernel: PTP clock support registered
apr 09 16:19:42 <HOST> kernel: snd_hda_intel 0000:c3:00.1: enabling
device (0000 -> 0002)
apr 09 16:19:42 <HOST> kernel: snd_hda_intel 0000:c3:00.1: Handle
vga_switcheroo audio client
apr 09 16:19:42 <HOST> kernel: snd_hda_intel 0000:c3:00.6: enabling
device (0000 -> 0002)
apr 09 16:19:42 <HOST> kernel: uvcvideo 1-1:1.2: Found UVC 1.50 device
Integrated Camera (04f2:b829)
apr 09 16:19:42 <HOST> kernel: amd-pmf AMDI0107:00: No Smart PC policy present
apr 09 16:19:42 <HOST> kernel: amd-pmf AMDI0107:00: registered PMF
device successfully
apr 09 16:19:42 <HOST> kernel: usbcore: registered new interface driver uvcvideo
apr 09 16:19:42 <HOST> kernel: snd_hda_intel 0000:c3:00.1: bound
0000:c3:00.0 (ops amdgpu_dm_audio_component_bind_ops [amdgpu])
apr 09 16:19:42 <HOST> kernel: input: HD-Audio Generic HDMI/DP,pcm=3
as /devices/pci0000:00/0000:00:08.1/0000:c3:00.1/sound/card0/input21
apr 09 16:19:42 <HOST> kernel: input: HD-Audio Generic HDMI/DP,pcm=7
as /devices/pci0000:00/0000:00:08.1/0000:c3:00.1/sound/card0/input22
apr 09 16:19:42 <HOST> kernel: input: HD-Audio Generic HDMI/DP,pcm=8
as /devices/pci0000:00/0000:00:08.1/0000:c3:00.1/sound/card0/input23
apr 09 16:19:42 <HOST> kernel: input: HD-Audio Generic HDMI/DP,pcm=9
as /devices/pci0000:00/0000:00:08.1/0000:c3:00.1/sound/card0/input24
apr 09 16:19:42 <HOST> kernel: input: SYNA2BA6:00 06CB:CF00 Mouse as
/devices/platform/AMDI0010:00/i2c-0/i2c-SYNA2BA6:00/0018:06CB:CF00.0005/input/input25
apr 09 16:19:42 <HOST> kernel: input: SYNA2BA6:00 06CB:CF00 Touchpad
as /devices/platform/AMDI0010:00/i2c-0/i2c-SYNA2BA6:00/0018:06CB:CF00.0005/input/input26
apr 09 16:19:42 <HOST> kernel: hid-multitouch 0018:06CB:CF00.0005:
input,hidraw2: I2C HID v1.00 Mouse [SYNA2BA6:00 06CB:CF00] on
i2c-SYNA2BA6:00
apr 09 16:19:42 <HOST> kernel: amd_atl: AMD Address Translation
Library initialized
apr 09 16:19:42 <HOST> kernel: intel_rapl_common: Found RAPL domain package
apr 09 16:19:42 <HOST> kernel: intel_rapl_common: Found RAPL domain core
apr 09 16:19:42 <HOST> kernel: snd_hda_codec_alc269 hdaudioC1D0:
ALC287: picked fixup  for PCI SSID 17aa:0000
apr 09 16:19:42 <HOST> kernel: snd_hda_codec_alc269 hdaudioC1D0:
autoconfig for ALC287: line_outs=1 (0x14/0x0/0x0/0x0/0x0) type:speaker
apr 09 16:19:42 <HOST> kernel: snd_hda_codec_alc269 hdaudioC1D0:
speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
apr 09 16:19:42 <HOST> kernel: snd_hda_codec_alc269 hdaudioC1D0:
hp_outs=1 (0x21/0x0/0x0/0x0/0x0)
apr 09 16:19:42 <HOST> kernel: snd_hda_codec_alc269 hdaudioC1D0:
mono: mono_out=0x0
apr 09 16:19:42 <HOST> kernel: snd_hda_codec_alc269 hdaudioC1D0:    inputs:
apr 09 16:19:42 <HOST> kernel: snd_hda_codec_alc269 hdaudioC1D0:      Mic=0x19
apr 09 16:19:42 <HOST> kernel: input: HD-Audio Generic Mic as
/devices/pci0000:00/0000:00:08.1/0000:c3:00.6/sound/card1/input28
apr 09 16:19:42 <HOST> kernel: input: HD-Audio Generic Headphone as
/devices/pci0000:00/0000:00:08.1/0000:c3:00.6/sound/card1/input29
apr 09 16:19:42 <HOST> kernel: iwlwifi 0000:c1:00.0:
WFPM_UMAC_PD_NOTIFICATION: 0x20
apr 09 16:19:42 <HOST> kernel: iwlwifi 0000:c1:00.0:
WFPM_LMAC2_PD_NOTIFICATION: 0x1f
apr 09 16:19:42 <HOST> kernel: iwlwifi 0000:c1:00.0: WFPM_AUTH_KEY_0: 0x90
apr 09 16:19:42 <HOST> kernel: iwlwifi 0000:c1:00.0: CNVI_SCU_SEQ_DATA_DW9: 0x0
apr 09 16:19:42 <HOST> kernel: iwlwifi 0000:c1:00.0: Detected RF GF,
rfid=0x10d000
apr 09 16:19:42 <HOST> kernel: iwlwifi 0000:c1:00.0: base HW address: <WLAN_MAC>
apr 09 16:19:43 <HOST> systemd-journald[589]: Received client request
to flush runtime journal.
apr 09 16:19:43 <HOST> kernel: Bluetooth: hci0: Waiting for firmware
download to complete
apr 09 16:19:43 <HOST> kernel: Bluetooth: hci0: Firmware loaded in 1080100 usecs
apr 09 16:19:43 <HOST> kernel: Bluetooth: hci0: Waiting for device to boot
apr 09 16:19:43 <HOST> kernel: Bluetooth: hci0: Device booted in 27116 usecs
apr 09 16:19:43 <HOST> kernel: Bluetooth: hci0: Found Intel DDC
parameters: intel/ibt-0041-0041.ddc
apr 09 16:19:43 <HOST> kernel: Bluetooth: hci0: Applying Intel DDC
parameters completed
apr 09 16:19:43 <HOST> kernel: Bluetooth: hci0: Firmware timestamp
2026.5 buildtype 1 build 82122
apr 09 16:19:43 <HOST> kernel: Bluetooth: hci0: Firmware SHA1: 0x2925677d
apr 09 16:19:43 <HOST> kernel: Bluetooth: hci0: Fseq status: Success (0x00)
apr 09 16:19:43 <HOST> kernel: Bluetooth: hci0: Fseq executed: 00.00.02.41
apr 09 16:19:43 <HOST> kernel: Bluetooth: hci0: Fseq BT Top: 00.00.02.41
apr 09 16:19:51 <HOST> kernel: Bluetooth: BNEP (Ethernet Emulation) ver 1.3
apr 09 16:19:51 <HOST> kernel: Bluetooth: BNEP filters: protocol multicast
apr 09 16:19:51 <HOST> kernel: Bluetooth: BNEP socket layer initialized
apr 09 16:19:51 <HOST> kernel: Bluetooth: MGMT ver 1.23
apr 09 16:19:51 <HOST> kernel: NET: Registered PF_ALG protocol family
apr 09 16:19:51 <HOST> kernel: iwlwifi 0000:c1:00.0:
WFPM_UMAC_PD_NOTIFICATION: 0x20
apr 09 16:19:51 <HOST> kernel: iwlwifi 0000:c1:00.0:
WFPM_LMAC2_PD_NOTIFICATION: 0x1f
apr 09 16:19:51 <HOST> kernel: iwlwifi 0000:c1:00.0: WFPM_AUTH_KEY_0: 0x90
apr 09 16:19:51 <HOST> kernel: iwlwifi 0000:c1:00.0: CNVI_SCU_SEQ_DATA_DW9: 0x0
apr 09 16:19:52 <HOST> kernel: iwlwifi 0000:c1:00.0:
WFPM_UMAC_PD_NOTIFICATION: 0x20
apr 09 16:19:52 <HOST> kernel: iwlwifi 0000:c1:00.0:
WFPM_LMAC2_PD_NOTIFICATION: 0x1f
apr 09 16:19:52 <HOST> kernel: iwlwifi 0000:c1:00.0: WFPM_AUTH_KEY_0: 0x90
apr 09 16:19:52 <HOST> kernel: iwlwifi 0000:c1:00.0: CNVI_SCU_SEQ_DATA_DW9: 0x0
apr 09 16:19:52 <HOST> kernel: Bluetooth: RFCOMM TTY layer initialized
apr 09 16:19:52 <HOST> kernel: Bluetooth: RFCOMM socket layer initialized
apr 09 16:19:52 <HOST> kernel: Bluetooth: RFCOMM ver 1.11
apr 09 16:19:53 <HOST> kernel: wlan0: authenticate with <AP_BSSID>
(local address=<WLAN_MAC>)
apr 09 16:19:53 <HOST> kernel: wlan0: send auth to <AP_BSSID> (try 1/3)
apr 09 16:19:53 <HOST> kernel: wlan0: authenticated
apr 09 16:19:53 <HOST> kernel: wlan0: associate with <AP_BSSID> (try 1/3)
apr 09 16:19:53 <HOST> kernel: wlan0: RX AssocResp from <AP_BSSID>
(capab=0x1011 status=0 aid=16)
apr 09 16:19:53 <HOST> kernel: wlan0: associated
apr 09 16:19:53 <HOST> kernel: wlan0: Limiting TX power to 30 (30 - 0)
dBm as advertised by <AP_BSSID>
apr 09 16:19:53 <HOST> systemd-journald[589]: Time jumped backwards, rotating.
apr 09 16:19:57 <HOST> kernel: ntfs3: Enabled Linux POSIX ACLs support
apr 09 16:19:57 <HOST> kernel: ntfs3: Read-only LZX/Xpress compression included
apr 09 16:19:57 <HOST> kernel: nvme nvme0: using unchecked data buffer
apr 09 16:19:57 <HOST> kernel: block nvme0n1: No UUID available
providing old NGUID
apr 09 16:19:58 <HOST> kernel: logitech-hidpp-device
0003:046D:404A.0004: HID++ 4.5 device connected.
apr 09 16:19:59 <HOST> kernel: warning: `kdeconnectd' uses wireless
extensions which will stop working for Wi-Fi 7 hardware; use nl80211
apr 09 16:19:59 <HOST> kernel: ideapad_acpi VPC2004:00:
conservation_mode attribute has been deprecated, see charge_types.
apr 09 16:23:09 <HOST> kernel: wlan0: deauthenticating from <AP_BSSID>
by local choice (Reason: 3=DEAUTH_LEAVING)
apr 09 16:23:10 <HOST> kernel: PM: suspend entry (s2idle)
apr 09 16:23:10 <HOST> kernel: Filesystems sync: 0.011 seconds
apr 09 16:23:37 <HOST> kernel: Freezing user space processes
apr 09 16:23:37 <HOST> kernel: Freezing user space processes completed
(elapsed 0.001 seconds)
apr 09 16:23:37 <HOST> kernel: OOM killer disabled.
apr 09 16:23:37 <HOST> kernel: Freezing remaining freezable tasks
apr 09 16:23:37 <HOST> kernel: Freezing remaining freezable tasks
completed (elapsed 0.001 seconds)
apr 09 16:23:37 <HOST> kernel: printk: Suspending console(s) (use
no_console_suspend to debug)
apr 09 16:23:37 <HOST> kernel: ACPI: EC: interrupt blocked
apr 09 16:23:37 <HOST> kernel: ACPI: EC: interrupt unblocked
apr 09 16:23:37 <HOST> kernel: [drm] PCIE GART of 512M enabled (table
at 0x000000807FB00000).
apr 09 16:23:37 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: SMU is resuming...
apr 09 16:23:37 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: SMU is
resumed successfully!
apr 09 16:23:37 <HOST> kernel: nvme nvme1: 16/0/0 default/read/poll queues
apr 09 16:23:37 <HOST> kernel: nvme nvme0: 16/0/0 default/read/poll queues
apr 09 16:23:37 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
gfx_0.0.0 uses VM inv eng 0 on hub 0
apr 09 16:23:37 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.0.0 uses VM inv eng 1 on hub 0
apr 09 16:23:37 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.1.0 uses VM inv eng 4 on hub 0
apr 09 16:23:37 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.2.0 uses VM inv eng 6 on hub 0
apr 09 16:23:37 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.3.0 uses VM inv eng 7 on hub 0
apr 09 16:23:37 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.0.1 uses VM inv eng 8 on hub 0
apr 09 16:23:37 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.1.1 uses VM inv eng 9 on hub 0
apr 09 16:23:37 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.2.1 uses VM inv eng 10 on hub 0
apr 09 16:23:37 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.3.1 uses VM inv eng 11 on hub 0
apr 09 16:23:37 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring sdma0
uses VM inv eng 12 on hub 0
apr 09 16:23:37 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
vcn_unified_0 uses VM inv eng 0 on hub 8
apr 09 16:23:37 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
jpeg_dec_0 uses VM inv eng 1 on hub 8
apr 09 16:23:37 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
mes_kiq_3.1.0 uses VM inv eng 13 on hub 0
apr 09 16:23:37 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring vpe
uses VM inv eng 4 on hub 8
apr 09 16:23:37 <HOST> kernel: OOM killer enabled.
apr 09 16:23:37 <HOST> kernel: Restarting tasks: Starting
apr 09 16:23:37 <HOST> kernel: Restarting tasks: Done
apr 09 16:23:37 <HOST> kernel: efivarfs: resyncing variable state
apr 09 16:23:37 <HOST> kernel: efivarfs: finished resyncing variable state
apr 09 16:23:37 <HOST> kernel: random: crng reseeded on system resumption
apr 09 16:23:37 <HOST> kernel: PM: suspend exit
apr 09 16:23:37 <HOST> kernel: iwlwifi 0000:c1:00.0:
WFPM_UMAC_PD_NOTIFICATION: 0x20
apr 09 16:23:37 <HOST> kernel: iwlwifi 0000:c1:00.0:
WFPM_LMAC2_PD_NOTIFICATION: 0x1f
apr 09 16:23:37 <HOST> kernel: iwlwifi 0000:c1:00.0: WFPM_AUTH_KEY_0: 0x90
apr 09 16:23:37 <HOST> kernel: iwlwifi 0000:c1:00.0: CNVI_SCU_SEQ_DATA_DW9: 0x0
apr 09 16:23:39 <HOST> kernel: wlan0: authenticate with <AP_BSSID>
(local address=<WLAN_MAC>)
apr 09 16:23:39 <HOST> kernel: wlan0: send auth to <AP_BSSID> (try 1/3)
apr 09 16:23:39 <HOST> kernel: wlan0: authenticated
apr 09 16:23:39 <HOST> kernel: wlan0: associate with <AP_BSSID> (try 1/3)
apr 09 16:23:39 <HOST> kernel: wlan0: RX AssocResp from <AP_BSSID>
(capab=0x1011 status=0 aid=8)
apr 09 16:23:39 <HOST> kernel: wlan0: associated
apr 09 16:23:39 <HOST> kernel: wlan0: Limiting TX power to 30 (30 - 0)
dBm as advertised by <AP_BSSID>
apr 09 16:24:09 <HOST> kernel: wlan0: deauthenticating from <AP_BSSID>
by local choice (Reason: 3=DEAUTH_LEAVING)
apr 09 16:24:10 <HOST> kernel: PM: suspend entry (s2idle)
apr 09 16:24:10 <HOST> kernel: Filesystems sync: 0.013 seconds
apr 09 16:24:14 <HOST> kernel: Freezing user space processes
apr 09 16:24:14 <HOST> kernel: Freezing user space processes completed
(elapsed 0.001 seconds)
apr 09 16:24:14 <HOST> kernel: OOM killer disabled.
apr 09 16:24:14 <HOST> kernel: Freezing remaining freezable tasks
apr 09 16:24:14 <HOST> kernel: Freezing remaining freezable tasks
completed (elapsed 0.000 seconds)
apr 09 16:24:14 <HOST> kernel: printk: Suspending console(s) (use
no_console_suspend to debug)
apr 09 16:24:14 <HOST> kernel: ACPI: EC: interrupt blocked
apr 09 16:24:14 <HOST> kernel: ACPI: EC: interrupt unblocked
apr 09 16:24:14 <HOST> kernel: [drm] PCIE GART of 512M enabled (table
at 0x000000807FB00000).
apr 09 16:24:14 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: SMU is resuming...
apr 09 16:24:14 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: SMU is
resumed successfully!
apr 09 16:24:14 <HOST> kernel: nvme nvme1: 16/0/0 default/read/poll queues
apr 09 16:24:14 <HOST> kernel: nvme nvme0: 16/0/0 default/read/poll queues
apr 09 16:24:14 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
gfx_0.0.0 uses VM inv eng 0 on hub 0
apr 09 16:24:14 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.0.0 uses VM inv eng 1 on hub 0
apr 09 16:24:14 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.1.0 uses VM inv eng 4 on hub 0
apr 09 16:24:14 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.2.0 uses VM inv eng 6 on hub 0
apr 09 16:24:14 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.3.0 uses VM inv eng 7 on hub 0
apr 09 16:24:14 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.0.1 uses VM inv eng 8 on hub 0
apr 09 16:24:14 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.1.1 uses VM inv eng 9 on hub 0
apr 09 16:24:14 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.2.1 uses VM inv eng 10 on hub 0
apr 09 16:24:14 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.3.1 uses VM inv eng 11 on hub 0
apr 09 16:24:14 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring sdma0
uses VM inv eng 12 on hub 0
apr 09 16:24:14 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
vcn_unified_0 uses VM inv eng 0 on hub 8
apr 09 16:24:14 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
jpeg_dec_0 uses VM inv eng 1 on hub 8
apr 09 16:24:14 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
mes_kiq_3.1.0 uses VM inv eng 13 on hub 0
apr 09 16:24:14 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring vpe
uses VM inv eng 4 on hub 8
apr 09 16:24:14 <HOST> kernel: OOM killer enabled.
apr 09 16:24:14 <HOST> kernel: Restarting tasks: Starting
apr 09 16:24:14 <HOST> kernel: Restarting tasks: Done
apr 09 16:24:14 <HOST> kernel: efivarfs: resyncing variable state
apr 09 16:24:14 <HOST> kernel: efivarfs: finished resyncing variable state
apr 09 16:24:14 <HOST> kernel: random: crng reseeded on system resumption
apr 09 16:24:14 <HOST> kernel: PM: suspend exit
apr 09 16:24:14 <HOST> kernel: iwlwifi 0000:c1:00.0:
WFPM_UMAC_PD_NOTIFICATION: 0x20
apr 09 16:24:14 <HOST> kernel: iwlwifi 0000:c1:00.0:
WFPM_LMAC2_PD_NOTIFICATION: 0x1f
apr 09 16:24:14 <HOST> kernel: iwlwifi 0000:c1:00.0: WFPM_AUTH_KEY_0: 0x90
apr 09 16:24:14 <HOST> kernel: iwlwifi 0000:c1:00.0: CNVI_SCU_SEQ_DATA_DW9: 0x0
apr 09 16:24:16 <HOST> kernel: wlan0: authenticate with <AP_BSSID>
(local address=<WLAN_MAC>)
apr 09 16:24:16 <HOST> kernel: wlan0: send auth to <AP_BSSID> (try 1/3)
apr 09 16:24:16 <HOST> kernel: wlan0: authenticated
apr 09 16:24:16 <HOST> kernel: wlan0: associate with <AP_BSSID> (try 1/3)
apr 09 16:24:16 <HOST> kernel: wlan0: RX AssocResp from <AP_BSSID>
(capab=0x1011 status=0 aid=9)
apr 09 16:24:16 <HOST> kernel: wlan0: associated
apr 09 16:24:16 <HOST> kernel: wlan0: Limiting TX power to 30 (30 - 0)
dBm as advertised by <AP_BSSID>
apr 09 16:24:33 <HOST> kernel: wlan0: deauthenticating from <AP_BSSID>
by local choice (Reason: 3=DEAUTH_LEAVING)
apr 09 16:24:34 <HOST> kernel: PM: suspend entry (s2idle)
apr 09 16:24:34 <HOST> kernel: Filesystems sync: 0.019 seconds
apr 09 16:24:54 <HOST> kernel: Freezing user space processes
apr 09 16:24:54 <HOST> kernel: Freezing user space processes completed
(elapsed 0.001 seconds)
apr 09 16:24:54 <HOST> kernel: OOM killer disabled.
apr 09 16:24:54 <HOST> kernel: Freezing remaining freezable tasks
apr 09 16:24:54 <HOST> kernel: Freezing remaining freezable tasks
completed (elapsed 0.001 seconds)
apr 09 16:24:54 <HOST> kernel: printk: Suspending console(s) (use
no_console_suspend to debug)
apr 09 16:24:54 <HOST> kernel: ACPI: EC: interrupt blocked
apr 09 16:24:54 <HOST> kernel: ACPI: EC: interrupt unblocked
apr 09 16:24:54 <HOST> kernel: pcieport 0000:00:02.1: broken device,
retraining non-functional downstream link at 2.5GT/s
apr 09 16:24:54 <HOST> kernel: pcieport 0000:00:02.1: retraining failed
apr 09 16:24:54 <HOST> kernel: pcieport 0000:00:02.1: Data Link Layer
Link Active not set in 100 msec
apr 09 16:24:54 <HOST> kernel: nvme nvme1: Disabling device after
reset failure: -19
apr 09 16:24:54 <HOST> kernel: [drm] PCIE GART of 512M enabled (table
at 0x000000807FB00000).
apr 09 16:24:54 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: SMU is resuming...
apr 09 16:24:54 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: SMU is
resumed successfully!
apr 09 16:24:54 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
gfx_0.0.0 uses VM inv eng 0 on hub 0
apr 09 16:24:54 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.0.0 uses VM inv eng 1 on hub 0
apr 09 16:24:54 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.1.0 uses VM inv eng 4 on hub 0
apr 09 16:24:54 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.2.0 uses VM inv eng 6 on hub 0
apr 09 16:24:54 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.3.0 uses VM inv eng 7 on hub 0
apr 09 16:24:54 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.0.1 uses VM inv eng 8 on hub 0
apr 09 16:24:54 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.1.1 uses VM inv eng 9 on hub 0
apr 09 16:24:54 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.2.1 uses VM inv eng 10 on hub 0
apr 09 16:24:54 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
comp_1.3.1 uses VM inv eng 11 on hub 0
apr 09 16:24:54 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring sdma0
uses VM inv eng 12 on hub 0
apr 09 16:24:54 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
vcn_unified_0 uses VM inv eng 0 on hub 8
apr 09 16:24:54 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
jpeg_dec_0 uses VM inv eng 1 on hub 8
apr 09 16:24:54 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring
mes_kiq_3.1.0 uses VM inv eng 13 on hub 0
apr 09 16:24:54 <HOST> kernel: amdgpu 0000:c3:00.0: amdgpu: ring vpe
uses VM inv eng 4 on hub 8
apr 09 16:24:54 <HOST> kernel: OOM killer enabled.
apr 09 16:24:54 <HOST> kernel: Restarting tasks: Starting
apr 09 16:24:54 <HOST> kernel: Restarting tasks: Done
apr 09 16:24:54 <HOST> kernel: efivarfs: resyncing variable state
apr 09 16:24:54 <HOST> kernel: efivarfs: finished resyncing variable state
apr 09 16:24:54 <HOST> kernel: random: crng reseeded on system resumption
apr 09 16:24:54 <HOST> kernel: PM: suspend exit
apr 09 16:24:54 <HOST> kernel: nvme nvme0: 16/0/0 default/read/poll queues
apr 09 16:24:55 <HOST> kernel: iwlwifi 0000:c1:00.0:
WFPM_UMAC_PD_NOTIFICATION: 0x20
apr 09 16:24:55 <HOST> kernel: iwlwifi 0000:c1:00.0:
WFPM_LMAC2_PD_NOTIFICATION: 0x1f
apr 09 16:24:55 <HOST> kernel: iwlwifi 0000:c1:00.0: WFPM_AUTH_KEY_0: 0x90
apr 09 16:24:55 <HOST> kernel: iwlwifi 0000:c1:00.0: CNVI_SCU_SEQ_DATA_DW9: 0x0
apr 09 16:24:56 <HOST> kernel: wlan0: authenticate with <AP_BSSID>
(local address=<WLAN_MAC>)
apr 09 16:24:56 <HOST> kernel: wlan0: send auth to <AP_BSSID> (try 1/3)
apr 09 16:24:56 <HOST> kernel: wlan0: authenticated
apr 09 16:24:56 <HOST> kernel: wlan0: associate with <AP_BSSID> (try 1/3)
apr 09 16:24:56 <HOST> kernel: wlan0: RX AssocResp from <AP_BSSID>
(capab=0x1011 status=0 aid=11)
apr 09 16:24:56 <HOST> kernel: wlan0: associated
apr 09 16:24:56 <HOST> kernel: wlan0: Limiting TX power to 30 (30 - 0)
dBm as advertised by <AP_BSSID>
apr 09 16:25:04 <HOST> kernel: ntfs3(nvme1n1p5): failed to read volume
at offset 0x10c000
apr 09 16:25:04 <HOST> kernel: ntfs3(nvme1n1p5): failed to read volume
at offset 0x10c000
apr 09 16:25:04 <HOST> kernel: ntfs3(nvme1n1p5): failed to read volume
at offset 0x10c000
apr 09 16:25:04 <HOST> kernel: ntfs3(nvme1n1p5): failed to read volume
at offset 0x10c000
apr 09 16:25:04 <HOST> kernel: ntfs3(nvme1n1p5): failed to read volume
at offset 0x10b000
apr 09 16:25:04 <HOST> kernel: ntfs3(nvme1n1p5): failed to read volume
at offset 0x10b000
apr 09 16:25:04 <HOST> kernel: ntfs3(nvme1n1p5): failed to read volume
at offset 0x10c000
apr 09 16:25:04 <HOST> kernel: ntfs3(nvme1n1p5): failed to read volume
at offset 0x10c000
apr 09 16:25:04 <HOST> kernel: ntfs3(nvme1n1p5): failed to read volume
at offset 0x10b000
apr 09 16:25:04 <HOST> kernel: ntfs3(nvme1n1p5): failed to read volume
at offset 0x10c000
apr 09 16:25:26 <HOST> kernel: ntfs3: 107 callbacks suppressed
apr 09 16:25:26 <HOST> kernel: ntfs3(nvme1n1p5): failed to read volume
at offset 0x10c000
apr 09 16:25:40 <HOST> kernel: nvme nvme1: Identify namespace failed (-5)


===== sysfs_bridge_power =====

### COMMAND: sh -c for\ f\ in\
/sys/bus/pci/devices/0000:00:02.1/power_state\
/sys/bus/pci/devices/0000:00:02.1/power/runtime_status\
/sys/bus/pci/devices/0000:00:02.1/d3cold_allowed\
/sys/bus/pci/devices/0000:00:02.1/power/control\;\ do\ echo\ \"##\
\$f\"\;\ cat\ \"\$f\"\;\ echo\;\ done

## /sys/bus/pci/devices/0000:00:02.1/power_state
D0

## /sys/bus/pci/devices/0000:00:02.1/power/runtime_status
active

## /sys/bus/pci/devices/0000:00:02.1/d3cold_allowed
1

## /sys/bus/pci/devices/0000:00:02.1/power/control
auto



===== sysfs_wd_power =====

### COMMAND: sh -c for\ f\ in\
/sys/bus/pci/devices/0000:bf:00.0/power_state\
/sys/bus/pci/devices/0000:bf:00.0/power/runtime_status\
/sys/bus/pci/devices/0000:bf:00.0/d3cold_allowed\
/sys/bus/pci/devices/0000:bf:00.0/power/control\;\ do\ echo\ \"##\
\$f\"\;\ cat\ \"\$f\"\;\ echo\;\ done

## /sys/bus/pci/devices/0000:bf:00.0/power_state
D3cold

## /sys/bus/pci/devices/0000:bf:00.0/power/runtime_status
active

## /sys/bus/pci/devices/0000:bf:00.0/d3cold_allowed
1

## /sys/bus/pci/devices/0000:bf:00.0/power/control
on



===== dmidecode_system =====

### COMMAND: sudo dmidecode -t system -t bios

# dmidecode 3.7
Getting SMBIOS data from sysfs.
SMBIOS 3.3.0 present.

Handle 0x0000, DMI type 0, 26 bytes
Platform Firmware Information
    Vendor: LENOVO
    Version: QKCN29WW
    Release Date: 12/23/2025
    ROM Size: 32 MiB
    Characteristics:
        PCI is supported
        PNP is supported
        Firmware is upgradeable
        Firmware shadowing is allowed
        Boot from CD is supported
        Selectable boot is supported
        EDD is supported
        ACPI is supported
        USB legacy is supported
        BIOS boot specification is supported
        Function key-initiated network boot is supported
        Targeted content distribution is supported
        UEFI is supported
    Platform Firmware Revision: 1.29
    Embedded Controller Firmware Revision: 1.29

Handle 0x0001, DMI type 1, 27 bytes
System Information
    Manufacturer: LENOVO
    Product Name: 83JL
    Version: IdeaPad Pro 5 14AKP10
    Serial Number: <SYSTEM_SERIAL>
    UUID: <DMI_UUID>
    Wake-up Type: Power Switch
    SKU Number: LENOVO_MT_83JL_BU_idea_FM_IdeaPad Pro 5 14AKP10
    Family: IdeaPad Pro 5 14AKP10

Handle 0x001B, DMI type 12, 5 bytes
System Configuration Options
    Option 1: String1 for Type12 Equipment Manufacturer
    Option 2: String2 for Type12 Equipment Manufacturer
    Option 3: String3 for Type12 Equipment Manufacturer
    Option 4: String4 for Type12 Equipment Manufacturer

Handle 0x001C, DMI type 13, 22 bytes
Firmware Language Information
    Language Description Format: Long
    Installable Languages: 4
        en|US|iso8859-1
        fr|FR|iso8859-1
        ja|JP|unicode
        zh|TW|unicode
    Currently Installed Language: en|US|iso8859-1

Handle 0x0030, DMI type 32, 11 bytes
System Boot Information
    Status: No errors detected





Il giorno gio 9 apr 2026 alle ore 21:05 Bjorn Helgaas
<helgaas@kernel.org> ha scritto:
> Providing the complete logs with private information redacted would be
> a good first step.

^ permalink raw reply

* Re: [PATCH] tools/power turbostat: Allow execution to continue after perf_l2_init() failure
From: Len Brown @ 2026-04-09 19:13 UTC (permalink / raw)
  To: David Arcari; +Cc: linux-pm, linux-kernel
In-Reply-To: <20260319140307.441950-1-darcari@redhat.com>

Hmm, the check of perf_model_support covers unknown CPUs.
(and this code runs fine on my Alderlake)

So the failure you see must be from the kernel perf support failing?
What is the kernel config?

thanks,
-Len

On Thu, Mar 19, 2026 at 10:04 AM David Arcari <darcari@redhat.com> wrote:
>
> Currently, if perf_l2_init() fails turbostat exits after issuing the
> following error (which was encountered on AlderLake):
>
> turbostat: perf_l2_init(cpu0, 0x0, 0xff24) REFS: Invalid argument
>
> This occurs because perf_l2_init() calls err(). However, the code has been
> written in such a manner that it is able to perform cleanup and continue.
> Therefore, this issue can be addressed by changing the appropriate calls
> to err() to warnx().
>
> Additionally, correct the PMU type arguments passed to the warning strings
> in the ecore and lcore blocks so the logs accurately reflect the failing
> counter type.
>
> Signed-off-by: David Arcari <darcari@redhat.com>
> Cc: Len Brown <lenb@kernel.org>
> Cc: linux-pm@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> ---
>  tools/power/x86/turbostat/turbostat.c | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
> index 1a2671c28209..f1b8059a4eec 100644
> --- a/tools/power/x86/turbostat/turbostat.c
> +++ b/tools/power/x86/turbostat/turbostat.c
> @@ -9403,13 +9403,13 @@ void perf_l2_init(void)
>                 if (!is_hybrid) {
>                         fd_l2_percpu[cpu] = open_perf_counter(cpu, perf_pmu_types.uniform, perf_model_support->first.refs, -1, PERF_FORMAT_GROUP);
>                         if (fd_l2_percpu[cpu] == -1) {
> -                               err(-1, "%s(cpu%d, 0x%x, 0x%llx) REFS", __func__, cpu, perf_pmu_types.uniform, perf_model_support->first.refs);
> +                               warnx("%s(cpu%d, 0x%x, 0x%llx) REFS", __func__, cpu, perf_pmu_types.uniform, perf_model_support->first.refs);
>                                 free_fd_l2_percpu();
>                                 return;
>                         }
>                         retval = open_perf_counter(cpu, perf_pmu_types.uniform, perf_model_support->first.hits, fd_l2_percpu[cpu], PERF_FORMAT_GROUP);
>                         if (retval == -1) {
> -                               err(-1, "%s(cpu%d, 0x%x, 0x%llx) HITS", __func__, cpu, perf_pmu_types.uniform, perf_model_support->first.hits);
> +                               warnx("%s(cpu%d, 0x%x, 0x%llx) HITS", __func__, cpu, perf_pmu_types.uniform, perf_model_support->first.hits);
>                                 free_fd_l2_percpu();
>                                 return;
>                         }
> @@ -9418,39 +9418,39 @@ void perf_l2_init(void)
>                 if (perf_pcore_set && CPU_ISSET_S(cpu, cpu_possible_setsize, perf_pcore_set)) {
>                         fd_l2_percpu[cpu] = open_perf_counter(cpu, perf_pmu_types.pcore, perf_model_support->first.refs, -1, PERF_FORMAT_GROUP);
>                         if (fd_l2_percpu[cpu] == -1) {
> -                               err(-1, "%s(cpu%d, 0x%x, 0x%llx) REFS", __func__, cpu, perf_pmu_types.pcore, perf_model_support->first.refs);
> +                               warnx("%s(cpu%d, 0x%x, 0x%llx) REFS", __func__, cpu, perf_pmu_types.pcore, perf_model_support->first.refs);
>                                 free_fd_l2_percpu();
>                                 return;
>                         }
>                         retval = open_perf_counter(cpu, perf_pmu_types.pcore, perf_model_support->first.hits, fd_l2_percpu[cpu], PERF_FORMAT_GROUP);
>                         if (retval == -1) {
> -                               err(-1, "%s(cpu%d, 0x%x, 0x%llx) HITS", __func__, cpu, perf_pmu_types.pcore, perf_model_support->first.hits);
> +                               warnx("%s(cpu%d, 0x%x, 0x%llx) HITS", __func__, cpu, perf_pmu_types.pcore, perf_model_support->first.hits);
>                                 free_fd_l2_percpu();
>                                 return;
>                         }
>                 } else if (perf_ecore_set && CPU_ISSET_S(cpu, cpu_possible_setsize, perf_ecore_set)) {
>                         fd_l2_percpu[cpu] = open_perf_counter(cpu, perf_pmu_types.ecore, perf_model_support->second.refs, -1, PERF_FORMAT_GROUP);
>                         if (fd_l2_percpu[cpu] == -1) {
> -                               err(-1, "%s(cpu%d, 0x%x, 0x%llx) REFS", __func__, cpu, perf_pmu_types.pcore, perf_model_support->second.refs);
> +                               warnx("%s(cpu%d, 0x%x, 0x%llx) REFS", __func__, cpu, perf_pmu_types.ecore, perf_model_support->second.refs);
>                                 free_fd_l2_percpu();
>                                 return;
>                         }
>                         retval = open_perf_counter(cpu, perf_pmu_types.ecore, perf_model_support->second.hits, fd_l2_percpu[cpu], PERF_FORMAT_GROUP);
>                         if (retval == -1) {
> -                               err(-1, "%s(cpu%d, 0x%x, 0x%llx) HITS", __func__, cpu, perf_pmu_types.pcore, perf_model_support->second.hits);
> +                               warnx("%s(cpu%d, 0x%x, 0x%llx) HITS", __func__, cpu, perf_pmu_types.ecore, perf_model_support->second.hits);
>                                 free_fd_l2_percpu();
>                                 return;
>                         }
>                 } else if (perf_lcore_set && CPU_ISSET_S(cpu, cpu_possible_setsize, perf_lcore_set)) {
>                         fd_l2_percpu[cpu] = open_perf_counter(cpu, perf_pmu_types.lcore, perf_model_support->third.refs, -1, PERF_FORMAT_GROUP);
>                         if (fd_l2_percpu[cpu] == -1) {
> -                               err(-1, "%s(cpu%d, 0x%x, 0x%llx) REFS", __func__, cpu, perf_pmu_types.pcore, perf_model_support->third.refs);
> +                               warnx("%s(cpu%d, 0x%x, 0x%llx) REFS", __func__, cpu, perf_pmu_types.lcore, perf_model_support->third.refs);
>                                 free_fd_l2_percpu();
>                                 return;
>                         }
>                         retval = open_perf_counter(cpu, perf_pmu_types.lcore, perf_model_support->third.hits, fd_l2_percpu[cpu], PERF_FORMAT_GROUP);
>                         if (retval == -1) {
> -                               err(-1, "%s(cpu%d, 0x%x, 0x%llx) HITS", __func__, cpu, perf_pmu_types.pcore, perf_model_support->third.hits);
> +                               warnx("%s(cpu%d, 0x%x, 0x%llx) HITS", __func__, cpu, perf_pmu_types.lcore, perf_model_support->third.hits);
>                                 free_fd_l2_percpu();
>                                 return;
>                         }
> --
> 2.53.0
>
>


-- 
Len Brown, Intel Open Source Technology Center

^ permalink raw reply

* Re: [BUG] Lenovo 83JL / WD SN7100S: intermittent loss of secondary NVMe after s2idle resume, root port 00:02.1 retraining fails
From: Bjorn Helgaas @ 2026-04-09 19:05 UTC (permalink / raw)
  To: Jacopo Labardi; +Cc: linux-nvme, linux-pci, linux-pm
In-Reply-To: <CANrGBMBDftu58R71jvEcZ94D8vJB2Y_dHG=BbNSsNMOS=3k0+g@mail.gmail.com>

On Thu, Apr 09, 2026 at 04:52:20PM +0200, Jacopo Labardi wrote:
> Hello,
> 
> I am reporting an intermittent suspend/resume failure on a Lenovo IdeaPad Pro 5
> 14AKP10 (machine type 83JL) where the secondary NVMe drive can become unusable
> after s2idle resume on Linux.
> ...

> I collected a local bundle containing:
> - full kernel log from the reproducer boot
> - systemd suspend log
> - lspci -nnvv for 0000:00:02.1 and 0000:bf:00.0
> - sysfs power-state snapshots
> - dmidecode output
> 
> The raw bundle contains machine serial/UUID, so I am not attaching it publicly
> as-is. I can provide redacted logs or specific files immediately if requested.

Providing the complete logs with private information redacted would be
a good first step.

^ permalink raw reply

* Re: [PATCH 00/61] treewide: Use IS_ERR_OR_NULL over manual NULL check - refactor
From: Al Viro @ 2026-04-09 18:16 UTC (permalink / raw)
  To: Philipp Hahn
  Cc: amd-gfx, apparmor, bpf, ceph-devel, cocci, dm-devel, dri-devel,
	gfs2, intel-gfx, intel-wired-lan, iommu, kvm, linux-arm-kernel,
	linux-block, linux-bluetooth, linux-btrfs, linux-cifs, linux-clk,
	linux-erofs, linux-ext4, linux-fsdevel, linux-gpio, linux-hyperv,
	linux-input, linux-kernel, linux-leds, linux-media, linux-mips,
	linux-mm, linux-modules, linux-mtd, linux-nfs, linux-omap,
	linux-phy, linux-pm, linux-rockchip, linux-s390, linux-scsi,
	linux-sctp, linux-security-module, linux-sh, linux-sound,
	linux-stm32, linux-trace-kernel, linux-usb, linux-wireless,
	netdev, ntfs3, samba-technical, sched-ext, target-devel,
	tipc-discussion, v9fs, Julia Lawall, Nicolas Palix, Chris Mason,
	David Sterba, Ilya Dryomov, Alex Markuze, Viacheslav Dubeyko,
	Theodore Ts'o, Andreas Dilger, Steve French, Paulo Alcantara,
	Ronnie Sahlberg, Shyam Prasad N, Tom Talpey, Bharath SM,
	Eric Van Hensbergen, Latchesar Ionkov, Dominique Martinet,
	Christian Schoenebeck, Gao Xiang, Chao Yu, Yue Hu, Jeffle Xu,
	Sandeep Dhavale, Hongbo Li, Chunhai Guo, Miklos Szeredi,
	Konstantin Komarov, Andreas Gruenbacher, Kees Cook, Tony Luck,
	Guilherme G. Piccoli, Jan Kara, Phillip Lougher,
	Christian Brauner, Jan Kara, Steven Rostedt, Masami Hiramatsu,
	Mathieu Desnoyers, Tejun Heo, David Vernet, Andrea Righi,
	Changwoo Min, Ingo Molnar, Peter Zijlstra, Juri Lelli,
	Vincent Guittot, Dietmar Eggemann, Ben Segall, Mel Gorman,
	Valentin Schneider, Luis Chamberlain, Petr Pavlu, Daniel Gomez,
	Sami Tolvanen, Aaron Tomlin, Sylwester Nawrocki, Liam Girdwood,
	Mark Brown, Jaroslav Kysela, Takashi Iwai, Max Filippov,
	Paolo Bonzini, John Johansen, Paul Moore, James Morris,
	Serge E. Hallyn, Andrew Morton, Alasdair Kergon, Mike Snitzer,
	Mikulas Patocka, Benjamin Marzinski, David S. Miller, David Ahern,
	Eric Dumazet, Jakub Kicinski, Paolo Abeni, Simon Horman,
	Marcel Holtmann, Johan Hedberg, Luiz Augusto von Dentz,
	Alexei Starovoitov, Daniel Borkmann, Jesper Dangaard Brouer,
	John Fastabend, Stanislav Fomichev, Jamal Hadi Salim, Jiri Pirko,
	Marcelo Ricardo Leitner, Xin Long, Trond Myklebust,
	Anna Schumaker, Chuck Lever, Jeff Layton, NeilBrown,
	Olga Kornievskaia, Dai Ngo, Jon Maloy, Johannes Berg,
	Catalin Marinas, Russell King, John Crispin, Thomas Bogendoerfer,
	Yoshinori Sato, Rich Felker, John Paul Adrian Glaubitz,
	Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart,
	Jonas Karlman, Jernej Skrabec, Maarten Lankhorst, Maxime Ripard,
	Thomas Zimmermann, David Airlie, Simona Vetter, Zhenyu Wang,
	Zhi Wang, Jani Nikula, Joonas Lahtinen, Rodrigo Vivi,
	Tvrtko Ursulin, Alex Deucher, Christian König, Sandy Huang,
	Heiko Stübner, Andy Yan, Igor Russkikh, Andrew Lunn,
	Pavan Chebbi, Michael Chan, Potnuri Bharat Teja, Tony Nguyen,
	Przemek Kitszel, Taras Chornyi, Maxime Coquelin, Alexandre Torgue,
	Iyappan Subramanian, Keyur Chudgar, Quan Nguyen, Heiner Kallweit,
	Marc Zyngier, Thomas Gleixner, Andrew Lunn, Gregory Clement,
	Sebastian Hesselbarth, Vinod Koul, Linus Walleij, Ulf Hansson,
	Heiko Carstens, Vasily Gorbik, Alexander Gordeev,
	Christian Borntraeger, Sven Schnelle, Martin K. Petersen,
	Eduardo Valentin, Keerthy, Rafael J. Wysocki, Daniel Lezcano,
	Zhang Rui, Lukasz Luba, Alex Williamson, Mark Greer,
	Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
	Shuah Khan, Kieran Bingham, Mauro Carvalho Chehab, Joerg Roedel,
	Will Deacon, Robin Murphy, Lee Jones, Pavel Machek, Dave Penkler,
	K. Y. Srinivasan, Haiyang Zhang, Wei Liu, Dexuan Cui, Long Li,
	Justin Sanders, Jens Axboe, Georgi Djakov, Michael Turquette,
	Stephen Boyd, Philipp Zabel, Borislav Petkov, Dave Hansen, x86,
	H. Peter Anvin, Pali Rohár, Dmitry Torokhov
In-Reply-To: <20260310-b4-is_err_or_null-v1-0-bd63b656022d@avm.de>

On Tue, Mar 10, 2026 at 12:48:26PM +0100, Philipp Hahn wrote:
> While doing some static code analysis I stumbled over a common pattern,
> where IS_ERR() is combined with a NULL check. For that there is
> IS_ERR_OR_NULL().

... and valid uses of IS_ERR_OR_NULL are rare as hen teeth.
Most of those are "I'm not sure how this function returns an
error, let's use that just in case".

Please, do not introduce more of that crap.

^ permalink raw reply

* Re: [patch V2 04/11] posix-timers: Handle the timer_[re]arm() return value
From: Frederic Weisbecker @ 2026-04-09 15:49 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Peter Zijlstra (Intel), Anna-Maria Behnsen, Calvin Owens,
	John Stultz, Stephen Boyd, Alexander Viro, Christian Brauner,
	Jan Kara, linux-fsdevel, Sebastian Reichel, linux-pm,
	Pablo Neira Ayuso, Florian Westphal, Phil Sutter, netfilter-devel,
	coreteam
In-Reply-To: <20260408114952.198028466@kernel.org>

Le Wed, Apr 08, 2026 at 01:54:01PM +0200, Thomas Gleixner a écrit :
> The [re]arm callbacks will return true when the timer was queued and false
> if it was already expired at enqueue time.
> 
> In both cases the call sites can trivially queue the signal right there,
> when the timer was already expired. That avoids a full round trip through
> the hrtimer interrupt.
> 
> Signed-off-by: Thomas Gleixner <tglx@kernel.org>
> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
> Cc: Anna-Maria Behnsen <anna-maria@linutronix.de>
> Cc: Frederic Weisbecker <frederic@kernel.org>

Reviewed-by: Frederic Weisbecker <frederic@kernel.org>

-- 
Frederic Weisbecker
SUSE Labs

^ permalink raw reply

* [GIT PULL] pmdomain fixes for v7.0-rc8
From: Ulf Hansson @ 2026-04-09 15:09 UTC (permalink / raw)
  To: Linus, linux-pm, linux-kernel; +Cc: Ulf Hansson, linux-arm-kernel

Hi Linus,

Here's a pull-request with a couple of pmdomain/firmware fixes intended for
v7.0-rc8. I have also included a patch to update my email in MAINTAINERS and
mailmap. Details about the highlights are as usual found in the signed tag.

Please pull this in!

Kind regards
Ulf Hansson


The following changes since commit 7aaa8047eafd0bd628065b15757d9b48c5f9c07d:

  Linux 7.0-rc6 (2026-03-29 15:40:00 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm.git tags/pmdomain-v7.0-rc6

for you to fetch changes up to c2812c0cb909211a1d2e7cec862406e32833b9de:

  MAINTAINERS, mailmap: Change Ulf Hansson's email (2026-04-07 14:17:48 +0200)

----------------------------------------------------------------
pmdomain providers:
 - imx: Prevent hang at power down for imx8mp-blk-ctrl

firmware:
 - thead: Fix buffer overflow for TH1520 AON driver

MAINTAINERS, mailmap:
 - Change Ulf Hansson's email

----------------------------------------------------------------
Jacky Bai (1):
      pmdomain: imx8mp-blk-ctrl: Keep the NOC_HDCP clock enabled

Michal Wilczynski (1):
      firmware: thead: Fix buffer overflow and use standard endian macros

Ulf Hansson (1):
      MAINTAINERS, mailmap: Change Ulf Hansson's email

 .mailmap                                        |  2 +
 MAINTAINERS                                     | 14 ++---
 drivers/firmware/thead,th1520-aon.c             |  7 +--
 drivers/pmdomain/imx/imx8mp-blk-ctrl.c          |  8 +--
 include/linux/firmware/thead/thead,th1520-aon.h | 74 -------------------------
 5 files changed, 13 insertions(+), 92 deletions(-)

^ permalink raw reply

* [BUG] Lenovo 83JL / WD SN7100S: intermittent loss of secondary NVMe after s2idle resume, root port 00:02.1 retraining fails
From: Jacopo Labardi @ 2026-04-09 14:52 UTC (permalink / raw)
  To: linux-nvme; +Cc: linux-pci, linux-pm

Hello,

I am reporting an intermittent suspend/resume failure on a Lenovo IdeaPad Pro 5
14AKP10 (machine type 83JL) where the secondary NVMe drive can become unusable
after s2idle resume on Linux.

I am CCing linux-nvme, linux-pci and linux-pm because the visible failure path
starts with PCIe root-port link retraining on 0000:00:02.1 during resume and
ends with nvme reset failure on the downstream device at 0000:bf:00.0.

Summary
- The problem is intermittent. It does not always happen on a fixed cycle.
- On this machine it may happen on the first resume or only after several
  suspend/resume cycles.
- The clean reproducer below failed on the third suspend/resume cycle, but that
  cycle count is not stable and should not be interpreted as deterministic.
- When it fails, the secondary/data NVMe is effectively lost until a full
  reboot.
- The system NVMe on 0000:c2:00.0 survives.

Hardware
- Laptop: Lenovo IdeaPad Pro 5 14AKP10 (83JL)
- BIOS: LENOVO QKCN29WW, release date 2025-12-23
- Platform: AMD Krackan / Ryzen AI 350
- Root port for failing device: 0000:00:02.1, AMD [1022:1126]
- System NVMe: Lexar NM790 2TB at 0000:c2:00.0
- Secondary/data NVMe: Sandisk/WD PC SN7100S M.2 2242 NVMe SSD (DRAM-less)
  [15b7:5044] at 0000:bf:00.0
- PCIe topology:
  0000:00:02.1 -> 0000:bf:00.0

Software
- Kernel for the clean reproducer: 6.19.11-arch1-1
- Kernel taint during reproducer: 0
- Sleep mode exposed by the platform on Linux: [s2idle]
- acpi_call-dkms is installed on disk, but the acpi_call module was not loaded
  during the reproducer and the kernel was not tainted
- Boot command line used for the clean reproducer:
  quiet nowatchdog rw rootflags=subvol=/@ rootfstype=btrfs
  root=UUID=<redacted> amd_pstate=active iommu=pt i8042.nopnp loglevel=3
  8250.nr_uarts=0 tpm_tis.interrupts=0 random.trust_cpu=on
  snd_hda_intel.power_save=10 snd_hda_intel.power_save_controller=Y

At boot on this kernel, both NVMe controllers log:
- nvme 0000:c2:00.0: platform quirk: setting simple suspend
- nvme 0000:bf:00.0: platform quirk: setting simple suspend

Clean reproduction used for this report
- No NVMe-specific udev overrides were active
- No custom NVMe-related systemd sleep hooks or suspend services were active
- No NVMe-specific kernel parameters were active

Reproducer
1. Boot the machine into 6.19.11-arch1-1.
2. Confirm tainted=0 and that both NVMe devices are present.
3. Suspend to s2idle and resume.
4. Repeat suspend/resume until the failure occurs.

Observed behavior
- In one clean run used for this report:
  - first cycle resumed successfully
  - second cycle resumed successfully
  - third cycle resumed with the WD drive lost
- In prior testing on the same machine, the failure sometimes happened on the
  first cycle and sometimes only after several cycles.

Relevant kernel log excerpt from the failing run
  Apr 09 16:24:34 kernel: PM: suspend entry (s2idle)
  Apr 09 16:24:54 kernel: pcieport 0000:00:02.1: broken device,
retraining non-functional downstream link at 2.5GT/s
  Apr 09 16:24:54 kernel: pcieport 0000:00:02.1: retraining failed
  Apr 09 16:24:54 kernel: pcieport 0000:00:02.1: Data Link Layer Link
Active not set in 100 msec
  Apr 09 16:24:54 kernel: nvme nvme1: Disabling device after reset failure: -19
  Apr 09 16:24:54 kernel: PM: suspend exit
  Apr 09 16:25:04 kernel: ntfs3(nvme1n1p5): failed to read volume at
offset 0x10c000
  Apr 09 16:25:26 kernel: ntfs3: 107 callbacks suppressed
  Apr 09 16:25:40 kernel: nvme nvme1: Identify namespace failed (-5)

State after the failure
- nvme list shows only the system Lexar drive; the WD is no longer listed
- lspci -nnvv -s bf:00.0 still shows the device, but with:
  - !!! Unknown header type 7f
  - Kernel driver in use: nvme
- sysfs state at collection time:
  - /sys/bus/pci/devices/0000:bf:00.0/power_state = D3cold
  - /sys/bus/pci/devices/0000:bf:00.0/power/runtime_status = active
  - /sys/bus/pci/devices/0000:bf:00.0/d3cold_allowed = 1
  - /sys/bus/pci/devices/0000:bf:00.0/power/control = on
  - /sys/bus/pci/devices/0000:00:02.1/power_state = D0
  - /sys/bus/pci/devices/0000:00:02.1/power/runtime_status = active
  - /sys/bus/pci/devices/0000:00:02.1/d3cold_allowed = 1
  - /sys/bus/pci/devices/0000:00:02.1/power/control = auto
- smartctl -x /dev/nvme1 failed with "Resource temporarily unavailable"

Expected behavior
- The secondary WD NVMe should resume normally and remain usable after s2idle.

Previous mitigation/debug attempts on the same machine
These are not part of the clean reproducer above; they are prior experiments
done to narrow the failure mode.

- The issue also reproduced while the machine was configured with
  pcie_aspm.policy=performance; removing that option did not eliminate it
- nvme_core.default_ps_max_latency_us=2000
  - no fix; failure still reproduced
- Force power/control=on and d3cold_allowed=0 on both 0000:00:02.1 and
  0000:bf:00.0
  - no fix; in failing runs the WD could still end up inaccessible / in D3cold
- pm_async=off
  - same failure mode
- SuspendState=freeze via systemd sleep configuration
  - ineffective on this platform; kernel still reported s2idle behavior and the
    issue remained
- nvme.noacpi=1
  - removed the "platform quirk: setting simple suspend" message, but resume
    often degraded into a black screen / forced reboot instead of fixing the WD
- pcie_port_pm=off
  - no usable fix; often resulted in black-screen resume / forced reboot
- pcie_ports=compat
  - no usable fix; often resulted in black-screen resume / forced reboot
- User-space suspend/resume hooks that tried unbind/bind/remove/rescan around
  the WD path
  - no reliable recovery; they only lengthened resume and still ended in reset
    failure / missing device

Additional context
- Linux on this machine exposes only s2idle.
- The issue was reproduced on multiple Linux distributions, not only one
  userspace/kernel packaging combination.
- Windows on the same hardware resumes correctly.
- I do not currently have a known-good Linux kernel version on this machine, so
  I am not claiming this is a regression in a specific upstream release.

I am not sure whether the underlying bug belongs primarily in nvme/pci, PCIe
power-management, or a platform/firmware interaction. The first failing
messages in the clean repro are from the root-port retraining path, which is
why I am CCing PCI/PM in addition to NVMe.

I collected a local bundle containing:
- full kernel log from the reproducer boot
- systemd suspend log
- lspci -nnvv for 0000:00:02.1 and 0000:bf:00.0
- sysfs power-state snapshots
- dmidecode output

The raw bundle contains machine serial/UUID, so I am not attaching it publicly
as-is. I can provide redacted logs or specific files immediately if requested.

If useful, I can also test additional debug options or a current mainline/-rc
kernel.

Thanks.

^ permalink raw reply

* [PATCH] thermal: renesas: rzg3e: Remove stale @trim_offset kernel-doc entry
From: John Madieu @ 2026-04-09 12:59 UTC (permalink / raw)
  To: rafael, daniel.lezcano
  Cc: rui.zhang, lukasz.luba, linux-pm, linux-kernel, linux-renesas-soc,
	Biju Das, Geert Uytterhoeven, John Madieu

The trim_offset field was removed from struct rzg3e_thermal_priv but
its kernel-doc entry was left behind. Remove it to fix the mismatch.

Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
---
 drivers/thermal/renesas/rzg3e_thermal.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/thermal/renesas/rzg3e_thermal.c b/drivers/thermal/renesas/rzg3e_thermal.c
index dde021e283b7..f0e29fe633db 100644
--- a/drivers/thermal/renesas/rzg3e_thermal.c
+++ b/drivers/thermal/renesas/rzg3e_thermal.c
@@ -93,7 +93,6 @@ struct rzg3e_thermal_info {
  * @info: chip type specific information
  * @trmval0: calibration value 0 (b)
  * @trmval1: calibration value 1 (c)
- * @trim_offset: offset for trim registers in syscon
  * @lock: protects hardware access during conversions
  */
 struct rzg3e_thermal_priv {
-- 
2.25.1


^ permalink raw reply related

* Re: [PATCH v2 0/7] thermal: samsung: Add support for Google GS101 TMU
From: Tudor Ambarus @ 2026-04-09 12:22 UTC (permalink / raw)
  To: Alexey Klimov, daniel.lezcano
  Cc: Rafael J. Wysocki, Zhang Rui, Lukasz Luba, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, Krzysztof Kozlowski,
	Alim Akhtar, Bartlomiej Zolnierkiewicz, Kees Cook,
	Gustavo A. R. Silva, Peter Griffin, André Draszik,
	willmcvicker, jyescas, shin.son, linux-samsung-soc, linux-kernel,
	linux-pm, devicetree, linux-arm-kernel, linux-hardening
In-Reply-To: <DHNUUPQPD5DR.18P18VV0LNTI8@linaro.org>



On 4/8/26 5:49 PM, Alexey Klimov wrote:
> On Mon Jan 19, 2026 at 12:08 PM GMT, Tudor Ambarus wrote:
>> Add support for the Thermal Management Unit (TMU) on the Google GS101
>> SoC.
>>
>> The GS101 TMU implementation utilizes a hybrid architecture where
>> management is shared between the kernel and the Alive Clock and
>> Power Manager (ACPM) firmware.
> 
> Do you plan to update or work on this series? If, by some reason,

I'd like to resubmit, but I got derailed by other tasks.

> this series is postphoned I can rebase it and re-send, for example.
> IIRC it needs a clean rebase as a minimial change.
> 

No, it's more than that. When I talked with Daniel about this driver, he
suggested I shall really focus on using the .set_trips callback instead of
.set_trip_temp. I'm not sure if it's possible given the static nature of
the ACPM interface. So it needs a bit of investigation, which I couldn't
do lately.

If we can go initially with .set_trip_temp and then come up with an iterative
patch about .set_trips, I can of course respin, it takes me just a few
minutes to rebase and test. But it's Daniel to decide.

Oh, and the device tree needs a little update on the trip points, but other
than that, we're good to go.

Cheers,
ta

^ permalink raw reply

* [PATCH v2 2/2] cpufreq: governor: Fix stale prev_cpu_nice spike when enabling ignore_nice_load
From: Zhongqiu Han @ 2026-04-09 11:14 UTC (permalink / raw)
  To: rafael, viresh.kumar
  Cc: venkatesh.pallipadi, davej, trenn, linux-pm, linux-kernel,
	zhongqiu.han
In-Reply-To: <20260409111407.9775-1-zhongqiu.han@oss.qualcomm.com>

When ignore_nice_load is toggled from 0 to 1 via sysfs, dbs_update()
may run concurrently and observe the new tunable value while
prev_cpu_nice still holds a stale baseline, producing a spurious
massive idle_time that results in an incorrect CPU load value.

The root cause is that prev_cpu_nice is only updated inside dbs_update()
when ignore_nice is true.  While ignore_nice is false, prev_cpu_nice is
never advanced, so it accumulates an unbounded debt of nice CPU time.
The moment ignore_nice is flipped to 1, the very next dbs_update() call
computes:

  idle_time += cur_nice - j_cdbs->prev_cpu_nice

where prev_cpu_nice is stale (possibly 0 if never updated since boot),
making idle_time artificially large.

The race can be illustrated with two concurrent paths:

Path A (sysfs write, holds attr_set->update_lock):

  governor_store()
    mutex_lock(&attr_set->update_lock)
    ignore_nice_load_store()
      dbs_data->ignore_nice_load = 1              /* (A1) */
      gov_update_cpu_data(dbs_data)
        mutex_lock(&policy_dbs->update_mutex)     /* (A2) */
          j_cdbs->prev_cpu_nice = kcpustat_field(...)
        mutex_unlock(&policy_dbs->update_mutex)
    mutex_unlock(&attr_set->update_lock)

Path B (work queue, wins the race between A1 and A2):

  dbs_work_handler()
    mutex_lock(&policy_dbs->update_mutex)         /* acquired before A2 */
    dbs_update()
      ignore_nice = dbs_data->ignore_nice_load    /* sees new value: 1 */
      cur_nice = kcpustat_field(...)
      idle_time += cur_nice - j_cdbs->prev_cpu_nice /* stale */
      j_cdbs->prev_cpu_nice = cur_nice
    mutex_unlock(&policy_dbs->update_mutex)

Note that even without the race, the anomaly occurs deterministically
on the very first dbs_update() call after ignore_nice_load is enabled,
because prev_cpu_nice has never been updated while ignore_nice was 0.
The race only widens the window in which the stale read can happen.

Fix this by unconditionally sampling cur_nice and advancing prev_cpu_nice
in dbs_update() on every call, regardless of ignore_nice.  With
prev_cpu_nice always reflecting the most recent sample, enabling
ignore_nice_load can never produce a stale-baseline spike: the delta
will always be the nice time accumulated in the last sampling interval,
not since boot.

As a consequence of always tracking prev_cpu_nice:

  - gov_update_cpu_data() no longer needs to reset prev_cpu_nice when
    ignore_nice_load changes; remove that conditional.
  - cpufreq_dbs_governor_start() must unconditionally initialize
    prev_cpu_nice so the very first dbs_update() has a valid baseline;
    remove the ignore_nice guard and the now-unused ignore_nice variable.
  - ignore_nice_load_store() no longer needs to call gov_update_cpu_data()
    at all (prev_cpu_nice is always current); remove that call.

Fixes: ee88415caf736b ("[CPUFREQ] Cleanup locking in conservative governor")
Fixes: 5a75c82828e7c0 ("[CPUFREQ] Cleanup locking in ondemand governor")
Signed-off-by: Zhongqiu Han <zhongqiu.han@oss.qualcomm.com>
---
 drivers/cpufreq/cpufreq_conservative.c |  3 ---
 drivers/cpufreq/cpufreq_governor.c     | 28 +++++++++++++++++---------
 drivers/cpufreq/cpufreq_ondemand.c     |  3 ---
 3 files changed, 18 insertions(+), 16 deletions(-)

diff --git a/drivers/cpufreq/cpufreq_conservative.c b/drivers/cpufreq/cpufreq_conservative.c
index df01d33993d8..5c316d2d3ddd 100644
--- a/drivers/cpufreq/cpufreq_conservative.c
+++ b/drivers/cpufreq/cpufreq_conservative.c
@@ -213,9 +213,6 @@ static ssize_t ignore_nice_load_store(struct gov_attr_set *attr_set,
 
 	dbs_data->ignore_nice_load = input;
 
-	/* we need to re-evaluate prev_cpu_idle */
-	gov_update_cpu_data(dbs_data);
-
 	return count;
 }
 
diff --git a/drivers/cpufreq/cpufreq_governor.c b/drivers/cpufreq/cpufreq_governor.c
index c0d419c95609..cfbfa5d8bb36 100644
--- a/drivers/cpufreq/cpufreq_governor.c
+++ b/drivers/cpufreq/cpufreq_governor.c
@@ -92,6 +92,12 @@ EXPORT_SYMBOL_GPL(sampling_rate_store);
  *
  * Call under the @dbs_data->attr_set.update_lock. The per-policy
  * update_mutex is acquired and released internally for each policy.
+ *
+ * Note: prev_cpu_nice is intentionally not reset here. dbs_update() tracks
+ * prev_cpu_nice unconditionally on every sample, so it is always current.
+ * Resetting it here is therefore unnecessary and would only introduce a
+ * one-sample spike if a concurrent dbs_update() ran between the reset and
+ * the next sample.
  */
 void gov_update_cpu_data(struct dbs_data *dbs_data)
 {
@@ -106,8 +112,6 @@ void gov_update_cpu_data(struct dbs_data *dbs_data)
 
 			j_cdbs->prev_cpu_idle = get_cpu_idle_time(j, &j_cdbs->prev_update_time,
 								  dbs_data->io_is_busy);
-			if (dbs_data->ignore_nice_load)
-				j_cdbs->prev_cpu_nice = kcpustat_field(&kcpustat_cpu(j), CPUTIME_NICE, j);
 		}
 		mutex_unlock(&policy_dbs->update_mutex);
 	}
@@ -167,12 +171,18 @@ unsigned int dbs_update(struct cpufreq_policy *policy)
 
 		j_cdbs->prev_cpu_idle = cur_idle_time;
 
-		if (ignore_nice) {
-			u64 cur_nice = kcpustat_field(&kcpustat_cpu(j), CPUTIME_NICE, j);
+		/*
+		 * Always sample cur_nice and advance prev_cpu_nice, regardless
+		 * of ignore_nice.  This keeps prev_cpu_nice current so that
+		 * enabling ignore_nice_load via sysfs never produces a
+		 * stale-baseline spike (the delta will be at most one sampling
+		 * interval of accumulated nice time, not since boot).
+		 */
+		u64 cur_nice = kcpustat_field(&kcpustat_cpu(j), CPUTIME_NICE, j);
 
+		if (ignore_nice)
 			idle_time += div_u64(cur_nice - j_cdbs->prev_cpu_nice, NSEC_PER_USEC);
-			j_cdbs->prev_cpu_nice = cur_nice;
-		}
+		j_cdbs->prev_cpu_nice = cur_nice;
 
 		if (unlikely(!time_elapsed)) {
 			/*
@@ -519,7 +529,7 @@ int cpufreq_dbs_governor_start(struct cpufreq_policy *policy)
 	struct dbs_governor *gov = dbs_governor_of(policy);
 	struct policy_dbs_info *policy_dbs = policy->governor_data;
 	struct dbs_data *dbs_data = policy_dbs->dbs_data;
-	unsigned int sampling_rate, ignore_nice, j;
+	unsigned int sampling_rate, j;
 	unsigned int io_busy;
 
 	if (!policy->cur)
@@ -529,7 +539,6 @@ int cpufreq_dbs_governor_start(struct cpufreq_policy *policy)
 	policy_dbs->rate_mult = 1;
 
 	sampling_rate = dbs_data->sampling_rate;
-	ignore_nice = dbs_data->ignore_nice_load;
 	io_busy = dbs_data->io_is_busy;
 
 	mutex_lock(&policy_dbs->update_mutex);
@@ -542,8 +551,7 @@ int cpufreq_dbs_governor_start(struct cpufreq_policy *policy)
 		 */
 		j_cdbs->prev_load = 0;
 
-		if (ignore_nice)
-			j_cdbs->prev_cpu_nice = kcpustat_field(&kcpustat_cpu(j), CPUTIME_NICE, j);
+		j_cdbs->prev_cpu_nice = kcpustat_field(&kcpustat_cpu(j), CPUTIME_NICE, j);
 	}
 	mutex_unlock(&policy_dbs->update_mutex);
 
diff --git a/drivers/cpufreq/cpufreq_ondemand.c b/drivers/cpufreq/cpufreq_ondemand.c
index 9942dbb38dae..d8d843183c21 100644
--- a/drivers/cpufreq/cpufreq_ondemand.c
+++ b/drivers/cpufreq/cpufreq_ondemand.c
@@ -261,9 +261,6 @@ static ssize_t ignore_nice_load_store(struct gov_attr_set *attr_set,
 	}
 	dbs_data->ignore_nice_load = input;
 
-	/* we need to re-evaluate prev_cpu_idle */
-	gov_update_cpu_data(dbs_data);
-
 	return count;
 }
 
-- 
2.43.0


^ permalink raw reply related

* [PATCH v2 1/2] cpufreq: governor: Fix race between sysfs store and dbs work handler
From: Zhongqiu Han @ 2026-04-09 11:14 UTC (permalink / raw)
  To: rafael, viresh.kumar
  Cc: venkatesh.pallipadi, davej, trenn, linux-pm, linux-kernel,
	zhongqiu.han
In-Reply-To: <20260409111407.9775-1-zhongqiu.han@oss.qualcomm.com>

gov_update_cpu_data() resets per-CPU prev_cpu_idle and prev_cpu_nice
for every CPU in the governed domain. It is called from sysfs store
callbacks (e.g. ignore_nice_load_store) which run under
attr_set->update_lock, held by the surrounding governor_store().

Concurrently, dbs_work_handler() calls gov->gov_dbs_update() (which
calls dbs_update()) under policy_dbs->update_mutex. dbs_update() both
reads and writes the same prev_cpu_idle / prev_cpu_nice fields. The
potential race path is:

Path A (sysfs write, holds attr_set->update_lock only):

  governor_store()
    mutex_lock(&attr_set->update_lock)
    ignore_nice_load_store()
      dbs_data->ignore_nice_load = input
      gov_update_cpu_data(dbs_data)
        list_for_each_entry(policy_dbs, ...)
          for_each_cpu(j, ...)
            j_cdbs->prev_cpu_idle = get_cpu_idle_time(...)  /* write */
            j_cdbs->prev_cpu_nice = kcpustat_field(...)     /* write */
    mutex_unlock(&attr_set->update_lock)

Path B (work queue, holds policy_dbs->update_mutex only):

  dbs_work_handler()
    mutex_lock(&policy_dbs->update_mutex)
    gov->gov_dbs_update(policy)
      dbs_update()
        for_each_cpu(j, policy->cpus)
          idle_time = cur - j_cdbs->prev_cpu_idle           /* read  */
          j_cdbs->prev_cpu_idle = cur_idle_time             /* write */
          idle_time += cur_nice - j_cdbs->prev_cpu_nice     /* read  */
          j_cdbs->prev_cpu_nice = cur_nice                  /* write */
    mutex_unlock(&policy_dbs->update_mutex)

Because attr_set->update_lock and policy_dbs->update_mutex are two
completely independent locks, the two paths are not mutually exclusive.
This results in a data race on cpu_dbs_info.prev_cpu_idle and
cpu_dbs_info.prev_cpu_nice.

Fix this by also acquiring policy_dbs->update_mutex in
gov_update_cpu_data() for each policy, so that path A participates in
the mutual exclusion already established by dbs_work_handler(). Also
update the function comment to accurately reflect the two-level locking
contract.

Additionally, cpufreq_dbs_governor_start() initializes prev_cpu_idle
and prev_cpu_nice without holding policy_dbs->update_mutex. After
cpufreq_dbs_governor_init() returns, the new policy is already visible
in attr_set->policy_list and sysfs attributes are accessible. A
concurrent sysfs write can therefore call gov_update_cpu_data() and
race with the initialization loop on the same u64 fields. Fix this by
holding policy_dbs->update_mutex around the initialization loop in
cpufreq_dbs_governor_start() as well.

The root of this race dates back to the original ondemand/conservative
governors. Before commit ee88415caf73 ("[CPUFREQ] Cleanup locking in
conservative governor") and commit 5a75c82828e7 ("[CPUFREQ] Cleanup
locking in ondemand governor"), all accesses to prev_cpu_idle and
prev_cpu_nice in cpufreq_governor_dbs() (path X), store_ignore_nice_load()
(path Y), and do_dbs_timer() (path Z) were serialised by the same
dbs_mutex, so no race existed. Those two commits switched do_dbs_timer()
from dbs_mutex to a per-policy/per-cpu timer_mutex to reduce lock
contention, but left store_ignore_nice_load() still holding dbs_mutex.
As a result, path Y (store) and path Z (do_dbs_timer) no longer shared a
common lock, introducing a potential race on prev_cpu_idle/prev_cpu_nice
between store_ignore_nice_load() and dbs_check_cpu().

Commit 326c86deaed54a ("[CPUFREQ] Remove unneeded locks") then removed
dbs_mutex from store_ignore_nice_load() entirely, introducing an
additional potential race between store_ignore_nice_load() (path Y, now
lockless) and cpufreq_governor_dbs() (path X, still holding dbs_mutex),
while the race between path Y and path Z remained.

Fixes: ee88415caf736b ("[CPUFREQ] Cleanup locking in conservative governor")
Fixes: 5a75c82828e7c0 ("[CPUFREQ] Cleanup locking in ondemand governor")
Fixes: 326c86deaed54a ("[CPUFREQ] Remove unneeded locks")
Signed-off-by: Zhongqiu Han <zhongqiu.han@oss.qualcomm.com>
---
 drivers/cpufreq/cpufreq_governor.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/cpufreq/cpufreq_governor.c b/drivers/cpufreq/cpufreq_governor.c
index 86f35e451914..c0d419c95609 100644
--- a/drivers/cpufreq/cpufreq_governor.c
+++ b/drivers/cpufreq/cpufreq_governor.c
@@ -90,7 +90,8 @@ EXPORT_SYMBOL_GPL(sampling_rate_store);
  * (that may be a single policy or a bunch of them if governor tunables are
  * system-wide).
  *
- * Call under the @dbs_data mutex.
+ * Call under the @dbs_data->attr_set.update_lock. The per-policy
+ * update_mutex is acquired and released internally for each policy.
  */
 void gov_update_cpu_data(struct dbs_data *dbs_data)
 {
@@ -99,6 +100,7 @@ void gov_update_cpu_data(struct dbs_data *dbs_data)
 	list_for_each_entry(policy_dbs, &dbs_data->attr_set.policy_list, list) {
 		unsigned int j;
 
+		mutex_lock(&policy_dbs->update_mutex);
 		for_each_cpu(j, policy_dbs->policy->cpus) {
 			struct cpu_dbs_info *j_cdbs = &per_cpu(cpu_dbs, j);
 
@@ -107,6 +109,7 @@ void gov_update_cpu_data(struct dbs_data *dbs_data)
 			if (dbs_data->ignore_nice_load)
 				j_cdbs->prev_cpu_nice = kcpustat_field(&kcpustat_cpu(j), CPUTIME_NICE, j);
 		}
+		mutex_unlock(&policy_dbs->update_mutex);
 	}
 }
 EXPORT_SYMBOL_GPL(gov_update_cpu_data);
@@ -529,6 +532,7 @@ int cpufreq_dbs_governor_start(struct cpufreq_policy *policy)
 	ignore_nice = dbs_data->ignore_nice_load;
 	io_busy = dbs_data->io_is_busy;
 
+	mutex_lock(&policy_dbs->update_mutex);
 	for_each_cpu(j, policy->cpus) {
 		struct cpu_dbs_info *j_cdbs = &per_cpu(cpu_dbs, j);
 
@@ -541,6 +545,7 @@ int cpufreq_dbs_governor_start(struct cpufreq_policy *policy)
 		if (ignore_nice)
 			j_cdbs->prev_cpu_nice = kcpustat_field(&kcpustat_cpu(j), CPUTIME_NICE, j);
 	}
+	mutex_unlock(&policy_dbs->update_mutex);
 
 	gov->start(policy);
 
-- 
2.43.0


^ permalink raw reply related

* [PATCH v2 0/2] cpufreq: governor: Fix races and stale baseline on prev_cpu_nice
From: Zhongqiu Han @ 2026-04-09 11:14 UTC (permalink / raw)
  To: rafael, viresh.kumar
  Cc: venkatesh.pallipadi, davej, trenn, linux-pm, linux-kernel,
	zhongqiu.han

Patch 1 fixes a data race between sysfs store callbacks and the DBS
work handler.  gov_update_cpu_data() writes prev_cpu_idle and
prev_cpu_nice while holding only attr_set->update_lock, whereas
dbs_update() reads and writes the same fields while holding only
policy_dbs->update_mutex.  Because these are independent locks, the
two paths are not mutually exclusive.  The fix acquires
policy_dbs->update_mutex inside gov_update_cpu_data() for each
policy, and also holds it around the initialization loop in
cpufreq_dbs_governor_start() to close a similar window against
concurrent sysfs writes.

Patch 2 fixes a stale-baseline spike on prev_cpu_nice that occurs
when ignore_nice_load is enabled via sysfs.  Because prev_cpu_nice
is only advanced in dbs_update() when ignore_nice is true, it
accumulates an unbounded debt of nice CPU time while ignore_nice is
false.  The moment ignore_nice_load is flipped to 1, the next
dbs_update() computes a massive idle_time delta against the stale
baseline, producing an incorrect CPU load value.  The fix
unconditionally samples and advances prev_cpu_nice on every
dbs_update() call, regardless of ignore_nice, so the baseline is
always current.  As a consequence, the prev_cpu_nice reset in
gov_update_cpu_data() and the gov_update_cpu_data() call in
ignore_nice_load_store() are no longer needed and are removed.

Changelog:
- Update linux-next base
- Based on v1 review, patch 1 is updated to add the missing
  protection around cpufreq_dbs_governor_start(), and patch 2/2 is added.
- Link to v1: https://lore.kernel.org/all/20260406110113.3475920-1-zhongqiu.han@oss.qualcomm.com/


Zhongqiu Han (2):
  cpufreq: governor: Fix race between sysfs store and dbs work handler
  cpufreq: governor: Fix stale prev_cpu_nice spike when enabling
    ignore_nice_load

 drivers/cpufreq/cpufreq_conservative.c |  3 ---
 drivers/cpufreq/cpufreq_governor.c     | 35 ++++++++++++++++++--------
 drivers/cpufreq/cpufreq_ondemand.c     |  3 ---
 3 files changed, 24 insertions(+), 17 deletions(-)


base-commit: f3e6330d7fe42b204af05a2dbc68b379e0ad179e
-- 
2.43.0


^ permalink raw reply

* Re: [patch V2 03/11] posix-timers: Expand timer_[re]arm() callbacks with a boolean return value
From: Frederic Weisbecker @ 2026-04-09  9:28 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Peter Zijlstra (Intel), John Stultz, Stephen Boyd,
	Anna-Maria Behnsen, Calvin Owens, Alexander Viro,
	Christian Brauner, Jan Kara, linux-fsdevel, Sebastian Reichel,
	linux-pm, Pablo Neira Ayuso, Florian Westphal, Phil Sutter,
	netfilter-devel, coreteam
In-Reply-To: <20260408114952.130222296@kernel.org>

Le Wed, Apr 08, 2026 at 01:53:56PM +0200, Thomas Gleixner a écrit :
> In order to catch expiry times which are already in the past the
> timer_arm() and timer_rearm() callbacks need to be able to report back to
> the caller whether the timer has been queued or not.
> 
> Change the function signature and let all implementations return true for
> now. While at it simplify posix_cpu_timer_rearm().
> 
> No functional change intended.
> 
> Signed-off-by: Thomas Gleixner <tglx@kernel.org>
> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
> Acked-by: John Stultz <jstultz@google.com>
> Cc: Stephen Boyd <sboyd@kernel.org>
> Cc: Anna-Maria Behnsen <anna-maria@linutronix.de>
> Cc: Frederic Weisbecker <frederic@kernel.org>

Reviewed-by: Frederic Weisbecker <frederic@kernel.org>

-- 
Frederic Weisbecker
SUSE Labs

^ permalink raw reply

* [PATCH v3 2/2] pmdomain: imx: Fix i.MX8MP VC8000E power up sequence
From: Peng Fan (OSS) @ 2026-04-09  8:07 UTC (permalink / raw)
  To: Ulf Hansson, Frank Li, Sascha Hauer, Pengutronix Kernel Team,
	Fabio Estevam, Daniel Baluta
  Cc: linux-pm, imx, linux-arm-kernel, linux-kernel, Peng Fan, stable
In-Reply-To: <20260409-imx8mp-vc8000e-pm-v3-0-3e023eaa245b@nxp.com>

From: Peng Fan <peng.fan@nxp.com>

Per errata[1]:
ERR050531: VPU_NOC power down handshake may hang during VC8000E/VPUMIX
power up/down cycling.
Description: VC8000E reset de-assertion edge and AXI clock may have a
timing issue.
Workaround: Set bit2 (vc8000e_clk_en) of BLK_CLK_EN_CSR to 0 to gate off
both AXI clock and VC8000E clock sent to VC8000E and AXI clock sent to
VPU_NOC m_v_2 interface during VC8000E power up(VC8000E reset is
de-asserted by HW)

Add a bool variable is_errata_err050531 in
'struct imx8m_blk_ctrl_domain_data' to represent whether the workaround
is needed. If is_errata_err050531 is true, first clear the clk before
powering up gpc, then enable the clk after powering up gpc.

[1] https://www.nxp.com/webapp/Download?colCode=IMX8MP_1P33A

Fixes: a1a5f15f7f6cb ("soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU blk ctrl")
Cc: stable@vger.kernel.org
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/pmdomain/imx/imx8m-blk-ctrl.c | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/pmdomain/imx/imx8m-blk-ctrl.c b/drivers/pmdomain/imx/imx8m-blk-ctrl.c
index e13a47eeed75d7189aa15370a7bee4cceb05a1d6..1cd0a22ce3e533358dd7449da9989162b36c5fe6 100644
--- a/drivers/pmdomain/imx/imx8m-blk-ctrl.c
+++ b/drivers/pmdomain/imx/imx8m-blk-ctrl.c
@@ -54,6 +54,15 @@ struct imx8m_blk_ctrl_domain_data {
 	 * register.
 	 */
 	u32 mipi_phy_rst_mask;
+
+	/*
+	 * VC8000E reset de-assertion edge and AXI clock may have a timing issue.
+	 * Workaround: Set bit2 (vc8000e_clk_en) of BLK_CLK_EN_CSR to 0 to gate off
+	 * both AXI clock and VC8000E clock sent to VC8000E and AXI clock sent to
+	 * VPU_NOC m_v_2 interface during VC8000E power up(VC8000E reset is
+	 * de-asserted by HW)
+	 */
+	bool is_errata_err050531;
 };
 
 #define DOMAIN_MAX_CLKS 4
@@ -108,7 +117,11 @@ static int imx8m_blk_ctrl_power_on(struct generic_pm_domain *genpd)
 		dev_err(bc->dev, "failed to enable clocks\n");
 		goto bus_put;
 	}
-	regmap_set_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
+
+	if (data->is_errata_err050531)
+		regmap_clear_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
+	else
+		regmap_set_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
 
 	/* power up upstream GPC domain */
 	ret = pm_runtime_get_sync(domain->power_dev);
@@ -117,6 +130,9 @@ static int imx8m_blk_ctrl_power_on(struct generic_pm_domain *genpd)
 		goto clk_disable;
 	}
 
+	if (data->is_errata_err050531)
+		regmap_set_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
+
 	/* wait for reset to propagate */
 	udelay(5);
 

-- 
2.37.1


^ permalink raw reply related

* [PATCH v3 1/2] pmdomain: imx: Fix i.MX8MP power notifier
From: Peng Fan (OSS) @ 2026-04-09  8:07 UTC (permalink / raw)
  To: Ulf Hansson, Frank Li, Sascha Hauer, Pengutronix Kernel Team,
	Fabio Estevam, Daniel Baluta
  Cc: linux-pm, imx, linux-arm-kernel, linux-kernel, Peng Fan, stable
In-Reply-To: <20260409-imx8mp-vc8000e-pm-v3-0-3e023eaa245b@nxp.com>

From: Peng Fan <peng.fan@nxp.com>

Using imx8mm_vpu_power_notifier() for i.MX8MP is wrong, as it ungates
the VPU clocks to provide the ADB clock, which is necessary on i.MX8MM,
but on i.MX8MP there is a separate gate (bit 3) for the NoC. So add
imx8mp_vpu_power_notifier() for i.MX8MP.

Fixes: a1a5f15f7f6cb ("soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU blk ctrl")
Cc: stable@vger.kernel.org
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/pmdomain/imx/imx8m-blk-ctrl.c | 27 ++++++++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

diff --git a/drivers/pmdomain/imx/imx8m-blk-ctrl.c b/drivers/pmdomain/imx/imx8m-blk-ctrl.c
index 19e992d2ee3b845bc9382bcd494a5d96f9c6ac44..e13a47eeed75d7189aa15370a7bee4cceb05a1d6 100644
--- a/drivers/pmdomain/imx/imx8m-blk-ctrl.c
+++ b/drivers/pmdomain/imx/imx8m-blk-ctrl.c
@@ -514,9 +514,34 @@ static const struct imx8m_blk_ctrl_domain_data imx8mp_vpu_blk_ctl_domain_data[]
 	},
 };
 
+static int imx8mp_vpu_power_notifier(struct notifier_block *nb,
+				     unsigned long action, void *data)
+{
+	struct imx8m_blk_ctrl *bc = container_of(nb, struct imx8m_blk_ctrl,
+						 power_nb);
+
+	if (action == GENPD_NOTIFY_ON) {
+		/*
+		 * On power up we have no software backchannel to the GPC to
+		 * wait for the ADB handshake to happen, so we just delay for a
+		 * bit. On power down the GPC driver waits for the handshake.
+		 */
+
+		udelay(5);
+
+		/* set "fuse" bits to enable the VPUs */
+		regmap_set_bits(bc->regmap, 0x8, 0xffffffff);
+		regmap_set_bits(bc->regmap, 0xc, 0xffffffff);
+		regmap_set_bits(bc->regmap, 0x10, 0xffffffff);
+		regmap_set_bits(bc->regmap, 0x14, 0xffffffff);
+	}
+
+	return NOTIFY_OK;
+}
+
 static const struct imx8m_blk_ctrl_data imx8mp_vpu_blk_ctl_dev_data = {
 	.max_reg = 0x18,
-	.power_notifier_fn = imx8mm_vpu_power_notifier,
+	.power_notifier_fn = imx8mp_vpu_power_notifier,
 	.domains = imx8mp_vpu_blk_ctl_domain_data,
 	.num_domains = ARRAY_SIZE(imx8mp_vpu_blk_ctl_domain_data),
 };

-- 
2.37.1


^ permalink raw reply related

* [PATCH v3 0/2] pmdomain: imx: Fix i.MX8MP VC8000E power up sequence
From: Peng Fan (OSS) @ 2026-04-09  8:07 UTC (permalink / raw)
  To: Ulf Hansson, Frank Li, Sascha Hauer, Pengutronix Kernel Team,
	Fabio Estevam, Daniel Baluta
  Cc: linux-pm, imx, linux-arm-kernel, linux-kernel, Peng Fan, stable

There is an errata for i.MX8MP VC8000E:
    ERR050531: VPU_NOC power down handshake may hang during VC8000E/VPUMIX
    power up/down cycling.
    Description: VC8000E reset de-assertion edge and AXI clock may have a
    timing issue.
    Workaround: Set bit2 (vc8000e_clk_en) of BLK_CLK_EN_CSR to 0 to gate off
    both AXI clock and VC8000E clock sent to VC8000E and AXI clock sent to
    VPU_NOC m_v_2 interface during VC8000E power up(VC8000E reset is
    de-asserted by HW)

This patchset is to fix the errata. More info could be found in each
patch commit.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
Changes in v3:
- Separate power up notifier fix into patch 1
- Link to v2: https://lore.kernel.org/r/20260228-imx8mp-vc8000e-pm-v2-1-fd255a0d5958@nxp.com

Changes in v2:
- Add errata link in commit message
- Add comment for is_errata_err050531
- Link to v1: https://lore.kernel.org/r/20260128-imx8mp-vc8000e-pm-v1-1-6c171451c732@nxp.com

---
Peng Fan (2):
      pmdomain: imx: Fix i.MX8MP power notifier
      pmdomain: imx: Fix i.MX8MP VC8000E power up sequence

 drivers/pmdomain/imx/imx8m-blk-ctrl.c | 45 +++++++++++++++++++++++++++++++++--
 1 file changed, 43 insertions(+), 2 deletions(-)
---
base-commit: b3ab9a7b9b32806b1b68c4fe7d5298702195eb3a
change-id: 20260128-imx8mp-vc8000e-pm-4278e6d48b54

Best regards,
-- 
Peng Fan <peng.fan@nxp.com>


^ permalink raw reply

* Re: [PATCH V10 4/4] thermal: qcom: add support for PMIC5 Gen3 ADC thermal monitoring
From: Daniel Lezcano @ 2026-04-09  6:12 UTC (permalink / raw)
  To: Jishnu Prakash
  Cc: jic23, robh, krzk+dt, conor+dt, agross, andersson, lumag,
	dmitry.baryshkov, konradybcio, daniel.lezcano, sboyd, amitk,
	thara.gopinath, lee, rafael, subbaraman.narayanamurthy,
	david.collins, anjelique.melendez, kamal.wadhwa, rui.zhang,
	lukasz.luba, devicetree, linux-arm-msm, linux-iio, linux-kernel,
	linux-pm, cros-qcom-dts-watchers, quic_kotarake, neil.armstrong,
	stephan.gerhold
In-Reply-To: <20260130115421.2197892-5-jishnu.prakash@oss.qualcomm.com>

On Fri, Jan 30, 2026 at 05:24:21PM +0530, Jishnu Prakash wrote:
> Add support for ADC_TM part of PMIC5 Gen3.
> 
> This is an auxiliary driver under the Gen3 ADC driver, which implements the
> threshold setting and interrupt generating functionalities of QCOM ADC_TM
> drivers, used to support thermal trip points.
> 
> Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
> ---
> Changes since v9:
> - Replaced the break statement within scoped_guard() in tm_handler_work() with
>   return statement to fix the error reported by kernel test robot.
> 
> Changes since v8:
> - Made following changes to address Dmitry's comment to use module_auxiliary_driver():
>   - Dropped the wrapper struct containing the auxiliary driver (struct adc_tm5_auxiliary_drv)
>     which was originally meant to expose the TM interrupt callback to be called by
>     main driver and replaced it with standalone definition of the auxiliary_driver struct.
>   - Added call to adc5_gen3_register_tm_event_notifier() in probe to initialize the
>     TM callback for main driver.
>   - Replaced the module_init() and module_exit() calls with module_auxiliary_driver().
> - Made following changes to address Jonathan's comments:
>   - Updated header files included in drivers/thermal/qcom/qcom-spmi-adc-tm5-gen3.c
>     to follow IWYU (include-what-you-use) principles.
>   - Added a DEFINE_GUARD() definition for mutex lock/unlock functions and replaced
>     their existing calls with guard() and scoped_guard() statements using this definition.
>   - Moved some variable declarations in tm_handler_work() to inside the for() loop.
>   - Fixed if() check condition for low_temp in adc_tm5_gen3_set_trip_temp().
> - Dropped the wrapper function adc_tm5_gen3_disable_channel() around
>   _adc_tm5_gen3_disable_channel() as it only calls the inner function with no other actions.
> - Replaced a pr_debug() call with dev_dbg() in tm_handler_work().
> 
> Changes since v7:
> - Addressed following comments from Jonathan:
>   - Replaced {0} with { } in tm_handler_work()
>   - Simplified logic for setting upper_set and lower_set into
>     a single line each, in tm_handler_work()
>   - Cleaned up local variable declarations and high/low threshold
>     check in adc_tm5_gen3_configure()
>   - Moved cleanup action to disable all ADC_TM channels to probe
>     end and added comment to describe it.
>   - Fixed { } formatting in adctm5_auxiliary_id_table[].
> 
> Changes since v6:
> - Addressed following comments from Jonathan:
>   - Added error check for devm_thermal_add_hwmon_sysfs() call.
>   - Used local variable `dev` in multiple places in adc_tm5_probe().
>     in place of `&aux_dev->dev` and `adc_tm5->dev`.
>   - Added a comment to explain cleanup action calling adc5_gen3_clear_work()
>     near probe end.
>   - Fixed return statement at probe end to return last called API's
>     return value directly.
> 
> Changes since v5:
> - Addressed following comments from Jonathan:
>   - Corrected all files to follow kernel-doc formatting fully.
>   - Cleaned up formatting in struct definitions.
>   - Used sizeof() to specify length in register read/write calls
>     instead of using integers directly.
>   - Added comments in adc_tm5_probe() for skipping first SDAM for
>     IRQ request and for usage of auxiliary_set_drvdata().
>   - Corrected line wrap length driver file.
>   - Moved INIT_WORK() and auxiliary_set_drvdata() to earlier
>     locations to ensure they are ready when needed.
> 
> Changes since v4:
> - Fixed a compilation error and updated dependencies in config as suggested
>   by Krzysztof.
> 
>  drivers/thermal/qcom/Kconfig                  |   9 +
>  drivers/thermal/qcom/Makefile                 |   1 +
>  drivers/thermal/qcom/qcom-spmi-adc-tm5-gen3.c | 512 ++++++++++++++++++
>  3 files changed, 522 insertions(+)
>  create mode 100644 drivers/thermal/qcom/qcom-spmi-adc-tm5-gen3.c
> 
> diff --git a/drivers/thermal/qcom/Kconfig b/drivers/thermal/qcom/Kconfig
> index a6bb01082ec6..1acb11e4ac80 100644
> --- a/drivers/thermal/qcom/Kconfig
> +++ b/drivers/thermal/qcom/Kconfig
> @@ -21,6 +21,15 @@ config QCOM_SPMI_ADC_TM5
>  	  Thermal client sets threshold temperature for both warm and cool and
>  	  gets updated when a threshold is reached.
>  
> +config QCOM_SPMI_ADC_TM5_GEN3
> +	tristate "Qualcomm SPMI PMIC Thermal Monitor ADC5 Gen3"
> +	depends on QCOM_SPMI_ADC5_GEN3
> +	help
> +	  This enables the auxiliary thermal driver for the ADC5 Gen3 thermal
> +	  monitoring device. It shows up as a thermal zone with multiple trip points.
> +	  Thermal client sets threshold temperature for both warm and cool and
> +	  gets updated when a threshold is reached.
> +
>  config QCOM_SPMI_TEMP_ALARM
>  	tristate "Qualcomm SPMI PMIC Temperature Alarm"
>  	depends on OF && SPMI && IIO
> diff --git a/drivers/thermal/qcom/Makefile b/drivers/thermal/qcom/Makefile
> index 0fa2512042e7..828d9e7bc797 100644
> --- a/drivers/thermal/qcom/Makefile
> +++ b/drivers/thermal/qcom/Makefile
> @@ -4,5 +4,6 @@ obj-$(CONFIG_QCOM_TSENS)	+= qcom_tsens.o
>  qcom_tsens-y			+= tsens.o tsens-v2.o tsens-v1.o tsens-v0_1.o \
>  				   tsens-8960.o
>  obj-$(CONFIG_QCOM_SPMI_ADC_TM5)	+= qcom-spmi-adc-tm5.o
> +obj-$(CONFIG_QCOM_SPMI_ADC_TM5_GEN3)	+= qcom-spmi-adc-tm5-gen3.o
>  obj-$(CONFIG_QCOM_SPMI_TEMP_ALARM)	+= qcom-spmi-temp-alarm.o
>  obj-$(CONFIG_QCOM_LMH)		+= lmh.o
> diff --git a/drivers/thermal/qcom/qcom-spmi-adc-tm5-gen3.c b/drivers/thermal/qcom/qcom-spmi-adc-tm5-gen3.c
> new file mode 100644
> index 000000000000..882355d6606d
> --- /dev/null
> +++ b/drivers/thermal/qcom/qcom-spmi-adc-tm5-gen3.c
> @@ -0,0 +1,512 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + */
> +
> +#include <linux/auxiliary_bus.h>
> +#include <linux/bitfield.h>
> +#include <linux/bits.h>
> +#include <linux/cleanup.h>
> +#include <linux/container_of.h>
> +#include <linux/device.h>
> +#include <linux/device/devres.h>
> +#include <linux/dev_printk.h>
> +#include <linux/err.h>
> +#include <linux/iio/adc/qcom-adc5-gen3-common.h>
> +#include <linux/interrupt.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/thermal.h>
> +#include <linux/types.h>
> +#include <linux/workqueue.h>
> +#include <linux/unaligned.h>
> +
> +#include "../thermal_hwmon.h"
> +
> +struct adc_tm5_gen3_chip;
> +
> +/**
> + * struct adc_tm5_gen3_channel_props - ADC_TM channel structure
> + * @timer: time period of recurring TM measurement.
> + * @tm_chan_index: TM channel number used (ranging from 1-7).
> + * @sdam_index: SDAM on which this TM channel lies.
> + * @common_props: structure with common  ADC channel properties.
> + * @high_thr_en: TM high threshold crossing detection enabled.
> + * @low_thr_en: TM low threshold crossing detection enabled.
> + * @chip: ADC TM device.
> + * @tzd: pointer to thermal device corresponding to TM channel.
> + * @last_temp: last temperature that caused threshold violation,
> + *	or a thermal TM channel.
> + * @last_temp_set: indicates if last_temp is stored.
> + */
> +struct adc_tm5_gen3_channel_props {
> +	unsigned int timer;
> +	unsigned int tm_chan_index;
> +	unsigned int sdam_index;
> +	struct adc5_channel_common_prop common_props;
> +	bool high_thr_en;
> +	bool low_thr_en;
> +	struct adc_tm5_gen3_chip *chip;
> +	struct thermal_zone_device *tzd;
> +	int last_temp;
> +	bool last_temp_set;
> +};
> +
> +/**
> + * struct adc_tm5_gen3_chip - ADC Thermal Monitoring device structure
> + * @dev_data: Top-level ADC device data.
> + * @chan_props: Array of ADC_TM channel structures.
> + * @nchannels: number of TM channels allocated
> + * @dev: SPMI ADC5 Gen3 device.
> + * @tm_handler_work: handler for TM interrupt for threshold violation.
> + */
> +struct adc_tm5_gen3_chip {
> +	struct adc5_device_data *dev_data;
> +	struct adc_tm5_gen3_channel_props *chan_props;
> +	unsigned int nchannels;
> +	struct device *dev;
> +	struct work_struct tm_handler_work;
> +};
> +
> +DEFINE_GUARD(adc5_gen3, struct adc_tm5_gen3_chip *, adc5_gen3_mutex_lock(_T->dev),
> +	     adc5_gen3_mutex_unlock(_T->dev))
> +
> +static int get_sdam_from_irq(struct adc_tm5_gen3_chip *adc_tm5, int irq)
> +{
> +	int i;
> +
> +	for (i = 0; i < adc_tm5->dev_data->num_sdams; i++) {
> +		if (adc_tm5->dev_data->base[i].irq == irq)
> +			return i;
> +	}
> +	return -ENOENT;
> +}
> +
> +static irqreturn_t adctm5_gen3_isr(int irq, void *dev_id)
> +{
> +	struct adc_tm5_gen3_chip *adc_tm5 = dev_id;
> +	int ret, sdam_num;
> +	u8 tm_status[2];
> +	u8 status, val;
> +
> +	sdam_num = get_sdam_from_irq(adc_tm5, irq);
> +	if (sdam_num < 0) {
> +		dev_err(adc_tm5->dev, "adc irq %d not associated with an sdam\n",
> +			irq);
> +		return IRQ_HANDLED;
> +	}
> +
> +	ret = adc5_gen3_read(adc_tm5->dev_data, sdam_num, ADC5_GEN3_STATUS1,
> +			     &status, sizeof(status));
> +	if (ret) {
> +		dev_err(adc_tm5->dev, "adc read status1 failed with %d\n", ret);
> +		return IRQ_HANDLED;
> +	}
> +
> +	if (status & ADC5_GEN3_STATUS1_CONV_FAULT) {
> +		dev_err_ratelimited(adc_tm5->dev,
> +				    "Unexpected conversion fault, status:%#x\n",
> +				    status);
> +		val = ADC5_GEN3_CONV_ERR_CLR_REQ;
> +		adc5_gen3_status_clear(adc_tm5->dev_data, sdam_num,
> +				       ADC5_GEN3_CONV_ERR_CLR, &val, 1);
> +		return IRQ_HANDLED;
> +	}
> +
> +	ret = adc5_gen3_read(adc_tm5->dev_data, sdam_num, ADC5_GEN3_TM_HIGH_STS,
> +			     tm_status, sizeof(tm_status));
> +	if (ret) {
> +		dev_err(adc_tm5->dev, "adc read TM status failed with %d\n", ret);
> +		return IRQ_HANDLED;
> +	}
> +
> +	if (tm_status[0] || tm_status[1])
> +		schedule_work(&adc_tm5->tm_handler_work);
> +
> +	dev_dbg(adc_tm5->dev, "Interrupt status:%#x, high:%#x, low:%#x\n",
> +		status, tm_status[0], tm_status[1]);
> +
> +	return IRQ_HANDLED;

This ISR routine should be revisited:

 - no error message inside

 - use a shared interrupt to split what is handled by the ADC and the
    TM drivers

 - do not return IRQ_HANDLED in case of error (cf. irqreturn.h doc)

 - do not use a dedicated workqueue but the threaded mechanism of the irq

> +}
> +
> +static int adc5_gen3_tm_status_check(struct adc_tm5_gen3_chip *adc_tm5,
> +				     int sdam_index, u8 *tm_status, u8 *buf)
> +{
> +	int ret;
> +
> +	ret = adc5_gen3_read(adc_tm5->dev_data, sdam_index, ADC5_GEN3_TM_HIGH_STS,
> +			     tm_status, 2);
> +	if (ret) {
> +		dev_err(adc_tm5->dev, "adc read TM status failed with %d\n", ret);
> +		return ret;
> +	}
> +
> +	ret = adc5_gen3_status_clear(adc_tm5->dev_data, sdam_index, ADC5_GEN3_TM_HIGH_STS_CLR,
> +				     tm_status, 2);
> +	if (ret) {
> +		dev_err(adc_tm5->dev, "adc status clear conv_req failed with %d\n",
> +			ret);
> +		return ret;
> +	}
> +
> +	ret = adc5_gen3_read(adc_tm5->dev_data, sdam_index, ADC5_GEN3_CH_DATA0(0),
> +			     buf, 16);
> +	if (ret)
> +		dev_err(adc_tm5->dev, "adc read data failed with %d\n", ret);
> +
> +	return ret;
> +}
> +
> +static void tm_handler_work(struct work_struct *work)
> +{
> +	struct adc_tm5_gen3_chip *adc_tm5 = container_of(work, struct adc_tm5_gen3_chip,
> +							 tm_handler_work);
> +	int sdam_index = -1;
> +	u8 tm_status[2] = { };
> +	u8 buf[16] = { };
> +
> +	for (int i = 0; i < adc_tm5->nchannels; i++) {
> +		struct adc_tm5_gen3_channel_props *chan_prop = &adc_tm5->chan_props[i];
> +		int offset = chan_prop->tm_chan_index;
> +		bool upper_set, lower_set;
> +		int ret, temp;
> +		u16 code;
> +
> +		scoped_guard(adc5_gen3, adc_tm5) {
> +			if (chan_prop->sdam_index != sdam_index) {
> +				sdam_index = chan_prop->sdam_index;
> +				ret = adc5_gen3_tm_status_check(adc_tm5, sdam_index,
> +								tm_status, buf);
> +				if (ret)
> +					return;
> +			}
> +
> +			upper_set = ((tm_status[0] & BIT(offset)) && chan_prop->high_thr_en);
> +			lower_set = ((tm_status[1] & BIT(offset)) && chan_prop->low_thr_en);
> +		}
> +
> +		if (!(upper_set || lower_set))
> +			continue;
> +
> +		code = get_unaligned_le16(&buf[2 * offset]);
> +		dev_dbg(adc_tm5->dev, "ADC_TM threshold code:%#x\n", code);

Please avoid debug traces when possible

> +		ret = adc5_gen3_therm_code_to_temp(adc_tm5->dev,
> +						   &chan_prop->common_props,
> +						   code, &temp);
> +		if (ret) {
> +			dev_err(adc_tm5->dev,
> +				"Invalid temperature reading, ret = %d, code=%#x\n",
> +				ret, code);

And avoid error traces in the runtime path

> +			continue;
> +		}
> +
> +		chan_prop->last_temp = temp;
> +		chan_prop->last_temp_set = true;
> +		thermal_zone_device_update(chan_prop->tzd, THERMAL_TRIP_VIOLATED);
> +	}
> +}
> +
> +static int adc_tm5_gen3_get_temp(struct thermal_zone_device *tz, int *temp)
> +{
> +	struct adc_tm5_gen3_channel_props *prop = thermal_zone_device_priv(tz);
> +	struct adc_tm5_gen3_chip *adc_tm5;
> +
> +	if (!prop || !prop->chip)
> +		return -EINVAL;
> +
> +	adc_tm5 = prop->chip;
> +
> +	if (prop->last_temp_set) {
> +		pr_debug("last_temp: %d\n", prop->last_temp);
> +		prop->last_temp_set = false;
> +		*temp = prop->last_temp;
> +		return 0;
> +	}

Why do you need to do that?

The temperature should reflect the current situation even if the
reading was triggered by a thermal trip violation.

> +
> +	return adc5_gen3_get_scaled_reading(adc_tm5->dev, &prop->common_props,
> +					    temp);
> +}
> +
> +static int adc_tm5_gen3_disable_channel(struct adc_tm5_gen3_channel_props *prop)
> +{
> +	struct adc_tm5_gen3_chip *adc_tm5 = prop->chip;
> +	int ret;
> +	u8 val;
> +
> +	prop->high_thr_en = false;
> +	prop->low_thr_en = false;
> +
> +	ret = adc5_gen3_poll_wait_hs(adc_tm5->dev_data, prop->sdam_index);
> +	if (ret)
> +		return ret;
> +
> +	val = BIT(prop->tm_chan_index);
> +	ret = adc5_gen3_write(adc_tm5->dev_data, prop->sdam_index,
> +			      ADC5_GEN3_TM_HIGH_STS_CLR, &val, sizeof(val));
> +	if (ret)
> +		return ret;
> +
> +	val = MEAS_INT_DISABLE;
> +	ret = adc5_gen3_write(adc_tm5->dev_data, prop->sdam_index,
> +			      ADC5_GEN3_TIMER_SEL, &val, sizeof(val));
> +	if (ret)
> +		return ret;
> +
> +	/* To indicate there is an actual conversion request */
> +	val = ADC5_GEN3_CHAN_CONV_REQ | prop->tm_chan_index;
> +	ret = adc5_gen3_write(adc_tm5->dev_data, prop->sdam_index,
> +			      ADC5_GEN3_PERPH_CH, &val, sizeof(val));
> +	if (ret)
> +		return ret;
> +
> +	val = ADC5_GEN3_CONV_REQ_REQ;
> +	return adc5_gen3_write(adc_tm5->dev_data, prop->sdam_index,
> +			       ADC5_GEN3_CONV_REQ, &val, sizeof(val));
> +}
> +
> +#define ADC_TM5_GEN3_CONFIG_REGS 12

Please define at the top of the file

> +static int adc_tm5_gen3_configure(struct adc_tm5_gen3_channel_props *prop,
> +				  int low_temp, int high_temp)
> +{
> +	struct adc_tm5_gen3_chip *adc_tm5 = prop->chip;
> +	u8 buf[ADC_TM5_GEN3_CONFIG_REGS];
> +	u8 conv_req;
> +	u16 adc_code;
> +	int ret;
> +
> +	ret = adc5_gen3_poll_wait_hs(adc_tm5->dev_data, prop->sdam_index);
> +	if (ret < 0)
> +		return ret;
> +
> +	ret = adc5_gen3_read(adc_tm5->dev_data, prop->sdam_index,
> +			     ADC5_GEN3_SID, buf, sizeof(buf));
> +	if (ret < 0)
> +		return ret;
> +
> +	/* Write SID */
> +	buf[0] = FIELD_PREP(ADC5_GEN3_SID_MASK, prop->common_props.sid);
> +
> +	/* Select TM channel and indicate there is an actual conversion request */
> +	buf[1] = ADC5_GEN3_CHAN_CONV_REQ | prop->tm_chan_index;
> +
> +	buf[2] = prop->timer;
> +
> +	/* Digital param selection */
> +	adc5_gen3_update_dig_param(&prop->common_props, &buf[3]);
> +
> +	/* Update fast average sample value */
> +	buf[4] &= ~ADC5_GEN3_FAST_AVG_CTL_SAMPLES_MASK;
> +	buf[4] |= prop->common_props.avg_samples | ADC5_GEN3_FAST_AVG_CTL_EN;
> +
> +	/* Select ADC channel */
> +	buf[5] = prop->common_props.channel;
> +
> +	/* Select HW settle delay for channel */
> +	buf[6] = FIELD_PREP(ADC5_GEN3_HW_SETTLE_DELAY_MASK,
> +			    prop->common_props.hw_settle_time_us);
> +
> +	/* High temperature corresponds to low voltage threshold */
> +	prop->low_thr_en = (high_temp != INT_MAX);
> +	if (prop->low_thr_en) {
> +		adc_code = qcom_adc_tm5_gen2_temp_res_scale(high_temp);
> +		put_unaligned_le16(adc_code, &buf[8]);
> +	}
> +
> +	/* Low temperature corresponds to high voltage threshold */
> +	prop->high_thr_en = (low_temp != -INT_MAX);
> +	if (prop->high_thr_en) {
> +		adc_code = qcom_adc_tm5_gen2_temp_res_scale(low_temp);
> +		put_unaligned_le16(adc_code, &buf[10]);
> +	}
> +
> +	buf[7] = 0;
> +	if (prop->high_thr_en)
> +		buf[7] |= ADC5_GEN3_HIGH_THR_INT_EN;
> +	if (prop->low_thr_en)
> +		buf[7] |= ADC5_GEN3_LOW_THR_INT_EN;
> +
> +	ret = adc5_gen3_write(adc_tm5->dev_data, prop->sdam_index, ADC5_GEN3_SID,
> +			      buf, sizeof(buf));
> +	if (ret < 0)
> +		return ret;
> +
> +	conv_req = ADC5_GEN3_CONV_REQ_REQ;
> +	return adc5_gen3_write(adc_tm5->dev_data, prop->sdam_index,
> +			       ADC5_GEN3_CONV_REQ, &conv_req, sizeof(conv_req));
> +}
> +
> +static int adc_tm5_gen3_set_trip_temp(struct thermal_zone_device *tz,
> +				      int low_temp, int high_temp)
> +{
> +	struct adc_tm5_gen3_channel_props *prop = thermal_zone_device_priv(tz);
> +	struct adc_tm5_gen3_chip *adc_tm5;
> +
> +	if (!prop || !prop->chip)
> +		return -EINVAL;
> +
> +	adc_tm5 = prop->chip;
> +
> +	dev_dbg(adc_tm5->dev, "channel:%s, low_temp(mdegC):%d, high_temp(mdegC):%d\n",
> +		prop->common_props.label, low_temp, high_temp);
> +
> +	guard(adc5_gen3)(adc_tm5);
> +	if (high_temp == INT_MAX && low_temp == -INT_MAX)
> +		return adc_tm5_gen3_disable_channel(prop);

Why disable the channel instead of returning an errno ?

> +	return adc_tm5_gen3_configure(prop, low_temp, high_temp);
> +}
> +
> +static const struct thermal_zone_device_ops adc_tm_ops = {
> +	.get_temp = adc_tm5_gen3_get_temp,
> +	.set_trips = adc_tm5_gen3_set_trip_temp,
> +};
> +
> +static int adc_tm5_register_tzd(struct adc_tm5_gen3_chip *adc_tm5)
> +{
> +	unsigned int i, channel;
> +	struct thermal_zone_device *tzd;
> +	int ret;
> +
> +	for (i = 0; i < adc_tm5->nchannels; i++) {
> +		channel = ADC5_GEN3_V_CHAN(adc_tm5->chan_props[i].common_props);
> +		tzd = devm_thermal_of_zone_register(adc_tm5->dev, channel,
> +						    &adc_tm5->chan_props[i],
> +						    &adc_tm_ops);
> +
> +		if (IS_ERR(tzd)) {
> +			if (PTR_ERR(tzd) == -ENODEV) {
> +				dev_warn(adc_tm5->dev,
> +					 "thermal sensor on channel %d is not used\n",
> +					 channel);
> +				continue;
> +			}
> +			return dev_err_probe(adc_tm5->dev, PTR_ERR(tzd),
> +					     "Error registering TZ zone:%ld for channel:%d\n",
> +					     PTR_ERR(tzd), channel);
> +		}
> +		adc_tm5->chan_props[i].tzd = tzd;
> +		ret = devm_thermal_add_hwmon_sysfs(adc_tm5->dev, tzd);
> +		if (ret)
> +			return ret;
> +	}
> +	return 0;
> +}
> +
> +static void adc5_gen3_clear_work(void *data)
> +{
> +	struct adc_tm5_gen3_chip *adc_tm5 = data;
> +
> +	cancel_work_sync(&adc_tm5->tm_handler_work);
> +}
> +
> +static void adc5_gen3_disable(void *data)
> +{
> +	struct adc_tm5_gen3_chip *adc_tm5 = data;
> +	int i;
> +
> +	guard(adc5_gen3)(adc_tm5);
> +	/* Disable all available TM channels */
> +	for (i = 0; i < adc_tm5->nchannels; i++)
> +		adc_tm5_gen3_disable_channel(&adc_tm5->chan_props[i]);
> +}
> +
> +static void adctm_event_handler(struct auxiliary_device *adev)
> +{
> +	struct adc_tm5_gen3_chip *adc_tm5 = auxiliary_get_drvdata(adev);
> +
> +	schedule_work(&adc_tm5->tm_handler_work);
> +}
> +
> +static int adc_tm5_probe(struct auxiliary_device *aux_dev,
> +			 const struct auxiliary_device_id *id)
> +{
> +	struct adc_tm5_gen3_chip *adc_tm5;
> +	struct tm5_aux_dev_wrapper *aux_dev_wrapper;
> +	struct device *dev = &aux_dev->dev;
> +	int i, ret;
> +
> +	adc_tm5 = devm_kzalloc(dev, sizeof(*adc_tm5), GFP_KERNEL);
> +	if (!adc_tm5)
> +		return -ENOMEM;
> +
> +	aux_dev_wrapper = container_of(aux_dev, struct tm5_aux_dev_wrapper,
> +				       aux_dev);
> +
> +	adc_tm5->dev = dev;
> +	adc_tm5->dev_data = aux_dev_wrapper->dev_data;
> +	adc_tm5->nchannels = aux_dev_wrapper->n_tm_channels;
> +	adc_tm5->chan_props = devm_kcalloc(dev, aux_dev_wrapper->n_tm_channels,
> +					   sizeof(*adc_tm5->chan_props), GFP_KERNEL);
> +	if (!adc_tm5->chan_props)
> +		return -ENOMEM;
> +
> +	for (i = 0; i < adc_tm5->nchannels; i++) {
> +		adc_tm5->chan_props[i].common_props = aux_dev_wrapper->tm_props[i];
> +		adc_tm5->chan_props[i].timer = MEAS_INT_1S;
> +		adc_tm5->chan_props[i].sdam_index = (i + 1) / 8;
> +		adc_tm5->chan_props[i].tm_chan_index = (i + 1) % 8;
> +		adc_tm5->chan_props[i].chip = adc_tm5;
> +	}
> +
> +	INIT_WORK(&adc_tm5->tm_handler_work, tm_handler_work);

Why is it needed

> +	/*
> +	 * Skipping first SDAM IRQ as it is requested in parent driver.
> +	 * If there is a TM violation on that IRQ, the parent driver calls
> +	 * the notifier (adctm_event_handler) exposed from this driver to handle it.
> +	 */
> +	for (i = 1; i < adc_tm5->dev_data->num_sdams; i++) {
> +		ret = devm_request_threaded_irq(dev,
> +						adc_tm5->dev_data->base[i].irq,
> +						NULL, adctm5_gen3_isr, IRQF_ONESHOT,
> +						adc_tm5->dev_data->base[i].irq_name,
> +						adc_tm5);

The threaded interrupts set the isr in a thread and from the thread
handling the event, there is a work queue scheduled. Why not use the
top and bottom halves of the threaded interrupt ? Hopefully you should
be able to remove the lock.

> +		if (ret < 0)
> +			return ret;
> +	}
> +
> +	/*
> +	 * This drvdata is only used in the function (adctm_event_handler)
> +	 * called by parent ADC driver in case of TM violation on the first SDAM.
> +	 */
> +	auxiliary_set_drvdata(aux_dev, adc_tm5);
> +
> +	adc5_gen3_register_tm_event_notifier(dev, adctm_event_handler);
> +
> +	/*
> +	 * This is to cancel any instances of tm_handler_work scheduled by
> +	 * TM interrupt, at the time of module removal.
> +	 */
> +

Remove the extra line

> +	ret = devm_add_action(dev, adc5_gen3_clear_work, adc_tm5);
> +	if (ret)
> +		return ret;
> +
> +	ret = adc_tm5_register_tzd(adc_tm5);
> +	if (ret)
> +		return ret;
> +
> +	/* This is to disable all ADC_TM channels in case of probe failure. */
> +

Remove the extra line

> +	return devm_add_action(dev, adc5_gen3_disable, adc_tm5);
> +}
> +
> +static const struct auxiliary_device_id adctm5_auxiliary_id_table[] = {
> +	{ .name = "qcom_spmi_adc5_gen3.adc5_tm_gen3", },
> +	{ }
> +};
> +
> +MODULE_DEVICE_TABLE(auxiliary, adctm5_auxiliary_id_table);
> +
> +static struct auxiliary_driver adctm5gen3_auxiliary_driver = {
> +	.id_table = adctm5_auxiliary_id_table,
> +	.probe = adc_tm5_probe,
> +};
> +
> +module_auxiliary_driver(adctm5gen3_auxiliary_driver);
> +
> +MODULE_DESCRIPTION("SPMI PMIC Thermal Monitor ADC driver");
> +MODULE_LICENSE("GPL");
> +MODULE_IMPORT_NS("QCOM_SPMI_ADC5_GEN3");
> -- 
> 2.25.1
> 

-- 

^ permalink raw reply

* Re: [PATCH v2] interconnect: imx: fix use-after-free in imx_icc_node_init_qos()
From: Frank Li @ 2026-04-09  3:34 UTC (permalink / raw)
  To: Wentao Liang
  Cc: Georgi Djakov, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
	Fabio Estevam, linux-pm, imx, linux-arm-kernel, linux-kernel,
	stable
In-Reply-To: <20260408153022.401123-1-vulab@iscas.ac.cn>

On Wed, Apr 08, 2026 at 03:30:22PM +0000, Wentao Liang wrote:
> The function imx_icc_node_init_qos() manually manages the reference count
> of struct device_node *dn using of_node_put(). However, some error paths
> use dn after the put, leading to use-after-free. Convert to automatic
> cleanup using __free(device_node) to ensure the reference is always
> released when dn goes out of scope.
>
> Fixes: f0d8048525d7 ("interconnect: Add imx core driver")
> Cc: stable@vger.kernel.org
> Signed-off-by: Wentao Liang <vulab@iscas.ac.cn>
> ---
> Changes in v2:
> - Use auto cheanup to fix the problem.
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  drivers/interconnect/imx/imx.c | 6 ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/interconnect/imx/imx.c b/drivers/interconnect/imx/imx.c
> index 9511f80cf041..e5fcdcb88cfb 100644
> --- a/drivers/interconnect/imx/imx.c
> +++ b/drivers/interconnect/imx/imx.c
> @@ -120,7 +120,8 @@ static int imx_icc_node_init_qos(struct icc_provider *provider,
>  	struct imx_icc_node *node_data = node->data;
>  	const struct imx_icc_node_adj_desc *adj = node_data->desc->adj;
>  	struct device *dev = provider->dev;
> -	struct device_node *dn = NULL;
> +	struct device_node *__free(device_nod) dn = of_parse_phandle(dev->of_node,
> +			adj->phandle_name, 0);
>  	struct platform_device *pdev;
>
>  	if (adj->main_noc) {
> @@ -128,7 +129,6 @@ static int imx_icc_node_init_qos(struct icc_provider *provider,
>  		dev_dbg(dev, "icc node %s[%d] is main noc itself\n",
>  			node->name, node->id);
>  	} else {
> -		dn = of_parse_phandle(dev->of_node, adj->phandle_name, 0);
>  		if (!dn) {
>  			dev_warn(dev, "Failed to parse %s\n",
>  				 adj->phandle_name);
> @@ -138,12 +138,10 @@ static int imx_icc_node_init_qos(struct icc_provider *provider,
>  		if (!of_device_is_available(dn)) {
>  			dev_warn(dev, "Missing property %s, skip scaling %s\n",
>  				 adj->phandle_name, node->name);
> -			of_node_put(dn);
>  			return 0;
>  		}
>
>  		pdev = of_find_device_by_node(dn);
> -		of_node_put(dn);
>  		if (!pdev) {
>  			dev_warn(dev, "node %s[%d] missing device for %pOF\n",
>  				 node->name, node->id, dn);
> --
> 2.34.1
>

^ permalink raw reply

* RE: Status of thermal support for i.MX93
From: Jacky Bai @ 2026-04-09  1:59 UTC (permalink / raw)
  To: Stefan Wahren, Alice Guo, Frank Li
  Cc: Fabio Estevam, imx@lists.linux.dev, Linux ARM,
	open list:GENERIC PM DOMAINS, Daniel Lezcano, Sascha Hauer
In-Reply-To: <1ad05dc4-9eaa-4fc2-a665-e17521fd333c@gmx.net>

Hi Stefan,

> Subject: Status of thermal support for i.MX93
> 
> Hi,
> 
> AFAIK the thermal support for i.MX93 hasn't been mainlined yet. The last
> version I can find is here [1].
> 
> Are there any plans to finish this work?
> 

I thought Frank answered the comments and no further action to do from my side, So it slipped
From my memory.

I just rechecked the comments history, it seems still have some comments need to be resolved.
I will handle them and send out a new version.

Thx for point this out.

BR
> Thanks
> 

^ permalink raw reply

* [PATCH v2 7/7] platform/x86/intel/pmc: Add Nova Lake support to intel_pmc_core driver
From: Xi Pardee @ 2026-04-08 22:21 UTC (permalink / raw)
  To: xi.pardee, irenic.rajneesh, david.e.box, ilpo.jarvinen,
	platform-driver-x86, linux-kernel, linux-pm
In-Reply-To: <20260408222144.3288928-1-xi.pardee@linux.intel.com>

Add Nova Lake support in intel_pmc_core driver

Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com>
---
 drivers/platform/x86/intel/pmc/Makefile |    3 +-
 drivers/platform/x86/intel/pmc/core.c   |    2 +
 drivers/platform/x86/intel/pmc/core.h   |   31 +
 drivers/platform/x86/intel/pmc/nvl.c    | 1539 +++++++++++++++++++++++
 drivers/platform/x86/intel/pmc/ptl.c    |    2 +-
 5 files changed, 1575 insertions(+), 2 deletions(-)
 create mode 100644 drivers/platform/x86/intel/pmc/nvl.c

diff --git a/drivers/platform/x86/intel/pmc/Makefile b/drivers/platform/x86/intel/pmc/Makefile
index bb960c8721d77..23853e867c912 100644
--- a/drivers/platform/x86/intel/pmc/Makefile
+++ b/drivers/platform/x86/intel/pmc/Makefile
@@ -4,7 +4,8 @@
 #
 
 intel_pmc_core-y			:= core.o spt.o cnp.o icl.o \
-					   tgl.o adl.o mtl.o arl.o lnl.o ptl.o wcl.o
+					   tgl.o adl.o mtl.o arl.o \
+					   lnl.o ptl.o wcl.o nvl.o
 obj-$(CONFIG_INTEL_PMC_CORE)		+= intel_pmc_core.o
 intel_pmc_core_pltdrv-y			:= pltdrv.o
 obj-$(CONFIG_INTEL_PMC_CORE)		+= intel_pmc_core_pltdrv.o
diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/intel/pmc/core.c
index c84e75b19aac3..207708f4ceb94 100644
--- a/drivers/platform/x86/intel/pmc/core.c
+++ b/drivers/platform/x86/intel/pmc/core.c
@@ -1849,6 +1849,8 @@ static const struct x86_cpu_id intel_pmc_core_ids[] = {
 	X86_MATCH_VFM(INTEL_LUNARLAKE_M,	&lnl_pmc_dev),
 	X86_MATCH_VFM(INTEL_PANTHERLAKE_L,	&ptl_pmc_dev),
 	X86_MATCH_VFM(INTEL_WILDCATLAKE_L,	&wcl_pmc_dev),
+	X86_MATCH_VFM(INTEL_NOVALAKE,		&nvl_s_pmc_dev),
+	X86_MATCH_VFM(INTEL_NOVALAKE_L,		&nvl_h_pmc_dev),
 	{}
 };
 
diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h
index a741e4698f195..f2b4a20d2ff44 100644
--- a/drivers/platform/x86/intel/pmc/core.h
+++ b/drivers/platform/x86/intel/pmc/core.h
@@ -307,6 +307,29 @@ enum ppfear_regs {
 #define WCL_NUM_S0IX_BLOCKER			94
 #define WCL_BLK_REQ_OFFSET			50
 
+/* Nova Lake */
+#define NVL_PCDH_PPFEAR_NUM_ENTRIES		13
+#define NVL_PCDH_PMC_MMIO_REG_LEN		0x363c
+#define NVL_PCDS_PMC_MMIO_REG_LEN		0x3118
+#define NVL_PCHS_PMC_MMIO_REG_LEN		0x30d8
+#define NVL_LPM_PRI_OFFSET			0x17a4
+#define NVL_LPM_EN_OFFSET			0x17a0
+#define NVL_LPM_RESIDENCY_OFFSET		0x17a8
+#define NVL_LPM_LIVE_STATUS_OFFSET		0x1760
+#define NVL_LPM_NUM_MAPS			15
+#define NVL_PCDH_NUM_S0IX_BLOCKER		107
+#define NVL_PCDS_NUM_S0IX_BLOCKER		71
+#define NVL_PCHS_NUM_S0IX_BLOCKER		54
+#define NVL_PCDS_PMC_LTR_RESERVED		0x1bac
+#define NVL_PCDH_BLK_REQ_OFFSET			53
+#define NVL_PCDS_BLK_REQ_OFFSET			18
+#define NVL_PCHS_BLK_REQ_OFFSET			46
+#define NVL_PMT_PC_GUID				0x13000101
+#define NVL_PMT_DMU_GUID			0x1a000101
+#define NVL_LTR_BLK_OFFSET			64
+#define NVL_PKGC_BLK_OFFSET			4
+#define NVL_PMT_DMU_DIE_C6_OFFSET		25
+
 /* SSRAM PMC Device ID */
 /* LNL */
 #define PMC_DEVID_LNL_SOCM	0xa87f
@@ -329,6 +352,11 @@ enum ppfear_regs {
 #define PMC_DEVID_MTL_IOEP	0x7ecf
 #define PMC_DEVID_MTL_IOEM	0x7ebf
 
+/* NVL */
+#define PMC_DEVID_NVL_PCDH	0xd37e
+#define PMC_DEVID_NVL_PCDS	0xd47e
+#define PMC_DEVID_NVL_PCHS	0x6e27
+
 extern const char *pmc_lpm_modes[];
 
 struct pmc_bit_map {
@@ -558,6 +586,7 @@ extern const struct pmc_reg_map mtl_ioep_reg_map;
 extern const struct pmc_bit_map ptl_pcdp_clocksource_status_map[];
 extern const struct pmc_bit_map ptl_pcdp_vnn_req_status_3_map[];
 extern const struct pmc_bit_map ptl_pcdp_signal_status_map[];
+extern const struct pmc_bit_map ptl_pcdp_ltr_show_map[];
 
 void pmc_core_get_tgl_lpm_reqs(struct platform_device *pdev);
 int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value, int ignore);
@@ -581,6 +610,8 @@ extern struct pmc_dev_info arl_h_pmc_dev;
 extern struct pmc_dev_info lnl_pmc_dev;
 extern struct pmc_dev_info ptl_pmc_dev;
 extern struct pmc_dev_info wcl_pmc_dev;
+extern struct pmc_dev_info nvl_s_pmc_dev;
+extern struct pmc_dev_info nvl_h_pmc_dev;
 
 void cnl_suspend(struct pmc_dev *pmcdev);
 int cnl_resume(struct pmc_dev *pmcdev);
diff --git a/drivers/platform/x86/intel/pmc/nvl.c b/drivers/platform/x86/intel/pmc/nvl.c
new file mode 100644
index 0000000000000..96f4244d602be
--- /dev/null
+++ b/drivers/platform/x86/intel/pmc/nvl.c
@@ -0,0 +1,1539 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * This file contains platform specific structure definitions
+ * and init function used by Nova Lake PCH.
+ *
+ * Copyright (c) 2026, Intel Corporation.
+ */
+
+#include <linux/pci.h>
+
+#include "core.h"
+
+/* PMC SSRAM PMT Telemetry GUIDS */
+#define PCDH_LPM_REQ_GUID 0x01093101
+#define PCHS_LPM_REQ_GUID 0x01092101
+#define PCDS_LPM_REQ_GUID 0x01091102
+
+/*
+ * Die Mapping to Product.
+ * Product PCDDie PCHDie
+ * NVL-H   PCD-H  None
+ * NVL-S   PCD-S  PCH-S
+ */
+
+static const struct pmc_bit_map nvl_pcdh_pfear_map[] = {
+	{"PMC_PGD0",                 BIT(0)},
+	{"FUSE_OSSE_PGD0",           BIT(1)},
+	{"SPI_PGD0",                 BIT(2)},
+	{"XHCI_PGD0",                BIT(3)},
+	{"SPA_PGD0",                 BIT(4)},
+	{"SPB_PGD0",                 BIT(5)},
+	{"MPFPW2_PGD0",              BIT(6)},
+	{"GBE_PGD0",                 BIT(7)},
+
+	{"SBR16B20_PGD0",            BIT(0)},
+	{"DBG_SBR_PGD0",             BIT(1)},
+	{"SBR16B7_PGD0",             BIT(2)},
+	{"STRC_PGD0",                BIT(3)},
+	{"SBR16B8_PGD0",             BIT(4)},
+	{"D2D_DISP_PGD1",            BIT(5)},
+	{"LPSS_PGD0",                BIT(6)},
+	{"LPC_PGD0",                 BIT(7)},
+
+	{"SMB_PGD0",                 BIT(0)},
+	{"ISH_PGD0",                 BIT(1)},
+	{"SBR16B2_PGD0",             BIT(2)},
+	{"NPK_PGD0",                 BIT(3)},
+	{"D2D_NOC_PGD1",             BIT(4)},
+	{"DBG_SBR16B_PGD0",          BIT(5)},
+	{"FUSE_PGD0",                BIT(6)},
+	{"SBR16B0_PGD0",             BIT(7)},
+
+	{"P2SB0_PGD0",               BIT(0)},
+	{"OTG_PGD0",                 BIT(1)},
+	{"EXI_PGD0",                 BIT(2)},
+	{"CSE_PGD0",                 BIT(3)},
+	{"CSME_KVM_PGD0",            BIT(4)},
+	{"CSME_PMT_PGD0",            BIT(5)},
+	{"CSME_CLINK_PGD0",          BIT(6)},
+	{"SBR16B21_PGD0",            BIT(7)},
+
+	{"CSME_USBR_PGD0",           BIT(0)},
+	{"SBR16B22_PGD0",            BIT(1)},
+	{"CSME_SMT1_PGD0",           BIT(2)},
+	{"MPFPW1_PGD0",              BIT(3)},
+	{"CSME_SMS2_PGD0",           BIT(4)},
+	{"CSME_SMS_PGD0",            BIT(5)},
+	{"CSME_RTC_PGD0",            BIT(6)},
+	{"CSMEPSF_PGD0",             BIT(7)},
+
+	{"D2D_NOC_PGD0",             BIT(0)},
+	{"ESE_PGD0",                 BIT(1)},
+	{"SBR16B6_PGD0",             BIT(2)},
+	{"P2SB1_PGD0",               BIT(3)},
+	{"SBR16B3_PGD0",             BIT(4)},
+	{"OSSE_SMT1_PGD0",           BIT(5)},
+	{"D2D_DISP_PGD0",            BIT(6)},
+	{"SNPS_USB2_A_PGD0",         BIT(7)},
+
+	{"U3FPW1_PGD0",              BIT(0)},
+	{"FIA_X_PGD0",               BIT(1)},
+	{"PSF4_PGD0",                BIT(2)},
+	{"CNVI_PGD0",                BIT(3)},
+	{"UFSX2_PGD0",               BIT(4)},
+	{"ENDBG_PGD0",               BIT(5)},
+	{"DBC_PGD0",                 BIT(6)},
+	{"FIA_PG_PGD0",              BIT(7)},
+
+	{"D2D_IPU_PGD0",             BIT(0)},
+	{"NPK_PGD1",                 BIT(1)},
+	{"FIACPCB_X_PGD0",           BIT(2)},
+	{"SBR8B4_PGD0",              BIT(3)},
+	{"DBG_PSF_PGD0",             BIT(4)},
+	{"PSF6_PGD0",                BIT(5)},
+	{"UFSPW1_PGD0",              BIT(6)},
+	{"FIA_U_PGD0",               BIT(7)},
+
+	{"PSF8_PGD0",                BIT(0)},
+	{"SBR16B9_PGD0",             BIT(1)},
+	{"PSF0_PGD0",                BIT(2)},
+	{"FIACPCB_U_PGD0",           BIT(3)},
+	{"TAM_PGD0",                 BIT(4)},
+	{"D2D_NOC_PGD2",             BIT(5)},
+	{"SBR8B2_PGD0",              BIT(6)},
+	{"THC0_PGD0",                BIT(7)},
+
+	{"THC1_PGD0",                BIT(0)},
+	{"PMC_PGD1",                 BIT(1)},
+	{"DISP_PGA1_PGD0",           BIT(2)},
+	{"TCSS_PGD0",                BIT(3)},
+	{"DISP_PGA_PGD0",            BIT(4)},
+	{"SBR16B1_PGD0",             BIT(5)},
+	{"SBRG_PGD0",                BIT(6)},
+	{"PSF5_PGD0",                BIT(7)},
+
+	{"SBR8B3_PGD0",              BIT(0)},
+	{"ACE_PGD0",                 BIT(1)},
+	{"ACE_PGD1",                 BIT(2)},
+	{"ACE_PGD2",                 BIT(3)},
+	{"ACE_PGD3",                 BIT(4)},
+	{"ACE_PGD4",                 BIT(5)},
+	{"ACE_PGD5",                 BIT(6)},
+	{"ACE_PGD6",                 BIT(7)},
+
+	{"ACE_PGD7",                 BIT(0)},
+	{"ACE_PGD8",                 BIT(1)},
+	{"ACE_PGD9",                 BIT(2)},
+	{"ACE_PGD10",                BIT(3)},
+	{"FIACPCB_PG_PGD0",          BIT(4)},
+	{"SNPS_USB2_B_PGD0",         BIT(5)},
+	{"OSSE_PGD0",                BIT(6)},
+	{"SBR8B0_PGD0",              BIT(7)},
+
+	{"SBR16B4_PGD0",             BIT(0)},
+	{"CSME_PTIO_PGD0",           BIT(1)},
+	{}
+};
+
+static const struct pmc_bit_map *ext_nvl_pcdh_pfear_map[] = {
+	nvl_pcdh_pfear_map,
+	NULL
+};
+
+const struct pmc_bit_map nvl_pcdh_clocksource_status_map[] = {
+	{"AON2_OFF_STS",                 BIT(0),	1},
+	{"AON3_OFF_STS",                 BIT(1),	0},
+	{"AON4_OFF_STS",                 BIT(2),	1},
+	{"AON5_OFF_STS",                 BIT(3),	1},
+	{"AON1_OFF_STS",                 BIT(4),	0},
+	{"XTAL_LVM_OFF_STS",             BIT(5),	0},
+	{"MPFPW1_0_PLL_OFF_STS",         BIT(6),	1},
+	{"D2D_PLL_OFF_STS",              BIT(7),	1},
+	{"USB3_PLL_OFF_STS",             BIT(8),	1},
+	{"AON3_SPL_OFF_STS",             BIT(9),	1},
+	{"MPFPW2_0_PLL_OFF_STS",         BIT(12),	1},
+	{"XTAL_AGGR_OFF_STS",            BIT(17),	1},
+	{"USB2_PLL_OFF_STS",             BIT(18),	0},
+	{"DDI2_PLL_OFF_STS",             BIT(19),	1},
+	{"SE_TCSS_PLL_OFF_STS",          BIT(20),	1},
+	{"DDI_PLL_OFF_STS",              BIT(21),	1},
+	{"FILTER_PLL_OFF_STS",           BIT(22),	1},
+	{"ACE_PLL_OFF_STS",              BIT(24),	0},
+	{"FABRIC_PLL_OFF_STS",           BIT(25),	1},
+	{"SOC_PLL_OFF_STS",              BIT(26),	1},
+	{"REF_PLL_OFF_STS",              BIT(28),	1},
+	{"IMG_PLL_OFF_STS",              BIT(29),	1},
+	{"GENLOCK_FILTER_PLL_OFF_STS",   BIT(30),	1},
+	{"RTC_PLL_OFF_STS",              BIT(31),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcdh_power_gating_status_0_map[] = {
+	{"PMC_PGD0_PG_STS",              BIT(0),	0},
+	{"FUSE_OSSE_PGD0_PG_STS",	 BIT(1),	0},
+	{"ESPISPI_PGD0_PG_STS",          BIT(2),	0},
+	{"XHCI_PGD0_PG_STS",             BIT(3),	1},
+	{"SPA_PGD0_PG_STS",              BIT(4),	1},
+	{"SPB_PGD0_PG_STS",              BIT(5),	1},
+	{"MPFPW2_PGD0_PG_STS",           BIT(6),	0},
+	{"GBE_PGD0_PG_STS",              BIT(7),	1},
+	{"SBR16B20_PGD0_PG_STS",         BIT(8),	0},
+	{"DBG_PGD0_PG_STS",              BIT(9),	0},
+	{"SBR16B7_PGD0_PG_STS",          BIT(10),	0},
+	{"STRC_PGD0_PG_STS",             BIT(11),	0},
+	{"SBR16B8_PGD0_PG_STS",          BIT(12),	0},
+	{"D2D_DISP_PGD1_PG_STS",         BIT(13),	1},
+	{"LPSS_PGD0_PG_STS",             BIT(14),	1},
+	{"LPC_PGD0_PG_STS",              BIT(15),	0},
+	{"SMB_PGD0_PG_STS",              BIT(16),	0},
+	{"ISH_PGD0_PG_STS",              BIT(17),	0},
+	{"SBR16B2_PGD0_PG_STS",          BIT(18),	0},
+	{"NPK_PGD0_PG_STS",              BIT(19),	0},
+	{"D2D_NOC_PGD1_PG_STS",          BIT(20),	1},
+	{"DBG_SBR16B_PGD0_PG_STS",       BIT(21),	0},
+	{"FUSE_PGD0_PG_STS",             BIT(22),	0},
+	{"SBR16B0_PGD0_PG_STS",          BIT(23),	0},
+	{"P2SB0_PGD0_PG_STS",            BIT(24),	1},
+	{"XDCI_PGD0_PG_STS",             BIT(25),	1},
+	{"EXI_PGD0_PG_STS",              BIT(26),	0},
+	{"CSE_PGD0_PG_STS",              BIT(27),	1},
+	{"KVMCC_PGD0_PG_STS",            BIT(28),	1},
+	{"PMT_PGD0_PG_STS",              BIT(29),	1},
+	{"CLINK_PGD0_PG_STS",            BIT(30),	1},
+	{"SBR16B21_PGD0_PG_STS",         BIT(31),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcdh_power_gating_status_1_map[] = {
+	{"USBR0_PGD0_PG_STS",            BIT(0),	1},
+	{"SBR16B22_PGD0_PG_STS",         BIT(1),	0},
+	{"SMT1_PGD0_PG_STS",             BIT(2),	1},
+	{"MPFPW1_PGD0_PG_STS",           BIT(3),	0},
+	{"SMS2_PGD0_PG_STS",             BIT(4),	1},
+	{"SMS1_PGD0_PG_STS",             BIT(5),	1},
+	{"CSMERTC_PGD0_PG_STS",          BIT(6),	0},
+	{"CSMEPSF_PGD0_PG_STS",          BIT(7),	0},
+	{"D2D_NOC_PGD0_PG_STS",          BIT(8),	0},
+	{"ESE_PGD0_PG_STS",              BIT(9),	1},
+	{"SBR16B6_PGD0_PG_STS",          BIT(10),	0},
+	{"P2SB1_PGD0_PG_STS",            BIT(11),	1},
+	{"SBR16B3_PGD0_PG_STS",          BIT(12),	0},
+	{"OSSE_SMT1_PGD0_PG_STS",        BIT(13),	1},
+	{"D2D_DISP_PGD0_PG_STS",         BIT(14),	1},
+	{"SNPA_USB2_A_PGD0_PG_STS",      BIT(15),	0},
+	{"U3FPW1_PGD0_PG_STS",           BIT(16),	0},
+	{"FIA_X_PGD0_PG_STS",            BIT(17),	0},
+	{"PSF4_PGD0_PG_STS",             BIT(18),	0},
+	{"CNVI_PGD0_PG_STS",             BIT(19),	0},
+	{"UFSX2_PGD0_PG_STS",            BIT(20),	1},
+	{"ENDBG_PGD0_PG_STS",            BIT(21),	0},
+	{"DBC_PGD0_PG_STS",              BIT(22),	0},
+	{"FIA_PG_PGD0_PG_STS",           BIT(23),	0},
+	{"D2D_IPU_PGD0_PG_STS",          BIT(24),	1},
+	{"NPK_PGD1_PG_STS",              BIT(25),	0},
+	{"FIACPCB_X_PGD0_PG_STS",        BIT(26),	0},
+	{"SBR8B4_PGD0_PG_STS",           BIT(27),	0},
+	{"DBG_PSF_PGD0_PG_STS",          BIT(28),	0},
+	{"PSF6_PGD0_PG_STS",             BIT(29),	0},
+	{"UFSPW1_PGD0_PG_STS",           BIT(30),	0},
+	{"FIA_U_PGD0_PG_STS",            BIT(31),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcdh_power_gating_status_2_map[] = {
+	{"PSF8_PGD0_PG_STS",             BIT(0),	0},
+	{"SBR16B9_PGD0_PG_STS",          BIT(1),	0},
+	{"PSF0_PGD0_PG_STS",             BIT(2),	0},
+	{"FIACPCB_U_PGD0_PG_STS",        BIT(3),	0},
+	{"TAM_PGD0_PG_STS",              BIT(4),	1},
+	{"D2D_NOC_PGD2_PG_STS",          BIT(5),	1},
+	{"SBR8B2_PGD0_PG_STS",           BIT(6),	0},
+	{"THC0_PGD0_PG_STS",             BIT(7),	1},
+	{"THC1_PGD0_PG_STS",             BIT(8),	1},
+	{"PMC_PGD1_PG_STS",              BIT(9),	0},
+	{"DISP_PGA1_PGD0_PG_STS",        BIT(10),	0},
+	{"TCSS_PGD0_PG_STS",             BIT(11),	0},
+	{"DISP_PGA_PGD0_PG_STS",         BIT(12),	0},
+	{"SBR16B1_PGD0_PG_STS",          BIT(13),	0},
+	{"SBRG_PGD0_PG_STS",             BIT(14),	0},
+	{"PSF5_PGD0_PG_STS",             BIT(15),	0},
+	{"SBR8B3_PGD0_PG_STS",           BIT(16),	0},
+	{"ACE_PGD0_PG_STS",              BIT(17),	0},
+	{"ACE_PGD1_PG_STS",              BIT(18),	0},
+	{"ACE_PGD2_PG_STS",              BIT(19),	0},
+	{"ACE_PGD3_PG_STS",              BIT(20),	0},
+	{"ACE_PGD4_PG_STS",              BIT(21),	0},
+	{"ACE_PGD5_PG_STS",              BIT(22),	0},
+	{"ACE_PGD6_PG_STS",              BIT(23),	0},
+	{"ACE_PGD7_PG_STS",              BIT(24),	0},
+	{"ACE_PGD8_PG_STS",              BIT(25),	0},
+	{"ACE_PGD9_PG_STS",              BIT(26),	0},
+	{"ACE_PGD10_PG_STS",             BIT(27),	0},
+	{"FIACPCB_PG_PGD0_PG_STS",       BIT(28),	0},
+	{"SNPS_USB2_B_PGD0_PG_STS",      BIT(29),	0},
+	{"OSSE_PGD0_PG_STS",             BIT(30),	1},
+	{"SBR8B0_PGD0_PG_STS",           BIT(31),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcdh_power_gating_status_3_map[] = {
+	{"SBR16B4_PGD0_PG_STS",          BIT(0),	0},
+	{"PTIO_PGD0_PG_STS",             BIT(1),	1},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcdh_d3_status_0_map[] = {
+	{"LPSS_D3_STS",                  BIT(3),	1},
+	{"XDCI_D3_STS",                  BIT(4),	1},
+	{"XHCI_D3_STS",                  BIT(5),	1},
+	{"OSSE_D3_STS",                  BIT(6),	0},
+	{"SPA_D3_STS",                   BIT(12),	0},
+	{"SPB_D3_STS",                   BIT(13),	0},
+	{"ESPISPI_D3_STS",               BIT(18),	0},
+	{"PSTH_D3_STS",                  BIT(21),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcdh_d3_status_1_map[] = {
+	{"OSSE_SMT1_D3_STS",             BIT(0),	0},
+	{"GBE_D3_STS",                   BIT(19),	0},
+	{"ITSS_D3_STS",                  BIT(23),	0},
+	{"CNVI_D3_STS",                  BIT(27),	0},
+	{"UFSX2_D3_STS",                 BIT(28),	0},
+	{"ESE_D3_STS",                   BIT(29),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcdh_d3_status_2_map[] = {
+	{"CSMERTC_D3_STS",               BIT(1),	0},
+	{"CSE_D3_STS",                   BIT(4),	0},
+	{"KVMCC_D3_STS",                 BIT(5),	0},
+	{"USBR0_D3_STS",                 BIT(6),	0},
+	{"ISH_D3_STS",                   BIT(7),	0},
+	{"SMT1_D3_STS",                  BIT(8),	0},
+	{"SMT2_D3_STS",                  BIT(9),	0},
+	{"SMT3_D3_STS",                  BIT(10),	0},
+	{"OSSE_SMT2_D3_STS",             BIT(11),	0},
+	{"CLINK_D3_STS",                 BIT(14),	0},
+	{"PTIO_D3_STS",                  BIT(16),	0},
+	{"PMT_D3_STS",                   BIT(17),	0},
+	{"SMS1_D3_STS",                  BIT(18),	0},
+	{"SMS2_D3_STS",                  BIT(19),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcdh_d3_status_3_map[] = {
+	{"THC0_D3_STS",                  BIT(14),	1},
+	{"THC1_D3_STS",                  BIT(15),	1},
+	{"OSSE_SMT3_D3_STS",             BIT(16),	0},
+	{"ACE_D3_STS",                   BIT(23),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcdh_vnn_req_status_0_map[] = {
+	{"LPSS_VNN_REQ_STS",             BIT(3),	1},
+	{"OSSE_VNN_REQ_STS",             BIT(6),	1},
+	{"ESPISPI_VNN_REQ_STS",          BIT(18),	1},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcdh_vnn_req_status_1_map[] = {
+	{"OSSE_SMT1_VNN_REQ_STS",        BIT(0),	1},
+	{"NPK_VNN_REQ_STS",              BIT(4),	1},
+	{"DFXAGG_VNN_REQ_STS",           BIT(8),	0},
+	{"EXI_VNN_REQ_STS",              BIT(9),	1},
+	{"P2D_VNN_REQ_STS",              BIT(18),	1},
+	{"GBE_VNN_REQ_STS",              BIT(19),	1},
+	{"SMB_VNN_REQ_STS",              BIT(25),	1},
+	{"LPC_VNN_REQ_STS",              BIT(26),	0},
+	{"ESE_VNN_REQ_STS",              BIT(29),	1},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcdh_vnn_req_status_2_map[] = {
+	{"CSMERTC_VNN_REQ_STS",          BIT(1),	1},
+	{"CSE_VNN_REQ_STS",              BIT(4),	1},
+	{"ISH_VNN_REQ_STS",              BIT(7),	1},
+	{"SMT1_VNN_REQ_STS",             BIT(8),	1},
+	{"CLINK_VNN_REQ_STS",            BIT(14),	1},
+	{"SMS1_VNN_REQ_STS",             BIT(18),	1},
+	{"SMS2_VNN_REQ_STS",             BIT(19),	1},
+	{"GPIOCOM4_VNN_REQ_STS",         BIT(20),	1},
+	{"GPIOCOM3_VNN_REQ_STS",         BIT(21),	1},
+	{"DISP_SHIM_VNN_REQ_STS",        BIT(22),	1},
+	{"GPIOCOM1_VNN_REQ_STS",         BIT(23),	1},
+	{"GPIOCOM0_VNN_REQ_STS",         BIT(24),	1},
+	{}
+};
+
+const struct pmc_bit_map nvl_pcdh_vnn_req_status_3_map[] = {
+	{"DTS0_VNN_REQ_STS",             BIT(7),	0},
+	{"GPIOCOM5_VNN_REQ_STS",         BIT(11),	1},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcdh_vnn_misc_status_map[] = {
+	{"CPU_C10_REQ_STS",              BIT(0),	0},
+	{"TS_OFF_REQ_STS",               BIT(1),	0},
+	{"PNDE_MET_REQ_STS",             BIT(2),	1},
+	{"PG5_PMA0_REQ_STS",             BIT(3),	1},
+	{"FW_THROTTLE_ALLOWED_REQ_STS",  BIT(4),	0},
+	{"VNN_SOC_REQ_STS",              BIT(6),	1},
+	{"ISH_VNNAON_REQ_STS",           BIT(7),	0},
+	{"D2D_NOC_CFI_QACTIVE_REQ_STS",	 BIT(8),	1},
+	{"D2D_NOC_GPSB_QACTIVE_REQ_STS", BIT(9),	1},
+	{"D2D_IPU_QACTIVE_REQ_STS",      BIT(10),	1},
+	{"PLT_GREATER_REQ_STS",          BIT(11),	1},
+	{"ALL_SBR_IDLE_REQ_STS",         BIT(12),	0},
+	{"PMC_IDLE_FB_OCP_REQ_STS",      BIT(13),	0},
+	{"PM_SYNC_STATES_REQ_STS",       BIT(14),	0},
+	{"EA_REQ_STS",                   BIT(15),	0},
+	{"MPHY_CORE_OFF_REQ_STS",        BIT(16),	0},
+	{"BRK_EV_EN_REQ_STS",            BIT(17),	0},
+	{"AUTO_DEMO_EN_REQ_STS",         BIT(18),	0},
+	{"ITSS_CLK_SRC_REQ_STS",         BIT(19),	1},
+	{"ARC_IDLE_REQ_STS",             BIT(21),	0},
+	{"PG5_PMA1_REQ_STS",             BIT(22),	1},
+	{"FIA_DEEP_PM_REQ_STS",          BIT(23),	0},
+	{"XDCI_ATTACHED_REQ_STS",        BIT(24),	1},
+	{"ARC_INTERRUPT_WAKE_REQ_STS",   BIT(25),	0},
+	{"D2D_DISP_DDI_QACTIVE_REQ_STS", BIT(26),	1},
+	{"PRE_WAKE0_REQ_STS",            BIT(27),	1},
+	{"PRE_WAKE1_REQ_STS",            BIT(28),	1},
+	{"PRE_WAKE2_REQ_STS",            BIT(29),	1},
+	{"PG5_PMA2_GVNN",                BIT(30),	1},
+	{"D2D_DISP_EDP_QACTIVE_REQ_STS", BIT(31),	1},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcdh_rsc_status_map[] = {
+	{"CORE",		0,		1},
+	{"Memory",		0,		1},
+	{"PRIM_D2D",		0,		1},
+	{"PSF0",		0,		1},
+	{"PSF4",		0,		1},
+	{"PSF6",		0,		1},
+	{"PSF8",		0,		1},
+	{"SB",			0,		1},
+	{}
+};
+
+static const struct pmc_bit_map *nvl_pcdh_lpm_maps[] = {
+	nvl_pcdh_clocksource_status_map,
+	nvl_pcdh_power_gating_status_0_map,
+	nvl_pcdh_power_gating_status_1_map,
+	nvl_pcdh_power_gating_status_2_map,
+	nvl_pcdh_power_gating_status_3_map,
+	nvl_pcdh_d3_status_0_map,
+	nvl_pcdh_d3_status_1_map,
+	nvl_pcdh_d3_status_2_map,
+	nvl_pcdh_d3_status_3_map,
+	nvl_pcdh_vnn_req_status_0_map,
+	nvl_pcdh_vnn_req_status_1_map,
+	nvl_pcdh_vnn_req_status_2_map,
+	nvl_pcdh_vnn_req_status_3_map,
+	nvl_pcdh_vnn_misc_status_map,
+	ptl_pcdp_signal_status_map,
+	NULL
+};
+
+static const struct pmc_bit_map *nvl_pcdh_blk_maps[] = {
+	nvl_pcdh_power_gating_status_0_map,
+	nvl_pcdh_power_gating_status_1_map,
+	nvl_pcdh_power_gating_status_2_map,
+	nvl_pcdh_power_gating_status_3_map,
+	nvl_pcdh_rsc_status_map,
+	nvl_pcdh_vnn_req_status_0_map,
+	nvl_pcdh_vnn_req_status_1_map,
+	nvl_pcdh_vnn_req_status_2_map,
+	nvl_pcdh_vnn_req_status_3_map,
+	nvl_pcdh_d3_status_0_map,
+	nvl_pcdh_d3_status_1_map,
+	nvl_pcdh_d3_status_2_map,
+	nvl_pcdh_d3_status_3_map,
+	nvl_pcdh_clocksource_status_map,
+	nvl_pcdh_vnn_misc_status_map,
+	ptl_pcdp_signal_status_map,
+	NULL
+};
+
+static const struct pmc_bit_map nvl_pcds_pfear_map[] = {
+	{"PMC_PGD0",                 BIT(0)},
+	{"FUSE_OSSE_PGD0",           BIT(1)},
+	{"SPI_PGD0",                 BIT(2)},
+	{"XHCI_PGD0",                BIT(3)},
+	{"SPA_PGD0",                 BIT(4)},
+	{"SPB_PGD0",                 BIT(5)},
+	{"RSVD6",                    BIT(6)},
+	{"GBE_PGD0",                 BIT(7)},
+
+	{"RSVD8",                    BIT(0)},
+	{"RSVD9",                    BIT(1)},
+	{"SBR16B7_PGD0",             BIT(2)},
+	{"SBR16B21_PGD0",            BIT(3)},
+	{"RSVD12",                   BIT(4)},
+	{"D2D_DISP_PGD1",            BIT(5)},
+	{"LPSS_PGD0",                BIT(6)},
+	{"LPC_PGD0",                 BIT(7)},
+
+	{"SMB_PGD0",                 BIT(0)},
+	{"ISH_PGD0",                 BIT(1)},
+	{"SBR16B1_PGD0",             BIT(2)},
+	{"NPK_PGD0",                 BIT(3)},
+	{"D2D_NOC_PGD1",             BIT(4)},
+	{"DBG_SBR16B_PGD0",          BIT(5)},
+	{"FUSE_PGD0",                BIT(6)},
+	{"RSVD23",                   BIT(7)},
+
+	{"P2SB0_PGD0",               BIT(0)},
+	{"OTG_PGD0",                 BIT(1)},
+	{"EXI_PGD0",                 BIT(2)},
+	{"CSE_PGD0",                 BIT(3)},
+	{"CSME_KVM_PGD0",            BIT(4)},
+	{"CSME_PMT_PGD0",            BIT(5)},
+	{"CSME_CLINK_PGD0",          BIT(6)},
+	{"CSME_PTIO_PGD0",           BIT(7)},
+
+	{"CSME_USBR_PGD0",           BIT(0)},
+	{"SBR16B22_PGD0",            BIT(1)},
+	{"CSME_SMT1_PGD0",           BIT(2)},
+	{"P2SB1_PGD0",               BIT(3)},
+	{"CSME_SMS2_PGD0",           BIT(4)},
+	{"CSME_SMS_PGD0",            BIT(5)},
+	{"CSME_RTC_PGD0",            BIT(6)},
+	{"CSMEPSF_PGD0",             BIT(7)},
+
+	{"D2D_NOC_PGD0",             BIT(0)},
+	{"RSVD41",                   BIT(1)},
+	{"RSVD42",                   BIT(2)},
+	{"RSVD43",                   BIT(3)},
+	{"SBR16B2_PGD0",             BIT(4)},
+	{"OSSE_SMT1_PGD0",           BIT(5)},
+	{"D2D_DISP_PGD0",            BIT(6)},
+	{"RSVD47_PGD0",              BIT(7)},
+
+	{"RSVD48",                   BIT(0)},
+	{"DBG_PSF_PGD0",             BIT(1)},
+	{"RSVD50",                   BIT(2)},
+	{"CNVI_PGD0",                BIT(3)},
+	{"UFSX2_PGD0",               BIT(4)},
+	{"ENDBG_PGD0",               BIT(5)},
+	{"DBC_PGD0",                 BIT(6)},
+	{"SBR16B4_PGD0",             BIT(7)},
+
+	{"RSVD56",                   BIT(0)},
+	{"NPK_PGD1",                 BIT(1)},
+	{"RSVD58",                   BIT(2)},
+	{"SBR16B20_PGD0",            BIT(3)},
+	{"RSVD60",                   BIT(4)},
+	{"SBR8B20_PGD0",             BIT(5)},
+	{"RSVD62",                   BIT(6)},
+	{"FIA_U_PGD0",               BIT(7)},
+
+	{"PSF8_PGD0",                BIT(0)},
+	{"RSVD65",                   BIT(1)},
+	{"RSVD66",                   BIT(2)},
+	{"FIACPCB_U_PGD0",           BIT(3)},
+	{"TAM_PGD0",                 BIT(4)},
+	{"D2D_NOC_PGD2",             BIT(5)},
+	{"SBR8B2_PGD0",              BIT(6)},
+	{"THC0_PGD0",                BIT(7)},
+
+	{"THC1_PGD0",                BIT(0)},
+	{"PMC_PGD1",                 BIT(1)},
+	{"SBR16B3_PGD0",             BIT(2)},
+	{"TCSS_PGD0",                BIT(3)},
+	{"DISP_PGA_PGD0",            BIT(4)},
+	{"RSVD77",                   BIT(5)},
+	{"RSVD78",                   BIT(6)},
+	{"RSVD79",                   BIT(7)},
+
+	{"SBRG_PGD0",                BIT(0)},
+	{"RSVD81",                   BIT(1)},
+	{"SBR16B0_PGD0",             BIT(2)},
+	{"SBR8B0_PGD0",              BIT(3)},
+	{"PSF7_PGD0",                BIT(4)},
+	{"RSVD85",                   BIT(5)},
+	{"RSVD86",                   BIT(6)},
+	{"RSVD87",                   BIT(7)},
+
+	{"SBR16B6_PGD0",             BIT(0)},
+	{"PSD0_PGD0",                BIT(1)},
+	{"STRC_PGD0",                BIT(2)},
+	{"RSVD91",                   BIT(3)},
+	{"DBG_SBR_PGD0",             BIT(4)},
+	{"RSVD93",                   BIT(5)},
+	{"OSSE_PGD0",                BIT(6)},
+	{"DISP_PGA1_PGD0",           BIT(7)},
+	{}
+};
+
+static const struct pmc_bit_map *ext_nvl_pcds_pfear_map[] = {
+	nvl_pcds_pfear_map,
+	NULL
+};
+
+static const struct pmc_bit_map nvl_pcds_ltr_show_map[] = {
+	{"SOUTHPORT_A",		CNP_PMC_LTR_SPA},
+	{"SOUTHPORT_B",		CNP_PMC_LTR_SPB},
+	{"SATA",		CNP_PMC_LTR_SATA},
+	{"GIGABIT_ETHERNET",	CNP_PMC_LTR_GBE},
+	{"XHCI",		CNP_PMC_LTR_XHCI},
+	{"SOUTHPORT_F",		ADL_PMC_LTR_SPF},
+	{"ME",			CNP_PMC_LTR_ME},
+	{"SATA1",		CNP_PMC_LTR_EVA},
+	{"SOUTHPORT_C",		CNP_PMC_LTR_SPC},
+	{"HD_AUDIO",		CNP_PMC_LTR_AZ},
+	{"CNV",			CNP_PMC_LTR_CNV},
+	{"LPSS",		CNP_PMC_LTR_LPSS},
+	{"SOUTHPORT_D",		CNP_PMC_LTR_SPD},
+	{"SOUTHPORT_E",		CNP_PMC_LTR_SPE},
+	{"SATA2",		PTL_PMC_LTR_SATA2},
+	{"ESPI",		CNP_PMC_LTR_ESPI},
+	{"SCC",			CNP_PMC_LTR_SCC},
+	{"ISH",			CNP_PMC_LTR_ISH},
+	{"UFSX2",		CNP_PMC_LTR_UFSX2},
+	{"EMMC",		CNP_PMC_LTR_EMMC},
+	{"WIGIG",		ICL_PMC_LTR_WIGIG},
+	{"THC0",		TGL_PMC_LTR_THC0},
+	{"THC1",		TGL_PMC_LTR_THC1},
+	{"SOUTHPORT_G",		MTL_PMC_LTR_SPG},
+	{"RSVD",		NVL_PCDS_PMC_LTR_RESERVED},
+	{"IOE_PMC",		MTL_PMC_LTR_IOE_PMC},
+	{"DMI3",		ARL_PMC_LTR_DMI3},
+	{"OSSE",		LNL_PMC_LTR_OSSE},
+
+	/* Below two cannot be used for LTR_IGNORE */
+	{"CURRENT_PLATFORM",	PTL_PMC_LTR_CUR_PLT},
+	{"AGGREGATED_SYSTEM",	PTL_PMC_LTR_CUR_ASLT},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcds_clocksource_status_map[] = {
+	{"AON2_OFF_STS",                 BIT(0),	1},
+	{"AON3_OFF_STS",                 BIT(1),	0},
+	{"AON4_OFF_STS",                 BIT(2),	1},
+	{"AON5_OFF_STS",                 BIT(3),	1},
+	{"AON1_OFF_STS",                 BIT(4),	0},
+	{"XTAL_LVM_OFF_STS",             BIT(5),	0},
+	{"D2D_OFF_STS",                  BIT(8),	1},
+	{"AON3_SPL_OFF_STS",             BIT(9),	1},
+	{"XTAL_AGGR_OFF_STS",            BIT(17),	1},
+	{"BCLK_EXT_INJ_OFF_STS",         BIT(18),	1},
+	{"DDI2_PLL_OFF_STS",             BIT(19),	1},
+	{"SE_TCSS_PLL_OFF_STS",          BIT(20),	1},
+	{"DDI_PLL_OFF_STS",              BIT(21),	1},
+	{"FILTER_PLL_OFF_STS",           BIT(22),	1},
+	{"PHY_OC_EXT_INJ_OFF_STS",       BIT(23),	1},
+	{"ACE_PLL_OFF_STS",              BIT(24),	0},
+	{"FABRIC_PLL_OFF_STS",           BIT(25),	1},
+	{"SOC_PLL_OFF_STS",              BIT(26),	1},
+	{"REF_PLL_OFF_STS",              BIT(28),	1},
+	{"GENLOCK_FILTER_PLL_OFF_STS",   BIT(30),	1},
+	{"RTC_PLL_OFF_STS",              BIT(31),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcds_power_gating_status_0_map[] = {
+	{"PMC_PGD0_PG_STS",              BIT(0),	0},
+	{"FUSE_OSSE_PGD0_PG_STS",	 BIT(1),	0},
+	{"ESPISPI_PGD0_PG_STS",          BIT(2),	0},
+	{"XHCI_PGD0_PG_STS",             BIT(3),	0},
+	{"SPA_PGD0_PG_STS",              BIT(4),	0},
+	{"SPB_PGD0_PG_STS",              BIT(5),	0},
+	{"RSVD_6",                       BIT(6),	0},
+	{"GBE_PGD0_PG_STS",              BIT(7),	0},
+	{"RSVD_8",                       BIT(8),	0},
+	{"RSVD_9",                       BIT(9),	0},
+	{"SBR16B7_PGD0_PG_STS",          BIT(10),	0},
+	{"SBR16B21_PGD0_PG_STS",         BIT(11),	0},
+	{"RSVD_12",                      BIT(12),	0},
+	{"D2D_DISP_PGD1_PG_STS",         BIT(13),	1},
+	{"LPSS_PGD0_PG_STS",             BIT(14),	0},
+	{"LPC_PGD0_PG_STS",              BIT(15),	0},
+	{"SMB_PGD0_PG_STS",              BIT(16),	0},
+	{"ISH_PGD0_PG_STS",              BIT(17),	0},
+	{"SBR16B1_PGD0_PG_STS",          BIT(18),	0},
+	{"NPK_PGD0_PG_STS",              BIT(19),	0},
+	{"D2D_NOC_PGD1_PG_STS",          BIT(20),	1},
+	{"DBG_SBR16B_PGD0_PG_STS",       BIT(21),	0},
+	{"FUSE_PGD0_PG_STS",             BIT(22),	0},
+	{"RSVD_23",                      BIT(23),	0},
+	{"P2SB0_PGD0_PG_STS",            BIT(24),	1},
+	{"XDCI_PGD0_PG_STS",             BIT(25),	0},
+	{"EXI_PGD0_PG_STS",              BIT(26),	0},
+	{"CSE_PGD0_PG_STS",              BIT(27),	1},
+	{"KVMCC_PGD0_PG_STS",            BIT(28),	0},
+	{"PMT_PGD0_PG_STS",              BIT(29),	0},
+	{"CLINK_PGD0_PG_STS",            BIT(30),	0},
+	{"PTIO_PGD0_PG_STS",             BIT(31),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcds_power_gating_status_1_map[] = {
+	{"USBR0_PGD0_PG_STS",            BIT(0),	0},
+	{"SBR16B22_PGD0_PG_STS",         BIT(1),	0},
+	{"SMT1_PGD0_PG_STS",             BIT(2),	0},
+	{"P2SB1_PGD0_PG_STS",            BIT(3),	1},
+	{"SMS2_PGD0_PG_STS",             BIT(4),	0},
+	{"SMS1_PGD0_PG_STS",             BIT(5),	0},
+	{"CSMERTC_PGD0_PG_STS",          BIT(6),	0},
+	{"CSMEPSF_PGD0_PG_STS",          BIT(7),	0},
+	{"D2D_NOC_PGD0_PG_STS",          BIT(8),	0},
+	{"RSVD_9",                       BIT(9),	0},
+	{"RSVD_10",                      BIT(10),	0},
+	{"RSVD_11",                      BIT(11),	0},
+	{"SBR16B2_PGD0_PG_STS",          BIT(12),	0},
+	{"OSSE_SMT1_PGD0_PG_STS",        BIT(13),	1},
+	{"D2D_DISP_PGD0_PG_STS",         BIT(14),	1},
+	{"RSVD_15",                      BIT(15),	0},
+	{"RSVD_16",                      BIT(16),	0},
+	{"DBG_PSF_PGD0_PG_STS",          BIT(17),	0},
+	{"RSVD_18",                      BIT(18),	0},
+	{"CNVI_PGD0_PG_STS",             BIT(19),	0},
+	{"UFSX2_PGD0_PG_STS",            BIT(20),	0},
+	{"ENDBG_PGD0_PG_STS",            BIT(21),	0},
+	{"DBC_PGD0_PG_STS",              BIT(22),	0},
+	{"SBR16B4_PGD0_PG_STS",          BIT(23),	0},
+	{"RSVD_24",                      BIT(24),	0},
+	{"NPK_PGD1_PG_STS",              BIT(25),	0},
+	{"RSVD_26",                      BIT(26),	0},
+	{"SBR16B20_PGD0_PG_STS",         BIT(27),	0},
+	{"RSVD_28",                      BIT(28),	0},
+	{"SBR8B20_PGD0_PG_STS",          BIT(29),	0},
+	{"RSVD_30",                      BIT(30),	0},
+	{"FIA_U_PGD0_PG_STS",            BIT(31),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcds_power_gating_status_2_map[] = {
+	{"PSF8_PGD0_PG_STS",             BIT(0),	0},
+	{"RSVD_1",                       BIT(1),	0},
+	{"RSVD_2",                       BIT(2),	0},
+	{"FIACPCB_U_PGD0_PG_STS",        BIT(3),	0},
+	{"TAM_PGD0_PG_STS",              BIT(4),	1},
+	{"D2D_NOC_PGD2_PG_STS",          BIT(5),	1},
+	{"SBR8B2_PGD0_PG_STS",           BIT(6),	0},
+	{"THC0_PGD0_PG_STS",             BIT(7),	0},
+	{"THC1_PGD0_PG_STS",             BIT(8),	0},
+	{"PMC_PGD1_PG_STS",              BIT(9),	0},
+	{"SBR16B3_PGD0_PG_STS",          BIT(10),	0},
+	{"TCSS_PGD0_PG_STS",             BIT(11),	0},
+	{"DISP_PGA_PGD0_PG_STS",         BIT(12),	0},
+	{"RSVD_13",                      BIT(13),	0},
+	{"RSVD_14",                      BIT(14),	0},
+	{"RSVD_15",                      BIT(15),	0},
+	{"SBRG_PGD0_PG_STS",             BIT(16),	0},
+	{"RSVD_17",                      BIT(17),	0},
+	{"SBR16B0_PGD0_PG_STS",          BIT(18),	0},
+	{"SBR8B0_PGD0_PG_STS",           BIT(19),	0},
+	{"PSF7_PGD0_PG_STS",             BIT(20),	0},
+	{"RSVD_21",                      BIT(21),	0},
+	{"RSVD_22",                      BIT(22),	0},
+	{"RSVD_23",                      BIT(23),	0},
+	{"SBR16B6_PGD0_PG_STS",          BIT(24),	0},
+	{"PSF0_PGD0_PG_STS",             BIT(25),	0},
+	{"STRC_PGD0_PG_STS",             BIT(26),	0},
+	{"RSVD_27",                      BIT(27),	0},
+	{"DBG_SBR_PGD0_PG_STS",          BIT(28),	0},
+	{"RSVD_29",                      BIT(29),	0},
+	{"OSSE_PGD0_PG_STS",             BIT(30),	1},
+	{"DISP_PGA1_PGD0_PG_STS",        BIT(31),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcds_d3_status_0_map[] = {
+	{"LPSS_D3_STS",                  BIT(3),	1},
+	{"XDCI_D3_STS",                  BIT(4),	1},
+	{"XHCI_D3_STS",                  BIT(5),	1},
+	{"SPA_D3_STS",                   BIT(12),	0},
+	{"SPB_D3_STS",                   BIT(13),	0},
+	{"ESPISPI_D3_STS",               BIT(18),	0},
+	{"PSTH_D3_STS",                  BIT(21),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcds_d3_status_1_map[] = {
+	{"OSSE_D3_STS",                  BIT(14),	0},
+	{"GBE_D3_STS",                   BIT(19),	0},
+	{"ITSS_D3_STS",                  BIT(23),	0},
+	{"CNVI_D3_STS",                  BIT(27),	0},
+	{"UFSX2_D3_STS",                 BIT(28),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcds_d3_status_2_map[] = {
+	{"CSMERTC_D3_STS",               BIT(1),	0},
+	{"CSE_D3_STS",                   BIT(4),	0},
+	{"KVMCC_D3_STS",                 BIT(5),	0},
+	{"USBR0_D3_STS",                 BIT(6),	0},
+	{"ISH_D3_STS",                   BIT(7),	0},
+	{"SMT1_D3_STS",                  BIT(8),	0},
+	{"SMT2_D3_STS",                  BIT(9),	0},
+	{"SMT3_D3_STS",                  BIT(10),	0},
+	{"OSSE_SMT1_D3_STS",             BIT(12),	0},
+	{"CLINK_D3_STS",                 BIT(14),	0},
+	{"PTIO_D3_STS",                  BIT(16),	0},
+	{"PMT_D3_STS",                   BIT(17),	0},
+	{"SMS1_D3_STS",                  BIT(18),	0},
+	{"SMS2_D3_STS",                  BIT(19),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcds_d3_status_3_map[] = {
+	{"OSSE_SMT2_D3_STS",             BIT(0),	0},
+	{"THC0_D3_STS",                  BIT(14),	1},
+	{"THC1_D3_STS",                  BIT(15),	1},
+	{"OSSE_SMT3_D3_STS",             BIT(19),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcds_vnn_req_status_0_map[] = {
+	{"LPSS_VNN_REQ_STS",             BIT(3),	0},
+	{"ESPISPI_VNN_REQ_STS",          BIT(18),	1},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcds_vnn_req_status_1_map[] = {
+	{"NPK_VNN_REQ_STS",              BIT(4),	1},
+	{"DFXAGG_VNN_REQ_STS",           BIT(8),	0},
+	{"EXI_VNN_REQ_STS",              BIT(9),	1},
+	{"OSSE_VNN_REQ_STS",             BIT(14),	1},
+	{"P2D_VNN_REQ_STS",              BIT(18),	1},
+	{"GBE_VNN_REQ_STS",              BIT(19),	0},
+	{"SMB_VNN_REQ_STS",              BIT(25),	1},
+	{"LPC_VNN_REQ_STS",              BIT(26),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcds_vnn_req_status_2_map[] = {
+	{"CSMERTC_VNN_REQ_STS",          BIT(1),	0},
+	{"CSE_VNN_REQ_STS",              BIT(4),	1},
+	{"ISH_VNN_REQ_STS",              BIT(7),	0},
+	{"SMT1_VNN_REQ_STS",             BIT(8),	0},
+	{"OSSE_SMT1_VNN_REQ_STS",        BIT(12),	1},
+	{"CLINK_VNN_REQ_STS",            BIT(14),	0},
+	{"SMS1_VNN_REQ_STS",             BIT(18),	0},
+	{"SMS2_VNN_REQ_STS",             BIT(19),	0},
+	{"GPIOCOM4_VNN_REQ_STS",         BIT(20),	0},
+	{"GPIOCOM3_VNN_REQ_STS",         BIT(21),	1},
+	{"GPIOCOM1_VNN_REQ_STS",         BIT(23),	1},
+	{"GPIOCOM0_VNN_REQ_STS",         BIT(24),	1},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcds_vnn_req_status_3_map[] = {
+	{"DISP_SHIM_VNN_REQ_STS",        BIT(4),	1},
+	{"DTS0_VNN_REQ_STS",             BIT(7),	0},
+	{"GPIOCOM5_VNN_REQ_STS",         BIT(11),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcds_vnn_misc_status_map[] = {
+	{"CPU_C10_REQ_STS",              BIT(0),	0},
+	{"TS_OFF_REQ_STS",               BIT(1),	0},
+	{"PNDE_MET_REQ_STS",             BIT(2),	1},
+	{"PG5_PMA0_REQ_STS",             BIT(3),	1},
+	{"FW_THROTTLE_ALLOWED_REQ_STS",  BIT(4),	0},
+	{"VNN_SOC_REQ_STS",              BIT(6),	1},
+	{"ISH_VNNAON_REQ_STS",           BIT(7),	0},
+	{"D2D_NOC_CFI_QACTIVE_REQ_STS",	 BIT(8),	1},
+	{"D2D_NOC_GPSB_QACTIVE_REQ_STS", BIT(9),	1},
+	{"PLT_GREATER_REQ_STS",          BIT(11),	1},
+	{"ALL_SBR_IDLE_REQ_STS",         BIT(12),	0},
+	{"PMC_IDLE_FB_OCP_REQ_STS",      BIT(13),	0},
+	{"PM_SYNC_STATES_REQ_STS",       BIT(14),	0},
+	{"EA_REQ_STS",                   BIT(15),	0},
+	{"MPHY_CORE_OFF_REQ_STS",        BIT(16),	0},
+	{"BRK_EV_EN_REQ_STS",            BIT(17),	0},
+	{"AUTO_DEMO_EN_REQ_STS",         BIT(18),	0},
+	{"ITSS_CLK_SRC_REQ_STS",         BIT(19),	1},
+	{"ARC_IDLE_REQ_STS",             BIT(21),	0},
+	{"PG5_PMA1_REQ_STS",             BIT(22),	1},
+	{"DG5_PMA0_REQ_STS",             BIT(23),	1},
+	{"ARC_INTERRUPT_WAKE_REQ_STS",   BIT(25),	0},
+	{"D2D_DISP_DDI_QACTIVE_REQ_STS", BIT(26),	1},
+	{"PRE_WAKE0_REQ_STS",            BIT(27),	1},
+	{"PRE_WAKE1_REQ_STS",            BIT(28),	1},
+	{"PRE_WAKE2_REQ_STS",            BIT(29),	1},
+	{"D2D_DISP_EDP_QACTIVE_REQ_STS", BIT(31),	1},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcds_rsc_status_map[] = {
+	{"CORE",		0,		1},
+	{"Memory",		0,		1},
+	{"PRIM_D2D",		0,		1},
+	{"PSF0",		0,		1},
+	{"SB",			0,		1},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pcds_signal_status_map[] = {
+	{"LSX_Wake0_STS",		 BIT(0),	0},
+	{"LSX_Wake1_STS",		 BIT(1),	0},
+	{"LSX_Wake2_STS",		 BIT(2),	0},
+	{"LSX_Wake3_STS",		 BIT(3),	0},
+	{"LSX_Wake4_STS",		 BIT(4),	0},
+	{"LSX_Wake5_STS",		 BIT(5),	0},
+	{"LSX_Wake6_STS",		 BIT(6),	0},
+	{"LSX_Wake7_STS",		 BIT(7),	0},
+	{"LPSS_Wake0_STS",		 BIT(8),	1},
+	{"LPSS_Wake1_STS",		 BIT(9),	1},
+	{"Int_Timer_SS_Wake0_STS",	 BIT(10),	1},
+	{"Int_Timer_SS_Wake1_STS",	 BIT(11),	1},
+	{"Int_Timer_SS_Wake2_STS",	 BIT(12),	1},
+	{"Int_Timer_SS_Wake3_STS",	 BIT(13),	1},
+	{"Int_Timer_SS_Wake4_STS",	 BIT(14),	1},
+	{"Int_Timer_SS_Wake5_STS",	 BIT(15),	1},
+	{}
+};
+
+static const struct pmc_bit_map *nvl_pcds_lpm_maps[] = {
+	nvl_pcds_clocksource_status_map,
+	nvl_pcds_power_gating_status_0_map,
+	nvl_pcds_power_gating_status_1_map,
+	nvl_pcds_power_gating_status_2_map,
+	nvl_pcds_d3_status_0_map,
+	nvl_pcds_d3_status_1_map,
+	nvl_pcds_d3_status_2_map,
+	nvl_pcds_d3_status_3_map,
+	nvl_pcds_vnn_req_status_0_map,
+	nvl_pcds_vnn_req_status_1_map,
+	nvl_pcds_vnn_req_status_2_map,
+	nvl_pcds_vnn_req_status_3_map,
+	nvl_pcds_vnn_misc_status_map,
+	nvl_pcds_signal_status_map,
+	NULL
+};
+
+static const struct pmc_bit_map *nvl_pcds_blk_maps[] = {
+	nvl_pcds_power_gating_status_0_map,
+	nvl_pcds_power_gating_status_1_map,
+	nvl_pcds_power_gating_status_2_map,
+	nvl_pcds_rsc_status_map,
+	nvl_pcds_vnn_req_status_0_map,
+	nvl_pcds_vnn_req_status_1_map,
+	nvl_pcds_vnn_req_status_2_map,
+	nvl_pcds_vnn_req_status_3_map,
+	nvl_pcds_d3_status_0_map,
+	nvl_pcds_d3_status_1_map,
+	nvl_pcds_d3_status_2_map,
+	nvl_pcds_d3_status_3_map,
+	nvl_pcds_clocksource_status_map,
+	nvl_pcds_vnn_misc_status_map,
+	nvl_pcds_signal_status_map,
+	NULL
+};
+
+static const struct pmc_bit_map nvl_pchs_pfear_map[] = {
+	{"PMC_PGD0",                 BIT(0)},
+	{"FIA_D_PGD0",               BIT(1)},
+	{"SPI_PGD0",                 BIT(2)},
+	{"XHCI_PGD0",                BIT(3)},
+	{"SPA_PGD0",                 BIT(4)},
+	{"SPB_PGD0",                 BIT(5)},
+	{"MPFPW2_PGD0",              BIT(6)},
+	{"GBE_PGD0",                 BIT(7)},
+
+	{"RSVD8",                    BIT(0)},
+	{"PSF3_PGD0",                BIT(1)},
+	{"SBR5_PGD0",                BIT(2)},
+	{"SBR0_PGD0",                BIT(3)},
+	{"RSVD12",                   BIT(4)},
+	{"D2D_DISP_PGD1",            BIT(5)},
+	{"LPSS_PGD0",                BIT(6)},
+	{"LPC_PGD0",                 BIT(7)},
+
+	{"SMB_PGD0",                 BIT(0)},
+	{"ISH_PGD0",                 BIT(1)},
+	{"P2SB_PGD0",                BIT(2)},
+	{"NPK_PGD0",                 BIT(3)},
+	{"D2D_NOC_PGD1",             BIT(4)},
+	{"EAH_PGD0",                 BIT(5)},
+	{"FUSE_PGD0",                BIT(6)},
+	{"SBR8_PGD0",                BIT(7)},
+
+	{"PSF7_PGD0",                BIT(0)},
+	{"OTG_PGD0",                 BIT(1)},
+	{"EXI_PGD0",                 BIT(2)},
+	{"CSE_PGD0",                 BIT(3)},
+	{"CSME_KVM_PGD0",            BIT(4)},
+	{"CSME_PMT_PGD0",            BIT(5)},
+	{"CSME_CLINK_PGD0",          BIT(6)},
+	{"CSME_PTIO_PGD0",           BIT(7)},
+
+	{"CSME_USBR_PGD0",           BIT(0)},
+	{"SBR1_PGD0",                BIT(1)},
+	{"CSME_SMT1_PGD0",           BIT(2)},
+	{"MPFPW1_PGD0",              BIT(3)},
+	{"CSME_SMS2_PGD0",           BIT(4)},
+	{"CSME_SMS_PGD0",            BIT(5)},
+	{"CSME_RTC_PGD0",            BIT(6)},
+	{"CSMEPSF_PGD0",             BIT(7)},
+
+	{"D2D_NOC_PGD0",             BIT(0)},
+	{"ESE_PGD0",                 BIT(1)},
+	{"SBR2_PGD0",                BIT(2)},
+	{"SBR3_PGD0",                BIT(3)},
+	{"SBR4_PGD0",                BIT(4)},
+	{"RSVD45",                   BIT(5)},
+	{"D2D_DISP_PGD0",            BIT(6)},
+	{"PSF1_PGD0",                BIT(7)},
+
+	{"U3FPW1_PGD0",              BIT(0)},
+	{"DMI3FPW_PGD0",             BIT(1)},
+	{"PSF4_PGD0",                BIT(2)},
+	{"CNVI_PGD0",                BIT(3)},
+	{"RSVD52",                   BIT(4)},
+	{"ENDBG_PGD0",               BIT(5)},
+	{"DBC_PGD0",                 BIT(6)},
+	{"SMT4_PGD0",                BIT(7)},
+
+	{"RSVD56",                   BIT(0)},
+	{"NPK_PGD1",                 BIT(1)},
+	{"RSVD58",                   BIT(2)},
+	{"DMI3_PGD0",                BIT(3)},
+	{"RSVD60",                   BIT(4)},
+	{"FIACPCB_D_PGD0",           BIT(5)},
+	{"RSVD62",                   BIT(6)},
+	{"FIA_U_PGD0",               BIT(7)},
+
+	{"FIACPCB_PGS_PGD0",         BIT(0)},
+	{"FIA_PGS_PGD0",             BIT(1)},
+	{"RSVD66",                   BIT(2)},
+	{"FIACPCB_U_PGD0",           BIT(3)},
+	{"TAM_PGD0",                 BIT(4)},
+	{"D2D_NOC_PGD2",             BIT(5)},
+	{"PSF2_PGD0",                BIT(6)},
+	{"THC0_PGD0",                BIT(7)},
+
+	{"THC1_PGD0",                BIT(0)},
+	{"PMC_PGD1",                 BIT(1)},
+	{"SBR9_PGD0",                BIT(2)},
+	{"U3FPW2_PGD0",              BIT(3)},
+	{"RSVD76",                   BIT(4)},
+	{"DBG_PSF_PGD0",             BIT(5)},
+	{"DBG_SBR_PGD0",             BIT(6)},
+	{"SBR6_PGD0",                BIT(7)},
+
+	{"SPC_PGD0",                 BIT(0)},
+	{"ACE_PGD0",                 BIT(1)},
+	{"ACE_PGD1",                 BIT(2)},
+	{"ACE_PGD2",                 BIT(3)},
+	{"ACE_PGD3",                 BIT(4)},
+	{"ACE_PGD4",                 BIT(5)},
+	{"ACE_PGD5",                 BIT(6)},
+	{"ACE_PGD6",                 BIT(7)},
+
+	{"ACE_PGD7",                 BIT(0)},
+	{"ACE_PGD8",                 BIT(1)},
+	{"ACE_PGD9",                 BIT(2)},
+	{"ACE_PGD10",                BIT(3)},
+	{"U3FPW3_PGD0",              BIT(4)},
+	{"SBR7_PGD0",                BIT(5)},
+	{"OSSE_PGD0",                BIT(6)},
+	{"ST_PGD0",                  BIT(7)},
+	{}
+};
+
+static const struct pmc_bit_map *ext_nvl_pchs_pfear_map[] = {
+	nvl_pchs_pfear_map,
+	NULL
+};
+
+static const struct pmc_bit_map nvl_pchs_clocksource_status_map[] = {
+	{"AON2_OFF_STS",                 BIT(0),	1},
+	{"AON3_OFF_STS",                 BIT(1),	0},
+	{"AON4_OFF_STS",                 BIT(2),	0},
+	{"AON2_SPL_OFF_STS",             BIT(3),	0},
+	{"AONL_OFF_STS",                 BIT(4),	0},
+	{"XTAL_LVM_OFF_STS",             BIT(5),	0},
+	{"AON5_OFF_STS",                 BIT(6),	0},
+	{"USB3_PLL_OFF_STS",             BIT(8),	1},
+	{"MAIN_CRO_OFF_STS",             BIT(11),	0},
+	{"MAIN_DIVIDER_OFF_STS",         BIT(12),	1},
+	{"REF_PLL_NON_OC_OFF_STS",       BIT(13),	1},
+	{"DMI_PLL_OFF_STS",              BIT(14),	1},
+	{"PHY_EXT_INJ_OFF_STS",          BIT(15),	1},
+	{"AON6_MCRO_OFF_STS",            BIT(16),	0},
+	{"XTAL_AGGR_OFF_STS",            BIT(17),	0},
+	{"USB2_PLL_OFF_STS",             BIT(18),	1},
+	{"GBE_PLL_OFF_STS",              BIT(21),	1},
+	{"SATA_PLL_OFF_STS",             BIT(22),	1},
+	{"PCIE0_PLL_OFF_STS",            BIT(23),	1},
+	{"PCIE1_PLL_OFF_STS",            BIT(24),	1},
+	{"FABRIC_PLL_OFF_STS",           BIT(25),	1},
+	{"PCIE2_PLL_OFF_STS",            BIT(26),	1},
+	{"REF_PLL_OFF_STS",              BIT(28),	1},
+	{"REF38P4_PLL_OFF_STS",          BIT(31),	1},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pchs_power_gating_status_0_map[] = {
+	{"PMC_PGD0_PG_STS",              BIT(0),	0},
+	{"FIA_D_PGD0_PG_STS",            BIT(1),	0},
+	{"ESPISPI_PGD0_PG_STS",          BIT(2),	0},
+	{"XHCI_PGD0_PG_STS",             BIT(3),	0},
+	{"SPA_PGD0_PG_STS",              BIT(4),	1},
+	{"SPB_PGD0_PG_STS",              BIT(5),	1},
+	{"MPFPW2_PGD0_PG_STS",           BIT(6),	0},
+	{"GBE_PGD0_PG_STS",              BIT(7),	1},
+	{"RSVD_8",                       BIT(8),	0},
+	{"PSF3_PGD0_PG_STS",             BIT(9),	0},
+	{"SBR5_PGD0_PG_STS",             BIT(10),	0},
+	{"SBR0_PGD0_PG_STS",             BIT(11),	0},
+	{"RSVD_12",                      BIT(12),	0},
+	{"D2D_DISP_PGD1_PG_STS",         BIT(13),	0},
+	{"LPSS_PGD0_PG_STS",             BIT(14),	1},
+	{"LPC_PGD0_PG_STS",              BIT(15),	0},
+	{"SMB_PGD0_PG_STS",              BIT(16),	0},
+	{"ISH_PGD0_PG_STS",              BIT(17),	0},
+	{"P2S_PGD0_PG_STS",              BIT(18),	0},
+	{"NPK_PGD0_PG_STS",              BIT(19),	0},
+	{"D2D_NOC_PGD1_PG_STS",          BIT(20),	0},
+	{"EAH_PGD0_PG_STS",              BIT(21),	0},
+	{"FUSE_PGD0_PG_STS",             BIT(22),	0},
+	{"SBR8_PGD0_PG_STS",             BIT(23),	0},
+	{"PSF7_PGD0_PG_STS",             BIT(24),	0},
+	{"XDCI_PGD0_PG_STS",             BIT(25),	1},
+	{"EXI_PGD0_PG_STS",              BIT(26),	0},
+	{"CSE_PGD0_PG_STS",              BIT(27),	1},
+	{"KVMCC_PGD0_PG_STS",            BIT(28),	1},
+	{"PMT_PGD0_PG_STS",              BIT(29),	1},
+	{"CLINK_PGD0_PG_STS",            BIT(30),	1},
+	{"PTIO_PGD0_PG_STS",             BIT(31),	1},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pchs_power_gating_status_1_map[] = {
+	{"USBR0_PGD0_PG_STS",            BIT(0),	1},
+	{"SBR1_PGD0_PG_STS",             BIT(1),	0},
+	{"SMT1_PGD0_PG_STS",             BIT(2),	1},
+	{"MPFPW1_PGD0_PG_STS",           BIT(3),	0},
+	{"SMS2_PGD0_PG_STS",             BIT(4),	1},
+	{"SMS1_PGD0_PG_STS",             BIT(5),	1},
+	{"CSMERTC_PGD0_PG_STS",          BIT(6),	0},
+	{"CSMEPSF_PGD0_PG_STS",          BIT(7),	0},
+	{"D2D_NOC_PGD0_PG_STS",          BIT(8),	0},
+	{"ESE_PGD0_PG_STS",              BIT(9),	1},
+	{"SBR2_PGD0_PG_STS",             BIT(10),	0},
+	{"SBR3_PGD0_PG_STS",             BIT(11),	0},
+	{"SBR4_PGD0_PG_STS",             BIT(12),	0},
+	{"RSVD_13",                      BIT(13),	0},
+	{"D2D_DISP_PGD0_PG_STS",         BIT(14),	0},
+	{"PSF1_PGD0_PG_STS",             BIT(15),	0},
+	{"U3FPW1_PGD0_PG_STS",           BIT(16),	0},
+	{"DMI3FPW_PGD0_PG_STS",          BIT(17),	0},
+	{"PSF4_PGD0_PG_STS",             BIT(18),	0},
+	{"CNVI_PGD0_PG_STS",             BIT(19),	0},
+	{"RSVD_20",                      BIT(20),	0},
+	{"ENDBG_PGD0_PG_STS",            BIT(21),	0},
+	{"DBC_PGD0_PG_STS",              BIT(22),	0},
+	{"SMT4_PGD0_PG_STS",             BIT(23),	1},
+	{"RSVD_24",                      BIT(24),	0},
+	{"NPK_PGD1_PG_STS",              BIT(25),	0},
+	{"RSVD_26",                      BIT(26),	0},
+	{"DMI3_PGD0_PG_STS",             BIT(27),	1},
+	{"RSVD_28",                      BIT(28),	0},
+	{"FIACPCB_D_PGD0_PG_STS",        BIT(29),	0},
+	{"RSVD_30",                      BIT(30),	0},
+	{"FIA_U_PGD0_PG_STS",            BIT(31),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pchs_power_gating_status_2_map[] = {
+	{"FIACPCB_PGS_PGD0_PG_STS",      BIT(0),	0},
+	{"FIA_PGS_PGD0_PG_STS",          BIT(1),	0},
+	{"RSVD_2",                       BIT(2),	0},
+	{"FIACPCB_U_PGD0_PG_STS",        BIT(3),	0},
+	{"TAM_PGD0_PG_STS",              BIT(4),	0},
+	{"D2D_NOC_PGD2_PG_STS",          BIT(5),	0},
+	{"PSF2_PGD0_PG_STS",             BIT(6),	0},
+	{"THC0_PGD0_PG_STS",             BIT(7),	1},
+	{"THC1_PGD0_PG_STS",             BIT(8),	1},
+	{"PMC_PGD1_PG_STS",              BIT(9),	0},
+	{"SBR9_PGA0_PGD0_PG_STS",        BIT(10),	0},
+	{"U3FPW2_PGD0_PG_STS",           BIT(11),	0},
+	{"RSVD_12",                      BIT(12),	0},
+	{"DBG_PSF_PGD0_PG_STS",          BIT(13),	0},
+	{"DBG_SBR_PGD0_PG_STS",          BIT(14),	0},
+	{"SBR6_PGD0_PG_STS",             BIT(15),	0},
+	{"SPC_PGD0_PG_STS",              BIT(16),	1},
+	{"ACE_PGD0_PG_STS",              BIT(17),	0},
+	{"ACE_PGD1_PG_STS",              BIT(18),	0},
+	{"ACE_PGD2_PG_STS",              BIT(19),	0},
+	{"ACE_PGD3_PG_STS",              BIT(20),	0},
+	{"ACE_PGD4_PG_STS",              BIT(21),	0},
+	{"ACE_PGD5_PG_STS",              BIT(22),	0},
+	{"ACE_PGD6_PG_STS",              BIT(23),	0},
+	{"ACE_PGD7_PG_STS",              BIT(24),	0},
+	{"ACE_PGD8_PG_STS",              BIT(25),	0},
+	{"ACE_PGD9_PG_STS",              BIT(26),	0},
+	{"ACE_PGD10_PG_STS",             BIT(27),	0},
+	{"U3FPW3_PGD0_PG_STS",           BIT(28),	0},
+	{"SBR7_PGD0_PG_STS",             BIT(29),	0},
+	{"OSSE_PGD0_PG_STS",             BIT(30),	0},
+	{"SATA_PGD0_PG_STS",             BIT(31),	1},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pchs_d3_status_0_map[] = {
+	{"LPSS_D3_STS",                  BIT(3),	1},
+	{"XDCI_D3_STS",                  BIT(4),	1},
+	{"XHCI_D3_STS",                  BIT(5),	0},
+	{"SPA_D3_STS",                   BIT(12),	0},
+	{"SPB_D3_STS",                   BIT(13),	0},
+	{"SPC_D3_STS",                   BIT(14),	0},
+	{"ESPISPI_D3_STS",               BIT(18),	0},
+	{"SATA_D3_STS",                  BIT(20),	1},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pchs_d3_status_1_map[] = {
+	{"OSSE_D3_STS",                  BIT(6),	0},
+	{"GBE_D3_STS",                   BIT(19),	0},
+	{"ITSS_D3_STS",                  BIT(23),	0},
+	{"P2S_D3_STS",                   BIT(24),	0},
+	{"CNVI_D3_STS",                  BIT(27),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pchs_d3_status_2_map[] = {
+	{"CSMERTC_D3_STS",               BIT(1),	0},
+	{"CSE_D3_STS",                   BIT(4),	0},
+	{"KVMCC_D3_STS",                 BIT(5),	0},
+	{"USBR0_D3_STS",                 BIT(6),	0},
+	{"ISH_D3_STS",                   BIT(7),	0},
+	{"SMT1_D3_STS",                  BIT(8),	0},
+	{"SMT2_D3_STS",                  BIT(9),	0},
+	{"SMT3_D3_STS",                  BIT(10),	0},
+	{"SMT4_D3_STS",                  BIT(11),	0},
+	{"SMT5_D3_STS",                  BIT(12),	0},
+	{"SMT6_D3_STS",                  BIT(13),	0},
+	{"CLINK_D3_STS",                 BIT(14),	0},
+	{"PTIO_D3_STS",                  BIT(16),	0},
+	{"PMT_D3_STS",                   BIT(17),	0},
+	{"SMS1_D3_STS",                  BIT(18),	0},
+	{"SMS2_D3_STS",                  BIT(19),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pchs_d3_status_3_map[] = {
+	{"THC0_D3_STS",                  BIT(14),	0},
+	{"THC1_D3_STS",                  BIT(15),	0},
+	{"ACE_D3_STS",                   BIT(23),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pchs_vnn_req_status_1_map[] = {
+	{"NPK_VNN_REQ_STS",              BIT(4),	0},
+	{"OSSE_VNN_REQ_STS",             BIT(6),	0},
+	{"DFXAGG_VNN_REQ_STS",           BIT(8),	0},
+	{"EXI_VNN_REQ_STS",              BIT(9),	0},
+	{"GBE_VNN_REQ_STS",              BIT(19),	0},
+	{"SMB_VNN_REQ_STS",              BIT(25),	0},
+	{"LPC_VNN_REQ_STS",              BIT(26),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pchs_vnn_req_status_2_map[] = {
+	{"CSMERTC_VNN_REQ_STS",          BIT(1),	0},
+	{"CSE_VNN_REQ_STS",              BIT(4),	0},
+	{"ISH_VNN_REQ_STS",              BIT(7),	0},
+	{"SMT1_VNN_REQ_STS",             BIT(8),	0},
+	{"SMT4_VNN_REQ_STS",             BIT(11),	0},
+	{"CLINK_VNN_REQ_STS",            BIT(14),	0},
+	{"SMS1_VNN_REQ_STS",             BIT(18),	0},
+	{"SMS2_VNN_REQ_STS",             BIT(19),	0},
+	{"GPIOCOM4_VNN_REQ_STS",         BIT(20),	0},
+	{"GPIOCOM3_VNN_REQ_STS",         BIT(21),	0},
+	{"GPIOCOM2_VNN_REQ_STS",         BIT(22),	0},
+	{"GPIOCOM1_VNN_REQ_STS",         BIT(23),	0},
+	{"GPIOCOM0_VNN_REQ_STS",         BIT(24),	0},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pchs_vnn_misc_status_map[] = {
+	{"CPU_C10_REQ_STS",              BIT(0),	0},
+	{"TS_OFF_REQ_STS",               BIT(1),	0},
+	{"PNDE_MET_REQ_STS",             BIT(2),	1},
+	{"PG5_PMA0_GVNN_REQ_STS",        BIT(3),	1},
+	{"FW_THROTTLE_ALLOWED_REQ_STS",  BIT(4),	0},
+	{"DMI_IN_L1_REQ_STS",            BIT(6),	0},
+	{"ISH_VNNAON_REQ_STS",           BIT(7),	0},
+	{"PLT_GREATER_REQ_STS",          BIT(11),	1},
+	{"ALL_SBR_IDLE_REQ_STS",         BIT(12),	0},
+	{"PMC_IDLE_FB_OCP_REQ_STS",      BIT(13),	0},
+	{"PM_SYNC_STATES_REQ_STS",       BIT(14),	0},
+	{"EA_REQ_STS",                   BIT(15),	0},
+	{"DMI_CLKREQ_B_REQ_STS",         BIT(16),	0},
+	{"BRK_EV_EN_REQ_STS",            BIT(17),	0},
+	{"AUTO_DEMO_EN_REQ_STS",         BIT(18),	0},
+	{"ITSS_CLK_SRC_REQ_STS",         BIT(19),	1},
+	{"ARC_IDLE_REQ_STS",             BIT(21),	0},
+	{"PG5_PMA1_GVNN_REQ_STS",        BIT(22),	1},
+	{"FIA_DEEP_PM_REQ_STS",          BIT(23),	0},
+	{"XDCI_ATTACHED_REQ_STS",        BIT(24),	0},
+	{"ARC_INTERRUPT_WAKE_REQ_STS",   BIT(25),	0},
+	{"PRE_WAKE0_REQ_STS",            BIT(27),	1},
+	{"PRE_WAKE1_REQ_STS",            BIT(28),	1},
+	{"PRE_WAKE2_EN_REQ_STS",         BIT(29),	0},
+	{"PG5_PMA2_GVNN_REQ_STS",        BIT(30),	1},
+	{}
+};
+
+static const struct pmc_bit_map nvl_pchs_rsc_status_map[] = {
+	{"Memory",		0,		1},
+	{"Memory_NS",		0,		1},
+	{"PSF1",		0,		1},
+	{"PSF2",		0,		1},
+	{"PSF3",		0,		1},
+	{"REF_PLL",		0,		1},
+	{"SB",			0,		1},
+	{}
+};
+
+static const struct pmc_bit_map *nvl_pchs_lpm_maps[] = {
+	nvl_pchs_clocksource_status_map,
+	nvl_pchs_power_gating_status_0_map,
+	nvl_pchs_power_gating_status_1_map,
+	nvl_pchs_power_gating_status_2_map,
+	nvl_pchs_d3_status_0_map,
+	nvl_pchs_d3_status_1_map,
+	nvl_pchs_d3_status_2_map,
+	nvl_pchs_d3_status_3_map,
+	nvl_pcds_vnn_req_status_0_map,
+	nvl_pchs_vnn_req_status_1_map,
+	nvl_pchs_vnn_req_status_2_map,
+	nvl_pcdh_vnn_req_status_3_map,
+	nvl_pchs_vnn_misc_status_map,
+	ptl_pcdp_signal_status_map,
+	NULL
+};
+
+static const struct pmc_bit_map *nvl_pchs_blk_maps[] = {
+	nvl_pchs_power_gating_status_0_map,
+	nvl_pchs_power_gating_status_1_map,
+	nvl_pchs_power_gating_status_2_map,
+	nvl_pchs_rsc_status_map,
+	nvl_pchs_d3_status_0_map,
+	nvl_pchs_clocksource_status_map,
+	nvl_pchs_vnn_misc_status_map,
+	NULL
+};
+
+static const struct pmc_reg_map nvl_pcdh_reg_map = {
+	.pfear_sts = ext_nvl_pcdh_pfear_map,
+	.slp_s0_offset = CNP_PMC_SLP_S0_RES_COUNTER_OFFSET,
+	.slp_s0_res_counter_step = TGL_PMC_SLP_S0_RES_COUNTER_STEP,
+	.ltr_show_sts = ptl_pcdp_ltr_show_map,
+	.msr_sts = msr_map,
+	.ltr_ignore_offset = CNP_PMC_LTR_IGNORE_OFFSET,
+	.regmap_length = NVL_PCDH_PMC_MMIO_REG_LEN,
+	.ppfear0_offset = CNP_PMC_HOST_PPFEAR0A,
+	.ppfear_buckets = NVL_PCDH_PPFEAR_NUM_ENTRIES,
+	.pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET,
+	.pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT,
+	.lpm_num_maps = NVL_LPM_NUM_MAPS,
+	.ltr_ignore_max = LNL_NUM_IP_IGN_ALLOWED,
+	.lpm_res_counter_step_x2 = TGL_PMC_LPM_RES_COUNTER_STEP_X2,
+	.etr3_offset = ETR3_OFFSET,
+	.lpm_sts_latch_en_offset = MTL_LPM_STATUS_LATCH_EN_OFFSET,
+	.lpm_priority_offset = NVL_LPM_PRI_OFFSET,
+	.lpm_en_offset = NVL_LPM_EN_OFFSET,
+	.lpm_residency_offset = NVL_LPM_RESIDENCY_OFFSET,
+	.lpm_sts = nvl_pcdh_lpm_maps,
+	.lpm_status_offset = MTL_LPM_STATUS_OFFSET,
+	.lpm_live_status_offset = NVL_LPM_LIVE_STATUS_OFFSET,
+	.s0ix_blocker_maps = nvl_pcdh_blk_maps,
+	.s0ix_blocker_offset = LNL_S0IX_BLOCKER_OFFSET,
+	.num_s0ix_blocker = NVL_PCDH_NUM_S0IX_BLOCKER,
+	.blocker_req_offset = NVL_PCDH_BLK_REQ_OFFSET,
+	.lpm_req_guid = PCDH_LPM_REQ_GUID,
+};
+
+static const struct pmc_reg_map nvl_pcds_reg_map = {
+	.pfear_sts = ext_nvl_pcds_pfear_map,
+	.slp_s0_offset = CNP_PMC_SLP_S0_RES_COUNTER_OFFSET,
+	.slp_s0_res_counter_step = TGL_PMC_SLP_S0_RES_COUNTER_STEP,
+	.ltr_show_sts = nvl_pcds_ltr_show_map,
+	.msr_sts = msr_map,
+	.ltr_ignore_offset = CNP_PMC_LTR_IGNORE_OFFSET,
+	.regmap_length = NVL_PCDS_PMC_MMIO_REG_LEN,
+	.ppfear0_offset = CNP_PMC_HOST_PPFEAR0A,
+	.ppfear_buckets = LNL_PPFEAR_NUM_ENTRIES,
+	.pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET,
+	.pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT,
+	.lpm_num_maps = PTL_LPM_NUM_MAPS,
+	.ltr_ignore_max = LNL_NUM_IP_IGN_ALLOWED,
+	.lpm_res_counter_step_x2 = TGL_PMC_LPM_RES_COUNTER_STEP_X2,
+	.etr3_offset = ETR3_OFFSET,
+	.lpm_sts_latch_en_offset = MTL_LPM_STATUS_LATCH_EN_OFFSET,
+	.lpm_priority_offset = MTL_LPM_PRI_OFFSET,
+	.lpm_en_offset = MTL_LPM_EN_OFFSET,
+	.lpm_residency_offset = MTL_LPM_RESIDENCY_OFFSET,
+	.lpm_sts = nvl_pcds_lpm_maps,
+	.lpm_status_offset = MTL_LPM_STATUS_OFFSET,
+	.lpm_live_status_offset = MTL_LPM_LIVE_STATUS_OFFSET,
+	.s0ix_blocker_maps = nvl_pcds_blk_maps,
+	.s0ix_blocker_offset = LNL_S0IX_BLOCKER_OFFSET,
+	.num_s0ix_blocker = NVL_PCDS_NUM_S0IX_BLOCKER,
+	.lpm_req_guid = PCDS_LPM_REQ_GUID,
+	.blocker_req_offset = NVL_PCDS_BLK_REQ_OFFSET,
+};
+
+static const struct pmc_reg_map nvl_pchs_reg_map = {
+	.pfear_sts = ext_nvl_pchs_pfear_map,
+	.slp_s0_offset = CNP_PMC_SLP_S0_RES_COUNTER_OFFSET,
+	.slp_s0_res_counter_step = TGL_PMC_SLP_S0_RES_COUNTER_STEP,
+	.ltr_show_sts = ptl_pcdp_ltr_show_map,
+	.msr_sts = msr_map,
+	.ltr_ignore_offset = CNP_PMC_LTR_IGNORE_OFFSET,
+	.regmap_length = NVL_PCHS_PMC_MMIO_REG_LEN,
+	.ppfear0_offset = CNP_PMC_HOST_PPFEAR0A,
+	.ppfear_buckets = LNL_PPFEAR_NUM_ENTRIES,
+	.pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET,
+	.pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT,
+	.lpm_num_maps = PTL_LPM_NUM_MAPS,
+	.ltr_ignore_max = LNL_NUM_IP_IGN_ALLOWED,
+	.lpm_res_counter_step_x2 = TGL_PMC_LPM_RES_COUNTER_STEP_X2,
+	.etr3_offset = ETR3_OFFSET,
+	.lpm_sts_latch_en_offset = MTL_LPM_STATUS_LATCH_EN_OFFSET,
+	.lpm_priority_offset = MTL_LPM_PRI_OFFSET,
+	.lpm_en_offset = MTL_LPM_EN_OFFSET,
+	.lpm_residency_offset = MTL_LPM_RESIDENCY_OFFSET,
+	.lpm_sts = nvl_pchs_lpm_maps,
+	.lpm_status_offset = MTL_LPM_STATUS_OFFSET,
+	.lpm_live_status_offset = MTL_LPM_LIVE_STATUS_OFFSET,
+	.s0ix_blocker_maps = nvl_pchs_blk_maps,
+	.s0ix_blocker_offset = LNL_S0IX_BLOCKER_OFFSET,
+	.num_s0ix_blocker = NVL_PCHS_NUM_S0IX_BLOCKER,
+	.blocker_req_offset = NVL_PCHS_BLK_REQ_OFFSET,
+	.lpm_req_guid = PCHS_LPM_REQ_GUID,
+};
+
+static struct pmc_info nvl_pmc_info_list[] = {
+	{
+		.devid	= PMC_DEVID_NVL_PCDH,
+		.map	= &nvl_pcdh_reg_map,
+	},
+	{
+		.devid  = PMC_DEVID_NVL_PCDS,
+		.map    = &nvl_pcds_reg_map,
+	},
+	{
+		.devid  = PMC_DEVID_NVL_PCHS,
+		.map    = &nvl_pchs_reg_map,
+	},
+	{}
+};
+
+const char *nvl_ltr_block_counter_arr[] = {
+	"PKGC_PREVENT_LTR_IADOMAIN",
+	"PKGC_PREVENT_LTR_GDIE",
+	"PKGC_PREVENT_LTR_PCH",
+	"PKGC_PREVENT_LTR_DISPLAY",
+	"PKGC_PREVENT_LTR_IPU",
+	NULL
+};
+
+const char *nvl_pkgc_blocker_residency[] = {
+	"PKGC_BLOCK_RESIDENCY_INVALID",
+	"PKGC_BLOCK_RESIDENCY_MISC",
+	"PKGC_BLOCK_RESIDENCY_CDIE_MISC",
+	"PKGC_BLOCK_RESIDENCY_MEDIA_MISC",
+	"PKGC_BLOCK_RESIDENCY_GT_MISC",
+	"PKGC_BLOCK_RESIDENCY_HUBATOM_MISC",
+	"PKGC_BLOCK_RESIDENCY_IPU_BUSY",
+	"PKGC_BLOCK_RESIDENCY_IPU_LTR",
+	"PKGC_BLOCK_RESIDENCY_IPU_TIMER",
+	"PKGC_BLOCK_RESIDENCY_DISP_BUSY",
+	"PKGC_BLOCK_RESIDENCY_DISP_LTR",
+	"PKGC_BLOCK_RESIDENCY_DISP_TIMER",
+	"PKGC_BLOCK_RESIDENCY_VPU_BUSY",
+	"PKGC_BLOCK_RESIDENCY_VPU_TIMER",
+	"PKGC_BLOCK_RESIDENCY_PMC_BUSY",
+	"PKGC_BLOCK_RESIDENCY_PMC_LTR",
+	"PKGC_BLOCK_RESIDENCY_PMC_TIMER",
+	"PKGC_BLOCK_RESIDENCY_HUBATOM_ARAT",
+	"PKGC_BLOCK_RESIDENCY_CDIE0_ARAT",
+	"PKGC_BLOCK_RESIDENCY_CDIE1_ARAT",
+	"PKGC_BLOCK_RESIDENCY_GT_ARAT",
+	"PKGC_BLOCK_RESIDENCY_MEDIA_ARAT",
+	"PKGC_BLOCK_RESIDENCY_DEMOTION",
+	"PKGC_BLOCK_RESIDENCY_THERMALS",
+	"PKGC_BLOCK_RESIDENCY_SNCU",
+	"PKGC_BLOCK_RESIDENCY_SVTU",
+	"PKGC_BLOCK_RESIDENCY_IAA",
+	"PKGC_BLOCK_RESIDENCY_IOC",
+	NULL,
+};
+
+static u8 nvl_pmc_list[] = {PMC_IDX_MAIN, PMC_IDX_PCH};
+static u8 nvl_h_pmc_list[] = {PMC_IDX_MAIN, PMC_IDX_PCH};
+
+#define NVL_NPU_PCI_DEV                0xd71d
+
+/*
+ * Set power state of select devices that do not have drivers to D3
+ * so that they do not block Package C entry.
+ */
+static void nvl_d3_fixup(void)
+{
+	pmc_core_set_device_d3(NVL_NPU_PCI_DEV);
+}
+
+static int nvl_resume(struct pmc_dev *pmcdev)
+{
+	nvl_d3_fixup();
+	return cnl_resume(pmcdev);
+}
+
+static int nvl_core_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_info)
+{
+	nvl_d3_fixup();
+	return generic_core_init(pmcdev, pmc_dev_info);
+}
+
+static u32 nvl_pmt_dmu_guids[] = {NVL_PMT_DMU_GUID, 0x0};
+struct pmc_dev_info nvl_s_pmc_dev = {
+	.num_pmcs = ARRAY_SIZE(nvl_pmc_list),
+	.pmc_list = nvl_pmc_list,
+	.regmap_list = nvl_pmc_info_list,
+	.map = &nvl_pcds_reg_map,
+	.sub_req_show = &pmc_core_substate_blk_req_fops,
+	.suspend = cnl_suspend,
+	.resume = nvl_resume,
+	.init = nvl_core_init,
+	.sub_req = pmc_core_pmt_get_blk_sub_req,
+	.dmu_guids = nvl_pmt_dmu_guids,
+	.pc_guid = NVL_PMT_PC_GUID,
+	.pkgc_ltr_blocker_offset = NVL_LTR_BLK_OFFSET,
+	.pkgc_ltr_blocker_counters = nvl_ltr_block_counter_arr,
+	.pkgc_blocker_offset = NVL_PKGC_BLK_OFFSET,
+	.pkgc_blocker_counters = nvl_pkgc_blocker_residency,
+	.ssram_hidden = false,
+	.die_c6_offset = NVL_PMT_DMU_DIE_C6_OFFSET,
+};
+
+struct pmc_dev_info nvl_h_pmc_dev = {
+	.num_pmcs = ARRAY_SIZE(nvl_h_pmc_list),
+	.pmc_list = nvl_h_pmc_list,
+	.regmap_list = nvl_pmc_info_list,
+	.map = &nvl_pcdh_reg_map,
+	.sub_req_show = &pmc_core_substate_blk_req_fops,
+	.suspend = cnl_suspend,
+	.resume = nvl_resume,
+	.init = nvl_core_init,
+	.sub_req = pmc_core_pmt_get_blk_sub_req,
+	.dmu_guids = nvl_pmt_dmu_guids,
+	.pc_guid = NVL_PMT_PC_GUID,
+	.pkgc_ltr_blocker_offset = NVL_LTR_BLK_OFFSET,
+	.pkgc_ltr_blocker_counters = nvl_ltr_block_counter_arr,
+	.pkgc_blocker_offset = NVL_PKGC_BLK_OFFSET,
+	.pkgc_blocker_counters = nvl_pkgc_blocker_residency,
+	.ssram_hidden = false,
+	.die_c6_offset = NVL_PMT_DMU_DIE_C6_OFFSET,
+};
diff --git a/drivers/platform/x86/intel/pmc/ptl.c b/drivers/platform/x86/intel/pmc/ptl.c
index 7aa39db256770..3e1cf6905e111 100644
--- a/drivers/platform/x86/intel/pmc/ptl.c
+++ b/drivers/platform/x86/intel/pmc/ptl.c
@@ -137,7 +137,7 @@ static const struct pmc_bit_map *ext_ptl_pcdp_pfear_map[] = {
 	NULL
 };
 
-static const struct pmc_bit_map ptl_pcdp_ltr_show_map[] = {
+const struct pmc_bit_map ptl_pcdp_ltr_show_map[] = {
 	{"SOUTHPORT_A",		CNP_PMC_LTR_SPA},
 	{"SOUTHPORT_B",		CNP_PMC_LTR_SPB},
 	{"SATA",		CNP_PMC_LTR_SATA},
-- 
2.43.0


^ permalink raw reply related

* [PATCH v2 6/7] platform/x86/intel/pmc: Retrieve PMC info only for available PMCs
From: Xi Pardee @ 2026-04-08 22:21 UTC (permalink / raw)
  To: xi.pardee, irenic.rajneesh, david.e.box, ilpo.jarvinen,
	platform-driver-x86, linux-kernel, linux-pm
In-Reply-To: <20260408222144.3288928-1-xi.pardee@linux.intel.com>

Update the Intel PMC Core driver to fetch PMC information only for
available PMCs. Previously, the driver attempted to retrieve PMC info
even when the corresponding PMC was not present.

This change aligns with recent updates to the Intel SSRAM Telemetry
driver. Starting with NVL, the SSRAM Telemetry driver is probed for
each individual SSRAM device. The prior implementation could not
differentiate between an unavailable PMC and one that had not yet
completed information retrieval. To resolve this, the PMC Core driver
now skips obtaining PMC info for unavailable PMCs.

Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com>
---
 drivers/platform/x86/intel/pmc/arl.c  |  7 +++++++
 drivers/platform/x86/intel/pmc/core.c | 19 +++++++++++--------
 drivers/platform/x86/intel/pmc/core.h |  4 ++++
 drivers/platform/x86/intel/pmc/lnl.c  |  4 ++++
 drivers/platform/x86/intel/pmc/mtl.c  |  4 ++++
 drivers/platform/x86/intel/pmc/ptl.c  |  4 ++++
 drivers/platform/x86/intel/pmc/wcl.c  |  4 ++++
 7 files changed, 38 insertions(+), 8 deletions(-)

diff --git a/drivers/platform/x86/intel/pmc/arl.c b/drivers/platform/x86/intel/pmc/arl.c
index 4d91ee010f6d0..cd15559864317 100644
--- a/drivers/platform/x86/intel/pmc/arl.c
+++ b/drivers/platform/x86/intel/pmc/arl.c
@@ -672,6 +672,9 @@ static struct pmc_info arl_pmc_info_list[] = {
 	{}
 };
 
+static u8 arl_pmc_list[] = {PMC_IDX_MAIN, PMC_IDX_IOE, PMC_IDX_PCH};
+static u8 arl_h_pmc_list[] = {PMC_IDX_MAIN, PMC_IDX_IOE};
+
 #define ARL_NPU_PCI_DEV			0xad1d
 #define ARL_GNA_PCI_DEV			0xae4c
 #define ARL_H_NPU_PCI_DEV		0x7d1d
@@ -721,6 +724,8 @@ static int arl_h_core_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_
 static u32 ARL_PMT_DMU_GUIDS[] = {ARL_PMT_DMU_GUID, 0x0};
 struct pmc_dev_info arl_pmc_dev = {
 	.dmu_guids = ARL_PMT_DMU_GUIDS,
+	.num_pmcs = ARRAY_SIZE(arl_pmc_list),
+	.pmc_list = arl_pmc_list,
 	.regmap_list = arl_pmc_info_list,
 	.map = &arl_socs_reg_map,
 	.sub_req_show = &pmc_core_substate_req_regs_fops,
@@ -735,6 +740,8 @@ struct pmc_dev_info arl_pmc_dev = {
 static u32 ARL_H_PMT_DMU_GUIDS[] = {ARL_PMT_DMU_GUID, ARL_H_PMT_DMU_GUID, 0x0};
 struct pmc_dev_info arl_h_pmc_dev = {
 	.dmu_guids = ARL_H_PMT_DMU_GUIDS,
+	.num_pmcs = ARRAY_SIZE(arl_h_pmc_list),
+	.pmc_list = arl_h_pmc_list,
 	.regmap_list = arl_pmc_info_list,
 	.map = &mtl_socm_reg_map,
 	.sub_req_show = &pmc_core_substate_req_regs_fops,
diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/intel/pmc/core.c
index 5d2e2681b0eba..c84e75b19aac3 100644
--- a/drivers/platform/x86/intel/pmc/core.c
+++ b/drivers/platform/x86/intel/pmc/core.c
@@ -1734,16 +1734,17 @@ static int pmc_core_pmc_add(struct pmc_dev *pmcdev, unsigned int pmc_idx)
 	return 0;
 }
 
-static int pmc_core_ssram_get_reg_base(struct pmc_dev *pmcdev)
+static int pmc_core_ssram_get_reg_base(struct pmc_dev *pmcdev, u8 num_pmcs, u8 *pmc_list)
 {
+	unsigned int i;
 	int ret;
 
-	ret = pmc_core_pmc_add(pmcdev, PMC_IDX_MAIN);
-	if (ret)
-		return ret;
-
-	pmc_core_pmc_add(pmcdev, PMC_IDX_IOE);
-	pmc_core_pmc_add(pmcdev, PMC_IDX_PCH);
+	for (i = 0; i < num_pmcs; ++i) {
+		/* Non-MAIN PMCs are allowed to fail */
+		ret = pmc_core_pmc_add(pmcdev, pmc_list[i]);
+		if (ret && (pmc_list[i] == PMC_IDX_MAIN))
+			return ret;
+	}
 
 	return 0;
 }
@@ -1765,7 +1766,9 @@ int generic_core_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_info)
 	ssram = pmc_dev_info->regmap_list != NULL;
 	if (ssram) {
 		pmcdev->regmap_list = pmc_dev_info->regmap_list;
-		ret = pmc_core_ssram_get_reg_base(pmcdev);
+		ret = pmc_core_ssram_get_reg_base(pmcdev,
+						  pmc_dev_info->num_pmcs,
+						  pmc_dev_info->pmc_list);
 		/*
 		 * EAGAIN error code indicates Intel PMC SSRAM Telemetry driver
 		 * has not finished probe and PMC info is not available yet. Try
diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h
index ef69de160ffbc..a741e4698f195 100644
--- a/drivers/platform/x86/intel/pmc/core.h
+++ b/drivers/platform/x86/intel/pmc/core.h
@@ -501,6 +501,8 @@ enum pmc_index {
  * @pc_guid:		GUID for telemetry region to read PKGC blocker info
  * @pkgc_ltr_blocker_offset: Offset to PKGC LTR blockers in telemetry region
  * @pkgc_blocker_offset:Offset to PKGC blocker in telemetry region
+ * @num_pmcs:		Number of entries in @pmc_list
+ * @pmc_list:		Index list of available PMC
  * @regmap_list:	Pointer to a list of pmc_info structure that could be
  *			available for the platform. When set, this field implies
  *			SSRAM support.
@@ -521,6 +523,8 @@ struct pmc_dev_info {
 	u32 pc_guid;
 	u32 pkgc_ltr_blocker_offset;
 	u32 pkgc_blocker_offset;
+	u8 num_pmcs;
+	u8 *pmc_list;
 	struct pmc_info *regmap_list;
 	const struct pmc_reg_map *map;
 	const struct file_operations *sub_req_show;
diff --git a/drivers/platform/x86/intel/pmc/lnl.c b/drivers/platform/x86/intel/pmc/lnl.c
index 18f303af328e3..02cbcfbb8e2a6 100644
--- a/drivers/platform/x86/intel/pmc/lnl.c
+++ b/drivers/platform/x86/intel/pmc/lnl.c
@@ -544,6 +544,8 @@ static struct pmc_info lnl_pmc_info_list[] = {
 	{}
 };
 
+static u8 lnl_pmc_list[] = {PMC_IDX_MAIN};
+
 #define LNL_NPU_PCI_DEV		0x643e
 #define LNL_IPU_PCI_DEV		0x645d
 
@@ -571,6 +573,8 @@ static int lnl_core_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_in
 }
 
 struct pmc_dev_info lnl_pmc_dev = {
+	.num_pmcs = ARRAY_SIZE(lnl_pmc_list),
+	.pmc_list = lnl_pmc_list,
 	.regmap_list = lnl_pmc_info_list,
 	.map = &lnl_socm_reg_map,
 	.sub_req_show = &pmc_core_substate_req_regs_fops,
diff --git a/drivers/platform/x86/intel/pmc/mtl.c b/drivers/platform/x86/intel/pmc/mtl.c
index b724dd8c34dba..e4ac09ce07a71 100644
--- a/drivers/platform/x86/intel/pmc/mtl.c
+++ b/drivers/platform/x86/intel/pmc/mtl.c
@@ -965,6 +965,8 @@ static struct pmc_info mtl_pmc_info_list[] = {
 	{}
 };
 
+static u8 mtl_pmc_list[] = {PMC_IDX_MAIN, PMC_IDX_IOE};
+
 #define MTL_GNA_PCI_DEV	0x7e4c
 #define MTL_IPU_PCI_DEV	0x7d19
 #define MTL_VPU_PCI_DEV	0x7d1d
@@ -995,6 +997,8 @@ static int mtl_core_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_in
 static u32 MTL_PMT_DMU_GUIDS[] = {MTL_PMT_DMU_GUID, 0x0};
 struct pmc_dev_info mtl_pmc_dev = {
 	.dmu_guids = MTL_PMT_DMU_GUIDS,
+	.num_pmcs = ARRAY_SIZE(mtl_pmc_list),
+	.pmc_list = mtl_pmc_list,
 	.regmap_list = mtl_pmc_info_list,
 	.map = &mtl_socm_reg_map,
 	.sub_req_show = &pmc_core_substate_req_regs_fops,
diff --git a/drivers/platform/x86/intel/pmc/ptl.c b/drivers/platform/x86/intel/pmc/ptl.c
index 6c68772e738c8..7aa39db256770 100644
--- a/drivers/platform/x86/intel/pmc/ptl.c
+++ b/drivers/platform/x86/intel/pmc/ptl.c
@@ -543,6 +543,8 @@ static struct pmc_info ptl_pmc_info_list[] = {
 	{}
 };
 
+static u8 ptl_pmc_list[] = {PMC_IDX_MAIN};
+
 #define PTL_NPU_PCI_DEV                0xb03e
 #define PTL_IPU_PCI_DEV                0xb05d
 
@@ -569,6 +571,8 @@ static int ptl_core_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_in
 }
 
 struct pmc_dev_info ptl_pmc_dev = {
+	.num_pmcs = ARRAY_SIZE(ptl_pmc_list),
+	.pmc_list = ptl_pmc_list,
 	.regmap_list = ptl_pmc_info_list,
 	.map = &ptl_pcdp_reg_map,
 	.sub_req_show = &pmc_core_substate_blk_req_fops,
diff --git a/drivers/platform/x86/intel/pmc/wcl.c b/drivers/platform/x86/intel/pmc/wcl.c
index b55069945e9e7..4cae8501872aa 100644
--- a/drivers/platform/x86/intel/pmc/wcl.c
+++ b/drivers/platform/x86/intel/pmc/wcl.c
@@ -469,6 +469,8 @@ static struct pmc_info wcl_pmc_info_list[] = {
 	{}
 };
 
+static u8 wcl_pmc_list[] = {PMC_IDX_MAIN};
+
 #define WCL_NPU_PCI_DEV                0xfd3e
 
 /*
@@ -494,6 +496,8 @@ static int wcl_core_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_in
 
 struct pmc_dev_info wcl_pmc_dev = {
 	.regmap_list = wcl_pmc_info_list,
+	.num_pmcs = ARRAY_SIZE(wcl_pmc_list),
+	.pmc_list = wcl_pmc_list,
 	.map = &wcl_pcdn_reg_map,
 	.sub_req_show = &pmc_core_substate_blk_req_fops,
 	.suspend = cnl_suspend,
-- 
2.43.0


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