From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= Subject: [PATCH v8 4/6] pwm: sun4i: Always calculate params when applying new parameters Date: Thu, 21 Nov 2019 20:59:00 +0100 Message-ID: <20191121195902.6906-5-peron.clem@gmail.com> References: <20191121195902.6906-1-peron.clem@gmail.com> Reply-To: peron.clem-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: <20191121195902.6906-1-peron.clem-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Thierry Reding , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Maxime Ripard , Chen-Yu Tsai , Philipp Zabel Cc: linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= List-Id: linux-pwm@vger.kernel.org Bypass mode will require to be re-calculated when the pwm state is changed. Remove the condition so pwm_sun4i_calculate is always called. Signed-off-by: Cl=C3=A9ment P=C3=A9ron --- drivers/pwm/pwm-sun4i.c | 52 ++++++++++++++++++----------------------- 1 file changed, 23 insertions(+), 29 deletions(-) diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c index 66befd8d6f9c..1fa2057419fb 100644 --- a/drivers/pwm/pwm-sun4i.c +++ b/drivers/pwm/pwm-sun4i.c @@ -202,9 +202,9 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struc= t pwm_device *pwm, { struct sun4i_pwm_chip *sun4i_pwm =3D to_sun4i_pwm_chip(chip); struct pwm_state cstate; - u32 ctrl; + u32 ctrl, duty, period, val; int ret; - unsigned int delay_us; + unsigned int delay_us, prescaler; unsigned long now; =20 pwm_get_state(pwm, &cstate); @@ -220,43 +220,37 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, str= uct pwm_device *pwm, spin_lock(&sun4i_pwm->ctrl_lock); ctrl =3D sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG); =20 - if ((cstate.period !=3D state->period) || - (cstate.duty_cycle !=3D state->duty_cycle)) { - u32 period, duty, val; - unsigned int prescaler; - - ret =3D sun4i_pwm_calculate(sun4i_pwm, state, - &duty, &period, &prescaler); - if (ret) { - dev_err(chip->dev, "period exceeds the maximum value\n"); - spin_unlock(&sun4i_pwm->ctrl_lock); - if (!cstate.enabled) - clk_disable_unprepare(sun4i_pwm->clk); - return ret; - } - - if (PWM_REG_PRESCAL(ctrl, pwm->hwpwm) !=3D prescaler) { - /* Prescaler changed, the clock has to be gated */ - ctrl &=3D ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm); - sun4i_pwm_writel(sun4i_pwm, ctrl, PWM_CTRL_REG); + ret =3D sun4i_pwm_calculate(sun4i_pwm, state, &duty, &period, &prescaler)= ; + if (ret) { + dev_err(chip->dev, "period exceeds the maximum value\n"); + spin_unlock(&sun4i_pwm->ctrl_lock); + if (!cstate.enabled) + clk_disable_unprepare(sun4i_pwm->clk); + return ret; + } =20 - ctrl &=3D ~BIT_CH(PWM_PRESCAL_MASK, pwm->hwpwm); - ctrl |=3D BIT_CH(prescaler, pwm->hwpwm); - } + if (PWM_REG_PRESCAL(ctrl, pwm->hwpwm) !=3D prescaler) { + /* Prescaler changed, the clock has to be gated */ + ctrl &=3D ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm); + sun4i_pwm_writel(sun4i_pwm, ctrl, PWM_CTRL_REG); =20 - val =3D (duty & PWM_DTY_MASK) | PWM_PRD(period); - sun4i_pwm_writel(sun4i_pwm, val, PWM_CH_PRD(pwm->hwpwm)); - sun4i_pwm->next_period[pwm->hwpwm] =3D jiffies + - usecs_to_jiffies(cstate.period / 1000 + 1); - sun4i_pwm->needs_delay[pwm->hwpwm] =3D true; + ctrl &=3D ~BIT_CH(PWM_PRESCAL_MASK, pwm->hwpwm); + ctrl |=3D BIT_CH(prescaler, pwm->hwpwm); } =20 + val =3D (duty & PWM_DTY_MASK) | PWM_PRD(period); + sun4i_pwm_writel(sun4i_pwm, val, PWM_CH_PRD(pwm->hwpwm)); + sun4i_pwm->next_period[pwm->hwpwm] =3D jiffies + + usecs_to_jiffies(cstate.period / 1000 + 1); + sun4i_pwm->needs_delay[pwm->hwpwm] =3D true; + if (state->polarity !=3D PWM_POLARITY_NORMAL) ctrl &=3D ~BIT_CH(PWM_ACT_STATE, pwm->hwpwm); else ctrl |=3D BIT_CH(PWM_ACT_STATE, pwm->hwpwm); =20 ctrl |=3D BIT_CH(PWM_CLK_GATING, pwm->hwpwm); + if (state->enabled) { ctrl |=3D BIT_CH(PWM_EN, pwm->hwpwm); } else if (!sun4i_pwm->needs_delay[pwm->hwpwm]) { --=20 2.20.1 --=20 You received this message because you are subscribed to the Google Groups "= linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an e= mail to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org To view this discussion on the web, visit https://groups.google.com/d/msgid= /linux-sunxi/20191121195902.6906-5-peron.clem%40gmail.com.