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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id dw1-20020a05683033a100b006ce46212341sm1966690otb.54.2023.11.08.10.21.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Nov 2023 10:21:37 -0800 (PST) Received: (nullmailer pid 2703586 invoked by uid 1000); Wed, 08 Nov 2023 18:21:35 -0000 Date: Wed, 8 Nov 2023 12:21:35 -0600 From: Rob Herring To: Billy Tsai Cc: jdelvare@suse.com, linux@roeck-us.net, krzysztof.kozlowski+dt@linaro.org, joel@jms.id.au, andrew@aj.id.au, corbet@lwn.net, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de, p.zabel@pengutronix.de, naresh.solanki@9elements.com, linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-pwm@vger.kernel.org, BMC-SW@aspeedtech.com, patrick@stwcx.xyz Subject: Re: [PATCH RESEND v10 2/3] dt-bindings: hwmon: Support Aspeed g6 PWM TACH Control Message-ID: <20231108182135.GA2698015-robh@kernel.org> References: <20231107105025.1480561-1-billy_tsai@aspeedtech.com> <20231107105025.1480561-3-billy_tsai@aspeedtech.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231107105025.1480561-3-billy_tsai@aspeedtech.com> Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org On Tue, Nov 07, 2023 at 06:50:24PM +0800, Billy Tsai wrote: > Document the compatible for aspeed,ast2600-pwm-tach device, which can > support up to 16 PWM outputs and 16 fan tach input. > > Signed-off-by: Billy Tsai > --- > .../bindings/hwmon/aspeed,g6-pwm-tach.yaml | 69 +++++++++++++++++++ > 1 file changed, 69 insertions(+) > create mode 100644 Documentation/devicetree/bindings/hwmon/aspeed,g6-pwm-tach.yaml > > diff --git a/Documentation/devicetree/bindings/hwmon/aspeed,g6-pwm-tach.yaml b/Documentation/devicetree/bindings/hwmon/aspeed,g6-pwm-tach.yaml > new file mode 100644 > index 000000000000..c615fb10705c > --- /dev/null > +++ b/Documentation/devicetree/bindings/hwmon/aspeed,g6-pwm-tach.yaml > @@ -0,0 +1,69 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright (C) 2023 Aspeed, Inc. > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/hwmon/aspeed,g6-pwm-tach.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: ASPEED G6 PWM and Fan Tach controller > + > +maintainers: > + - Billy Tsai > + > +description: | > + The ASPEED PWM controller can support up to 16 PWM outputs. > + The ASPEED Fan Tacho controller can support up to 16 fan tach input. > + They are independent hardware blocks, which are different from the > + previous version of the ASPEED chip. > + > +properties: > + compatible: > + enum: > + - aspeed,ast2600-pwm-tach > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + "#pwm-cells": > + const: 3 > + > +patternProperties: > + "^fan-[0-9]+$": > + $ref: fan-common.yaml# > + unevaluatedProperties: false > + required: > + - tach-ch > + > +required: > + - reg > + - clocks > + - resets > + - "#pwm-cells" > + - compatible > + > +additionalProperties: false > + > +examples: > + - | > + #include > + pwm_tach: pwm-tach-controller@1e610000 { > + compatible = "aspeed,ast2600-pwm-tach"; > + reg = <0x1e610000 0x100>; > + clocks = <&syscon ASPEED_CLK_AHB>; > + resets = <&syscon ASPEED_RESET_PWM>; > + #pwm-cells = <3>; > + > + fan-0 { I assume there's a PWM connection here? How do you know which PWM? You said the tach channel is independent, so it is not that. It should not be 0 from 'fan-0' because that's just a meaningless index. You either need 'pwms' here or you can use 'reg' and the reg value is the PWM channel. > + tach-ch = /bits/ 8 <0x0>; > + }; > + > + fan-1 { > + tach-ch = /bits/ 8 <0x1 0x2>; > + }; > + }; > -- > 2.25.1 >