Re: Re: [PATCH v2 0/2] Update designware pwm driver

Xuyang Dong
2026-03-09T09:24:10Z

Hi Krzysztof,

> >>
> >> There is already a patch [1] for the DesignWare PWM driver,
> >
> > So provide review there instead of allowing Ben to post incomplete
> > hardware description which you want to correct here...
> >
> > I don't understand why posting this change.
>
> I see now Ben did not post the bindings change, so this message here
> just confused me.

We noticed Ben’s DesignWare PWM driver series on lore [1]. The patches for
the DT bindings, pwm-dwc.c and pwm-dwc-core.c have already been merged into
the kernel, for example, patches 1/6, 2/6, and 3/6.
However, the pwm-dwc-of.c patch has not yet been accepted, for example,
patches 4/6, 5/6, and 6/6.
We discussed the status of this PWM series with Ben on lore. Given the lack
of recent updates following Ben’s message in [2], we’d like to step in and
help move this forward.

This series is based on v9 and includes the following updates:
1. Migrated to the latest PWM subsystem structure and APIs.
2. Added support for 0% and 100% duty cycle modes.
3. Implemented basic power management (runtime PM) support.

The previous series (v1) has been deprecated. Would it be more
appropriate to send this as v2 rather than v10?

[1] https://lore.kernel.org/lkml/20230907161242.67190-1-ben.dooks@codethink.co.uk/
[2] https://lore.kernel.org/lkml/0bdd6ab6-bfdd-400e-99b6-cfb186dfcc3e@codethink.co.uk/

The binding file 'snps,dw-apb-timers-pwm2.yaml' has already been merged,
but the current driver lacks reset support.
Therefore, patch 1 adds an optional reset property to address this.

We will update the commit message in the next version.

> >
> >
> >
> >> which is posted by Ben and still under review.
> >> Based on this patch, this series is a continuation of [1]
> >> to add support for IP versions 2.11a and later, which
> >> includes support for "Pulse Width Modulation with 0%
> >> and 100% Duty Cycle".
>
> But does this mean the patchset cannot be even tested?

Support for 0% and 100% duty cycle mode (available in DesignWare PWM IP
version 2.11a and later) has been tested on the EIC7700 SoC, which
integrates IP version 2.13a.

For Ben's implementation, which does not support this mode, testing can
still be done by setting dwc->features to 0 after reading the version
register, effectively disabling 0% and 100% duty cycle support.

Regards,
Xuyang Dong