[PATCH v4 0/2] Update designware pwm driver

dongxuyang
2026-04-15T09:49:39Z

From: Xuyang Dong <dongxuyang@eswincomputing.com>

There is already a patch [1] for the DesignWare PWM driver,
which is posted by Ben and still under review.
Based on this patch, this series is a continuation of [1]
to add support for IP versions 2.11a and later, which
includes support for "Pulse Width Modulation with 0%
and 100% Duty Cycle".

Supported chips:
ESWIN EIC7700 series SoC.

Test:
Tested this patch on the Sifive HiFive Premier P550 (which uses the EIC7700
SoC).

[1] https://lore.kernel.org/lkml/20230907161242.67190-1-ben.dooks@codethink.co.uk/

Updates:
Change in v4:
- YAML:
- Change maxItems from 1 to 2. As there is a corresponding reset signal
for each clock domain, the effective maxItems of the resets property
is set to 2.
- Update the YAML commit message to describe the hardware.
- Driver:
- Replace devm_reset_control_get_optional_exclusive() with
devm_reset_control_array_get_optional_exclusive(). Since the number
of reset signals has increased from one to two.

- Link to v3: https://lore.kernel.org/all/20260402091718.1608-1-dongxuyang@eswincomputing.com/

Change in v3:
- YAML:
- Added a clear justification for the optional resets property. It is
required to support proper controller initialization when no PWM
channel is active at boot time, while allowing the driver to skip
reset deassertion if any channel is already enabled.
- Driver:
- Update the boundary value check of tmp in __dwc_pwm_configure_timer()
for DWC_TIM_CTRL_0N100PWM_EN.
- Replace 'sizeof(struct dwc_pwm_drvdata)' with
'struct_size(data, chips, 1)'.
- Drop devm_clk_get_enabled() in favor of devm_clk_get() with explicit
clk_prepare_enable() and clk_disable_unprepare() allowing runtime PM
to manage clock state.
- Replace devm_reset_control_get_optional_exclusive_deasserted() with
devm_reset_control_get_optional_exclusive() and issue a full reset via
reset_control_reset() only when no PWM channel is active at probe time.
- Detect bootloader-enabled PWM channels by reading the enable bit, and
initialize runtime PM as active for those channels by calling
pm_runtime_set_active() and pm_runtime_get_noresume().
- Remove autosuspend as it is not required for this driver.
- Use explicit pm_runtime_enable() and pm_runtime_disable() instead of
the managed devm_pm_runtime_enable() variant to ensure correct cleanup.
- On device removal, recheck the channel enable status. If any channel
remains active, call pm_runtime_put_noidle() before disabling clocks
via clk_disable_unprepare().
Resume device before register access during removal if it is runtime
suspended, and re-suspend it afterward.
- If device is suspended, resume it before register access during system
resume/suspend.
- Use pm_ptr() instead of pm_sleep_ptr() for correct PM operation.

- Link to v2: https://lore.kernel.org/all/20260306093000.2065-1-dongxuyang@eswincomputing.com/

Change in v2:
- YAML:
- Remove eswin,eic7700-pwm.yaml. Use snps,dw-apb-timers-pwm2.yaml.
The description in snps,dw-apb-timers-pwm2.yaml is better.
- Add the resets property as optional, as defined in the databook.
- Remove snps,pwm-full-range-enable as no additional property is needed.
- Driver:
- Change the file from pwm-dwc-eic7700.c to pwm-dwc-of.c from [1].
- Define DWC_TIM_VERSION_ID_2_11A 2.11a as the baseline version.
- Enable the 0% and 100% duty cycle mode by setting dwc->feature if
the version read from the TIMERS_COMP_VERSION register is later
than or equal to DWC_TIM_VERSION_ID_2_11A.
- Use the DIV_ROUND_UP_ULL() to calculate width in the .apply and
.get_state.
- Additionally, Power Management (PM) support has been added to the
pwm-dwc-of.c driver.
- Drop the headers that are not used.
- Use devm_clk_get_enabled() instead of devm_clk_get().
- Drop of_match_ptr.
- Fix build error with 1ULL << 32.
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202512061720.j31AsgM7-lkp@intel.com/

- Link to v1: https://lore.kernel.org/all/20251205090411.1388-1-dongxuyang@eswincomputing.com/
- Link to v9: https://lore.kernel.org/lkml/20230907161242.67190-1-ben.dooks@codethink.co.uk/

Xuyang Dong (2):
dt-bindings: pwm: dwc: add reset optional
pwm: dwc: add of/platform support

.../bindings/pwm/snps,dw-apb-timers-pwm2.yaml | 3 +
drivers/pwm/Kconfig | 10 +
drivers/pwm/Makefile | 1 +
drivers/pwm/pwm-dwc-core.c | 101 ++++--
drivers/pwm/pwm-dwc-of.c | 331 ++++++++++++++++++
drivers/pwm/pwm-dwc.h | 25 +-
6 files changed, 442 insertions(+), 29 deletions(-)
create mode 100644 drivers/pwm/pwm-dwc-of.c

--
2.34.1