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[2a01:c23:b9bd:5800:60ec:422b:628c:6ca5]) by smtp.googlemail.com with ESMTPSA id x8-20020a05600c21c800b003f2390bdd0csm23781162wmj.32.2023.05.01.06.39.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 01 May 2023 06:39:47 -0700 (PDT) Message-ID: <7cacf0f4-099c-766d-5757-cc3813ec09a8@gmail.com> Date: Mon, 1 May 2023 15:39:45 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Content-Language: en-US To: Martin Blumenstingl Cc: neil.armstrong@linaro.org, Jerome Brunet , Neil Armstrong , Kevin Hilman , =?UTF-8?Q?Uwe_Kleine-K=c3=b6nig?= , "thierry.reding@gmail.com" , "linux-arm-kernel@lists.infradead.org" , "open list:ARM/Amlogic Meson..." , linux-pwm@vger.kernel.org References: <9faca2e6-b7a1-4748-7eb0-48f8064e323e@gmail.com> <73a52391-b380-e491-0e96-5c51c7be487c@gmail.com> <22b6f870-8dfd-c01b-a7cd-383a9d9ece20@linaro.org> <872b3270-8319-6b4d-9d52-1da0b58d4e19@gmail.com> <229e20ef-6e99-6d52-b0e6-a357a184b6af@linaro.org> <87f14a9d-f341-d694-f567-7f9e78666b5d@gmail.com> From: Heiner Kallweit Subject: Re: [PATCH v4 4/4] pwm: meson: make full use of common clock framework In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org On 23.04.2023 22:58, Martin Blumenstingl wrote: > On Wed, Apr 19, 2023 at 9:58 PM Heiner Kallweit wrote: > [...] >>> This is a hack based on current clock values, either explicitly support a code path >>> where pre_div = 0 or if you can't do that with CCF implement the pinctrl way to handle this, >>> which is the cleanest. >>> >> To make it explicit we could request ULONG_MAX as rate instead of 1GHz, this would imply >> choosing mux parent with highest rate and pre_div = 0. Up to you whether this would be >> acceptable. > I like the idea of using ULONG_MAX as I first had to think about why > you chose 1GHz in the driver. > >> AFAICS pinctrl would need quite some DTS changes, and it's not my area of expertise. >> So it would be open who can implement this. > My opinion is that this can be done in a separate patch. We need to > work on this whole thing anyways as you mentioned that newer SoCs > (from what I understand: G12A onwards) have a dedicated "constant > output" bit which will make the pinctrl solution unnecessary (at least > based on how I understand it). > Agree. My understanding of the "constant output" bit is, based on the vendor driver: W/o this bit the chip internally increments the lo and hi value. Not sure by the way how the chip handles value 0xffff, whether it omits the increment in this case. W/ this bit set the chip doesn't increment the values, therefore lo / hi can be effectively zero. > > Best regards, > Martin Heiner