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From: "Alexandre Courbot" <acourbot@nvidia.com>
To: "Gary Guo" <gary@garyguo.net>
Cc: "Alice Ryhl" <aliceryhl@google.com>,
	"Daniel Almeida" <daniel.almeida@collabora.com>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	"Miguel Ojeda" <ojeda@kernel.org>,
	"Boqun Feng" <boqun@kernel.org>,
	"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
	"Benno Lossin" <lossin@kernel.org>,
	"Andreas Hindborg" <a.hindborg@kernel.org>,
	"Trevor Gross" <tmgross@umich.edu>,
	"Tamir Duberstein" <tamird@kernel.org>,
	"Onur Özkan" <work@onurozkan.dev>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Abdiel Janulgue" <abdiel.janulgue@gmail.com>,
	"Robin Murphy" <robin.murphy@arm.com>,
	"David Airlie" <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	"Michal Wilczynski" <m.wilczynski@samsung.com>,
	"Uwe Kleine-König" <ukleinek@kernel.org>,
	"Danilo Krummrich" <dakr@kernel.org>,
	driver-core@lists.linux.dev, rust-for-linux@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	nova-gpu@lists.linux.dev, dri-devel@lists.freedesktop.org,
	linux-pwm@vger.kernel.org, "Laura Nao" <laura.nao@collabora.com>
Subject: Re: [PATCH v5 14/20] rust: io: add I/O backend for system memory with volatile access
Date: Fri, 03 Jul 2026 20:37:41 +0900	[thread overview]
Message-ID: <DJOWMSPZW5D1.3DV2KKPXYXNYS@nvidia.com> (raw)
In-Reply-To: <20260626-io_projection-v5-14-d0961471ae50@garyguo.net>

On Fri Jun 26, 2026 at 11:45 PM JST, Gary Guo wrote:
> From: Laura Nao <laura.nao@collabora.com>
>
> Add `SysMem`, an `Io` trait implementation for kernel virtual address
> ranges. It uses volatile accessors to provide safe access to shared
> memory that may be concurrently accessed by external hardware. Implement
> `IoCapable` for `u8`, `u16`, `u32`, and `u64` (for 64-bit system).
>
> This can be used for instead of `Coherent` for cases where a different

typo: "can be used instead of".

> layer takes care of mapping the system memory to the device (e.g. dma-buf
> or GPUVM).
>
> Signed-off-by: Laura Nao <laura.nao@collabora.com>
> [ Rebased and adapted on top of I/O rework. - Gary ]
> Co-developed-by: Gary Guo <gary@garyguo.net>
> Signed-off-by: Gary Guo <gary@garyguo.net>
> ---
>  rust/kernel/io.rs | 122 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 122 insertions(+)
>
> diff --git a/rust/kernel/io.rs b/rust/kernel/io.rs
> index 96962498af77..5c06785facea 100644
> --- a/rust/kernel/io.rs
> +++ b/rust/kernel/io.rs
> @@ -1034,6 +1034,128 @@ pub fn relaxed(self) -> RelaxedMmio<'a, T> {
>  #[cfg(CONFIG_64BIT)]
>  impl_mmio_io_capable!(RelaxedMmioBackend, u64, readq_relaxed, writeq_relaxed);
>  
> +/// I/O Backend for system memory.
> +pub struct SysMemBackend;
> +
> +impl IoBackend for SysMemBackend {
> +    type View<'a, T: ?Sized + KnownSize> = SysMem<'a, T>;
> +
> +    #[inline]
> +    fn as_ptr<'a, T: ?Sized + KnownSize>(view: Self::View<'a, T>) -> *mut T {
> +        view.ptr
> +    }
> +
> +    #[inline]
> +    unsafe fn project_view<'a, T: ?Sized + KnownSize, U: ?Sized + KnownSize>(
> +        _view: Self::View<'a, T>,
> +        ptr: *mut U,
> +    ) -> Self::View<'a, U> {
> +        // INVARIANT: Per safety requirement, `ptr` is projection from `view`, so it is also a valid
> +        // kernel accessible memory region.
> +        SysMem {
> +            ptr,
> +            phantom: PhantomData,
> +        }
> +    }
> +}
> +
> +/// Implements [`IoCapable`] on `SysMemBackend` for `$ty` using `read_volatile` and
> +/// `write_volatile`.
> +macro_rules! impl_sysmem_io_capable {
> +    ($ty:ty) => {
> +        impl IoCapable<$ty> for SysMemBackend {
> +            #[inline]
> +            fn io_read(view: SysMem<'_, $ty>) -> $ty {
> +                // SAFETY:
> +                // - Per type invariant, `ptr` is valid and aligned.
> +                // - Using read_volatile() here so that race with hardware is well-defined.
> +                // - Using read_volatile() here is not sound if it races with other CPU per Rust
> +                //   rules, but this is allowed per LKMM.
> +                // - The macro is only used on primitives so all bit patterns are valid.
> +                unsafe { view.ptr.read_volatile() }
> +            }
> +
> +            #[inline]
> +            fn io_write(view: SysMem<'_, $ty>, value: $ty) {
> +                // SAFETY:
> +                // - Per type invariant, `ptr` is valid and aligned.
> +                // - Using write_volatile() here so that race with hardware is well-defined.
> +                // - Using write_volatile() here is not sound if it races with other CPU per Rust
> +                //   rules, but this is allowed per LKMM.
> +                unsafe { view.ptr.write_volatile(value) }
> +            }
> +        }
> +    };
> +}
> +
> +impl_sysmem_io_capable!(u8);
> +impl_sysmem_io_capable!(u16);
> +impl_sysmem_io_capable!(u32);
> +#[cfg(CONFIG_64BIT)]
> +impl_sysmem_io_capable!(u64);
> +
> +/// System memory region.

Maybe "A view of a system memory region" for consistency with the other
view types.

Follow-up idea: `SysMem` and `IoSysMap` could maybe be moved into their
own module to de-clutter `io.rs` a bit.

> +///
> +/// Provides `Io` trait implementation for kernel virtual address ranges,
> +/// using volatile read/write to safely access shared memory that may be
> +/// concurrently accessed by external hardware.
> +///
> +/// # Invariants
> +///
> +/// `self.ptr.addr() .. self.ptr.addr() + KnownSize::size(self.ptr)` is valid and aligned kernel
> +/// accessible memory region for the lifetime `'a`.
> +pub struct SysMem<'a, T: ?Sized> {
> +    ptr: *mut T,
> +    phantom: PhantomData<&'a ()>,
> +}
> +
> +impl<T: ?Sized> Copy for SysMem<'_, T> {}
> +impl<T: ?Sized> Clone for SysMem<'_, T> {
> +    #[inline]
> +    fn clone(&self) -> Self {
> +        *self
> +    }
> +}
> +
> +// SAFETY: `SysMem<'_, T>` is conceptually `&T` but in I/O memory.

IIUC `SysMem` is not I/O memory. :)

> +unsafe impl<T: ?Sized + Sync> Send for SysMem<'_, T> {}
> +
> +// SAFETY: `SysMem<'_, T>` is conceptually `&T` but in I/O memory.

Same here.

With these considered,

Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>

  reply	other threads:[~2026-07-03 11:37 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-26 14:45 [PATCH v5 00/20] rust: I/O type generalization and projection Gary Guo
2026-06-26 14:45 ` [PATCH v5 01/20] rust: io: add dynamically-sized `Region` type Gary Guo
2026-07-03  3:16   ` Alexandre Courbot
2026-07-03 12:38     ` Gary Guo
2026-06-26 14:45 ` [PATCH v5 02/20] rust: io: add missing safety requirement in `IoCapable` methods Gary Guo
2026-07-03  2:57   ` Alexandre Courbot
2026-07-03 12:35     ` Gary Guo
2026-07-03 13:09       ` Alexandre Courbot
2026-07-03 13:49         ` Gary Guo
2026-06-26 14:45 ` [PATCH v5 03/20] rust: io: restrict untyped IO access and `register!` to `Region` Gary Guo
2026-06-26 14:45 ` [PATCH v5 04/20] rust: io: implement `Io` on reference types instead Gary Guo
2026-06-26 14:45 ` [PATCH v5 05/20] rust: io: generalize `MmioRaw` to pointer to arbitrary type Gary Guo
2026-06-26 14:45 ` [PATCH v5 06/20] rust: io: rename `Mmio` to `MmioOwned` Gary Guo
2026-06-26 14:45 ` [PATCH v5 07/20] rust: io: implement `Mmio` as view type Gary Guo
2026-07-03  3:30   ` Alexandre Courbot
2026-06-26 14:45 ` [PATCH v5 08/20] rust: pci: io: make `ConfigSpace` a view Gary Guo
2026-06-26 14:45 ` [PATCH v5 09/20] rust: io: use view types instead of addresses for `Io` Gary Guo
2026-07-03  5:03   ` Alexandre Courbot
2026-06-26 14:45 ` [PATCH v5 10/20] pwm: th1520: remove unnecessary `deref` Gary Guo
2026-07-03  5:04   ` Alexandre Courbot
2026-06-26 14:45 ` [PATCH v5 11/20] rust: io: remove `MmioOwned` Gary Guo
2026-07-03  5:58   ` Alexandre Courbot
2026-06-26 14:45 ` [PATCH v5 12/20] rust: io: move `Io` methods to extension trait Gary Guo
2026-07-03  6:19   ` Alexandre Courbot
2026-07-03 12:43     ` Gary Guo
2026-06-26 14:45 ` [PATCH v5 13/20] rust: io: add projection macro and methods Gary Guo
2026-07-03  6:39   ` Alexandre Courbot
2026-06-26 14:45 ` [PATCH v5 14/20] rust: io: add I/O backend for system memory with volatile access Gary Guo
2026-07-03 11:37   ` Alexandre Courbot [this message]
2026-06-26 14:45 ` [PATCH v5 15/20] rust: io: implement a view type for `Coherent` Gary Guo
2026-07-03 13:14   ` Alexandre Courbot
2026-07-03 13:50     ` Gary Guo
2026-07-03 14:39       ` Alexandre Courbot
2026-07-03 14:44         ` Gary Guo
2026-06-26 14:45 ` [PATCH v5 16/20] rust: io: add `read_val` and `write_val` functions on `Io` Gary Guo
2026-07-03 14:43   ` Alexandre Courbot
2026-06-26 14:45 ` [PATCH v5 17/20] gpu: nova-core: use I/O projection for cleaner encapsulation Gary Guo
2026-07-03 14:46   ` Alexandre Courbot
2026-07-03 15:13     ` Gary Guo
2026-06-26 14:45 ` [PATCH v5 18/20] rust: dma: drop `dma_read!` and `dma_write!` API Gary Guo
2026-07-03 14:47   ` Alexandre Courbot
2026-06-26 14:45 ` [PATCH v5 19/20] rust: io: add copying methods Gary Guo
2026-06-26 14:45 ` [PATCH v5 20/20] rust: io: implement `IoSysMap` Gary Guo
2026-06-28 23:37 ` [PATCH v5 00/20] rust: I/O type generalization and projection Danilo Krummrich
2026-06-29 14:15   ` Gary Guo
2026-06-30 13:02     ` Miguel Ojeda
2026-06-30 13:07       ` Gary Guo

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