Re: [v3 2/2] pwm: atcpit100: add Andes PWM driver support

[Ben Zong-You Xie <ben717@andestech.com>]

On Fri, Jan 24, 2025 at 08:30:48AM +0100, Krzysztof Kozlowski wrote:
> [EXTERNAL MAIL]
> 
> On 23/01/2025 20:35, Ben Zong-You Xie wrote:
> >
> > +config PWM_ATCPIT100
> > +     tristate "Andes ATCPIT100 PWM support"
> > +     depends on OF && HAS_IOMEM
> > +     depends on RISCV || COMPILE_TEST
> > +     select REGMAP_MMIO
> > +     help
> > +       Generic PWM framework driver for ATCPIT100 on Andes AE350 platform
> 
> 
> Is AE350 a type of a SoC? Looks like. "depends on RISCV" is wrong -
> there is nothing RISC-V specific here. You must depend on given
> SoC/platform.
> 

Hi Krzysztof,

AE350 is not a SoC. It's just a reference platform to verify Andes CPUs
on FPGA. For further information on AE350, please refer to [1].

Also, I will remove "depends on RISCV" and fix the coding style problems
in the next patch. Thanks for your review.

[1] https://www.andestech.com/en/products-solutions/andeshape-platforms/ae350-axi-based-platform-pre-integrated-with-n25f-nx25f-a25-ax25/

Best regards,
Ben

> > +
> > +       The ATCPIT100 Programmable Interval Timer (PIT) is a set of compact
> > +       multi-function timers, which can be used as pulse width
> > +       modulators (PWM) as well as simple timers. ATCPIT100 supports up to 4
> > +       PIT channels. Each PIT channel can be a simple timer or PWM, or a
> > +       combination of timer and PWM.
> > +
> > +       To compile this driver as a module, choose M here: the module
> 
> 
> ...
>