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[2003:e4:1f1c:800:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id q23-20020a7bce97000000b003e203681b26sm1258853wmj.29.2023.04.13.02.13.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Apr 2023 02:13:27 -0700 (PDT) Date: Thu, 13 Apr 2023 11:13:26 +0200 From: Thierry Reding To: Martin Blumenstingl Cc: Heiner Kallweit , Jerome Brunet , Neil Armstrong , Kevin Hilman , Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= , "linux-arm-kernel@lists.infradead.org" , "open list:ARM/Amlogic Meson..." , linux-pwm@vger.kernel.org Subject: Re: [PATCH v2 4/4] pwm: meson: make full use of common clock framework Message-ID: References: <0f087629-810d-f0e0-bf0b-05ca5defc16d@gmail.com> <05e3b9de-ee38-97b6-7f39-5b6f7de1674f@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="AfN6U5Lk+axIGN3J" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/2.2.10 (2023-03-25) Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org --AfN6U5Lk+axIGN3J Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Apr 11, 2023 at 09:48:46PM +0200, Martin Blumenstingl wrote: > On Tue, Apr 11, 2023 at 9:26=E2=80=AFPM Heiner Kallweit wrote: > [...] > > + init.name =3D name; > > + init.ops =3D &clk_gate_ops; > > + init.flags =3D CLK_SET_RATE_PARENT; > As much as I don't want it: I think we need CLK_IGNORE_UNUSED here as wel= l :-( > On GXBB, GXL and GXM SoCs the board design typically uses PWM > regulators (like the boards using 32-bit SoCs as well as newer boards > using G12A or later SoCs). > This means: if we enable that PWM controller and one of the channels > is firmware managed and the other isn't then we can end up disabling > the clock - taking away VCCK (which supplies the CPU) or VDDEE (which > supplies GPU and various other components). > I'd be happy if there are other suggestions around this though. What exactly does "firmware managed" mean? Typically we describe all supplies in DT to avoid these kinds of workarounds. If VCCK and/or VDDEE are PWM-controlled regulators that should never be turned off, can they not simply be added to device tree and marked as "always-on"? That would propagate to the PWM and make sure the corresponding clock remains enabled. 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