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X-CSE-ConnectionGUID: E+sToR/mRyC1bRUo4SyWLg== X-CSE-MsgGUID: 7V/C4RFAQcejeoXobCHIfg== X-IronPort-AV: E=McAfee;i="6800,10657,11706"; a="71880941" X-IronPort-AV: E=Sophos;i="6.21,301,1763452800"; d="scan'208";a="71880941" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Feb 2026 02:32:14 -0800 X-CSE-ConnectionGUID: lG8QlSvFSpKVOIGzNWtxwQ== X-CSE-MsgGUID: +TgXSV34QzGgSeZgymbLZw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,301,1763452800"; d="scan'208";a="218949595" Received: from pgcooper-mobl3.ger.corp.intel.com (HELO localhost) ([10.245.245.25]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Feb 2026 02:31:52 -0800 Date: Fri, 20 Feb 2026 12:31:49 +0200 From: Andy Shevchenko To: Alexis Czezar Torreno Cc: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , David Lechner , Nuno =?iso-8859-1?Q?S=E1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org Subject: Re: [PATCH 0/3] Add support for AD5706R DAC Message-ID: References: <20260220-dev_ad5706r-v1-0-7253bbd74889@analog.com> Precedence: bulk X-Mailing-List: linux-pwm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260220-dev_ad5706r-v1-0-7253bbd74889@analog.com> Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo On Fri, Feb 20, 2026 at 04:02:55PM +0800, Alexis Czezar Torreno wrote: > This series adds support for the Analog Devices AD5706R, a 4-channel > 16-bit current output digital-to-analog converter with SPI interface. > > The AD5706R features: > - 4 independent current output DAC channels > - Configurable output ranges (50mA, 150mA, 200mA, 300mA) > - Hardware and software LDAC trigger with configurable edge selection > - Toggle and dither modes per channel > - Internal or external voltage reference selection > - PWM-controlled LDAC > - Dynamic change SPI speed It's ~2300 LoC file, please split by features, so the first patch brings basics and a few followups that add the rest. > The driver exposes standard IIO raw/scale/offset channel attributes for > DAC output control, sampling frequency for PWM-based LDAC timing, and > extended attributes for device configuration including output range > selection, trigger mode, and multiplexer output. > > This driver is developed and tested on the Cora Z7S platform using > the AXI SPI Engine and AXI CLKGEN IP cores. The 'clocks' property > enables dynamic SPI clock rate management via the CLKGEN. > > Datasheet: https://www.analog.com/en/products/ad5706r.html > No blank lines in the tag block. (Not sure if `b4` can spread it over the series either way.) > Signed-off-by: Alexis Czezar Torreno -- With Best Regards, Andy Shevchenko