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[2003:f6:5f01:8b04::1b9]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab7732e7089sm90262266b.95.2025.02.06.04.06.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Feb 2025 04:06:44 -0800 (PST) From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= To: Daniel Mack , Haojian Zhuang , Robert Jarzmik , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?utf-8?q?Duje_Mihanovi=C4=87?= Cc: =?utf-8?q?Herv=C3=A9_Codina?= , linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v2 0/3] pwm: pxa: Use #pwm-cells = <3> Date: Thu, 6 Feb 2025 13:06:24 +0100 Message-ID: X-Mailer: git-send-email 2.47.1 Precedence: bulk X-Mailing-List: linux-pwm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 X-Developer-Signature: v=1; a=openpgp-sha256; l=1886; i=u.kleine-koenig@baylibre.com; h=from:subject:message-id; bh=P+DmhZ5fsqW2fWssaaB0vb1pG+aNe17OBNu8J4YPM98=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnpKXAtvNUKlDIiKRsWNc4oyxCFo6Grjdo842L2 udPu4gsGnmJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ6SlwAAKCRCPgPtYfRL+ Tp+9B/0R1HkHEHRU6lkinzAWJleWmmSCWIyIEVGQG4zUoQtf/j5DA0sacW/x5ONM9h62C/Kw2+y +0qbisvUZZia5cZwrm6U7p8g5rXBzXUrIRRz4fdXbKoLRa8mPOAtbrzAx0O4DPVvmfDjv/ezG9O KyJ/u7oU/x1Zl1DoIdSJ7mXZ1p5jczi1/1I5d7cy1C7NNdgQn2290PTgXIoq6N+aSBOcgQ1hxRR PPLThy7HagPJmewucOC9xEL3EQWvsVKO7vo+OLfFkvujO6IgdZJ5bpxYvIP5iIFUsF497yNWOKk BbpVuEQ5Ep9aEgIzUvWwN5n+ZtqJLzLT3Vfl8E+YQtezJviW X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 Content-Transfer-Encoding: 8bit Hello, this series' goal is to soften the special device-tree binding of marvel,pxa-pwm devices. This is the only binding that doesn't pass the line index as first parameter. Here the #pwm-cells value is bumped from 1 to 3, keeping compatibility with the old binding. The motivation for this was that Hervé sent a patch introducing pwm nexus nodes which don't work nicely with the marvel,pxa-pwm particularities. Changes since (implicit) v1, available at https://lore.kernel.org/linux-pwm/cover.1738777221.git.u.kleine-koenig@baylibre.com: - Use #pwm-cells = <3> also in the binding example (*sigh*), pointed out by Rob - Add review, ack and test tags by Hervé Codina, Conor Dooley, Duje Mihanović and Daniel Mack. Thanks! I intend to take the first patch via my pwm tree. Assuming the pxa and device tree maintainers and bots are happy now: Dear pxa maintainers, please tell if I should take the whole series via pwm, or if you want to take patches #2 and #3. If the latter: Do you want to delay application or should I provide an immutable branch for patch #1? Best regards Uwe Uwe Kleine-König (3): pwm: Add upgrade path to #pwm-cells = <3> for users of of_pwm_single_xlate() dt-bindings: pwm: marvell,pxa-pwm: Update to use #pwm-cells = <3> ARM: dts: pxa: Use #pwm-cells = <3> for marvell,pxa-pwm devices .../devicetree/bindings/pwm/marvell,pxa-pwm.yaml | 5 ++--- arch/arm/boot/dts/intel/pxa/pxa25x.dtsi | 4 ++-- arch/arm/boot/dts/intel/pxa/pxa27x.dtsi | 8 ++++---- .../dts/intel/pxa/pxa300-raumfeld-controller.dts | 2 +- arch/arm/boot/dts/intel/pxa/pxa3xx.dtsi | 8 ++++---- drivers/pwm/core.c | 16 ++++++++++++++++ 6 files changed, 29 insertions(+), 14 deletions(-) base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b -- 2.47.1