* [PATCH v3 1/2] pwm: mediatek: Handle hardware enable and clock enable separately
2025-07-28 16:00 [PATCH v3 0/2] pwm: mediatek: Fix duty and period setting Uwe Kleine-König
@ 2025-07-28 16:00 ` Uwe Kleine-König
2025-07-28 16:00 ` [PATCH v3 2/2] pwm: mediatek: Fix duty and period setting Uwe Kleine-König
2025-07-29 10:07 ` [PATCH v3 0/2] " AngeloGioacchino Del Regno
2 siblings, 0 replies; 5+ messages in thread
From: Uwe Kleine-König @ 2025-07-28 16:00 UTC (permalink / raw)
To: Matthias Brugger, AngeloGioacchino Del Regno, John Crispin
Cc: linux-pwm, linux-arm-kernel, linux-mediatek
Stop handling the clocks in pwm_mediatek_enable() and
pwm_mediatek_disable(). This is a preparing change for the next commit
that requires that clocks and the enable bit are handled separately.
Also move these two functions a bit further up in the source file to
make them usable in pwm_mediatek_config(), which is needed in the next
commit, too.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
---
drivers/pwm/pwm-mediatek.c | 60 ++++++++++++++++++--------------------
1 file changed, 28 insertions(+), 32 deletions(-)
diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
index 6777c511622a..b6560e52c803 100644
--- a/drivers/pwm/pwm-mediatek.c
+++ b/drivers/pwm/pwm-mediatek.c
@@ -121,6 +121,26 @@ static inline void pwm_mediatek_writel(struct pwm_mediatek_chip *chip,
writel(value, chip->regs + chip->soc->reg_offset[num] + offset);
}
+static void pwm_mediatek_enable(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+ struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip);
+ u32 value;
+
+ value = readl(pc->regs);
+ value |= BIT(pwm->hwpwm);
+ writel(value, pc->regs);
+}
+
+static void pwm_mediatek_disable(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+ struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip);
+ u32 value;
+
+ value = readl(pc->regs);
+ value &= ~BIT(pwm->hwpwm);
+ writel(value, pc->regs);
+}
+
static int pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm,
int duty_ns, int period_ns)
{
@@ -183,35 +203,6 @@ static int pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm,
return ret;
}
-static int pwm_mediatek_enable(struct pwm_chip *chip, struct pwm_device *pwm)
-{
- struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip);
- u32 value;
- int ret;
-
- ret = pwm_mediatek_clk_enable(chip, pwm);
- if (ret < 0)
- return ret;
-
- value = readl(pc->regs);
- value |= BIT(pwm->hwpwm);
- writel(value, pc->regs);
-
- return 0;
-}
-
-static void pwm_mediatek_disable(struct pwm_chip *chip, struct pwm_device *pwm)
-{
- struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip);
- u32 value;
-
- value = readl(pc->regs);
- value &= ~BIT(pwm->hwpwm);
- writel(value, pc->regs);
-
- pwm_mediatek_clk_disable(chip, pwm);
-}
-
static int pwm_mediatek_apply(struct pwm_chip *chip, struct pwm_device *pwm,
const struct pwm_state *state)
{
@@ -221,8 +212,10 @@ static int pwm_mediatek_apply(struct pwm_chip *chip, struct pwm_device *pwm,
return -EINVAL;
if (!state->enabled) {
- if (pwm->state.enabled)
+ if (pwm->state.enabled) {
pwm_mediatek_disable(chip, pwm);
+ pwm_mediatek_clk_disable(chip, pwm);
+ }
return 0;
}
@@ -231,8 +224,11 @@ static int pwm_mediatek_apply(struct pwm_chip *chip, struct pwm_device *pwm,
if (err)
return err;
- if (!pwm->state.enabled)
- err = pwm_mediatek_enable(chip, pwm);
+ if (!pwm->state.enabled) {
+ err = pwm_mediatek_clk_enable(chip, pwm);
+ if (!err)
+ pwm_mediatek_enable(chip, pwm);
+ }
return err;
}
--
2.50.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v3 2/2] pwm: mediatek: Fix duty and period setting
2025-07-28 16:00 [PATCH v3 0/2] pwm: mediatek: Fix duty and period setting Uwe Kleine-König
2025-07-28 16:00 ` [PATCH v3 1/2] pwm: mediatek: Handle hardware enable and clock enable separately Uwe Kleine-König
@ 2025-07-28 16:00 ` Uwe Kleine-König
2025-07-29 10:07 ` [PATCH v3 0/2] " AngeloGioacchino Del Regno
2 siblings, 0 replies; 5+ messages in thread
From: Uwe Kleine-König @ 2025-07-28 16:00 UTC (permalink / raw)
To: Matthias Brugger, AngeloGioacchino Del Regno, John Crispin
Cc: linux-pwm, linux-arm-kernel, linux-mediatek
The period generated by the hardware is
(PWMDWIDTH + 1) << CLKDIV) / freq
according to my tests with a signal analyser and also the documentation.
The current algorithm doesn't consider the `+ 1` part and so configures
slightly too high periods. The same issue exists for the duty cycle
setting. So subtract 1 from both the register values for period and
duty cycle. If period is 0, bail out, if duty_cycle is 0, just disable
the PWM which results in a constant low output.
Fixes: caf065f8fd58 ("pwm: Add MediaTek PWM support")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
---
drivers/pwm/pwm-mediatek.c | 21 ++++++++++++++-------
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
index b6560e52c803..e4b595fc5a5e 100644
--- a/drivers/pwm/pwm-mediatek.c
+++ b/drivers/pwm/pwm-mediatek.c
@@ -170,7 +170,10 @@ static int pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm,
do_div(resolution, clk_rate);
cnt_period = DIV_ROUND_CLOSEST_ULL((u64)period_ns * 1000, resolution);
- while (cnt_period > 8191) {
+ if (!cnt_period)
+ return -EINVAL;
+
+ while (cnt_period > 8192) {
resolution *= 2;
clkdiv++;
cnt_period = DIV_ROUND_CLOSEST_ULL((u64)period_ns * 1000,
@@ -193,9 +196,16 @@ static int pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm,
}
cnt_duty = DIV_ROUND_CLOSEST_ULL((u64)duty_ns * 1000, resolution);
+
pwm_mediatek_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv);
- pwm_mediatek_writel(pc, pwm->hwpwm, reg_width, cnt_period);
- pwm_mediatek_writel(pc, pwm->hwpwm, reg_thres, cnt_duty);
+ pwm_mediatek_writel(pc, pwm->hwpwm, reg_width, cnt_period - 1);
+
+ if (cnt_duty) {
+ pwm_mediatek_writel(pc, pwm->hwpwm, reg_thres, cnt_duty - 1);
+ pwm_mediatek_enable(chip, pwm);
+ } else {
+ pwm_mediatek_disable(chip, pwm);
+ }
out:
pwm_mediatek_clk_disable(chip, pwm);
@@ -224,11 +234,8 @@ static int pwm_mediatek_apply(struct pwm_chip *chip, struct pwm_device *pwm,
if (err)
return err;
- if (!pwm->state.enabled) {
+ if (!pwm->state.enabled)
err = pwm_mediatek_clk_enable(chip, pwm);
- if (!err)
- pwm_mediatek_enable(chip, pwm);
- }
return err;
}
--
2.50.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH v3 0/2] pwm: mediatek: Fix duty and period setting
2025-07-28 16:00 [PATCH v3 0/2] pwm: mediatek: Fix duty and period setting Uwe Kleine-König
2025-07-28 16:00 ` [PATCH v3 1/2] pwm: mediatek: Handle hardware enable and clock enable separately Uwe Kleine-König
2025-07-28 16:00 ` [PATCH v3 2/2] pwm: mediatek: Fix duty and period setting Uwe Kleine-König
@ 2025-07-29 10:07 ` AngeloGioacchino Del Regno
2025-07-29 16:11 ` Uwe Kleine-König
2 siblings, 1 reply; 5+ messages in thread
From: AngeloGioacchino Del Regno @ 2025-07-29 10:07 UTC (permalink / raw)
To: Uwe Kleine-König, Matthias Brugger, John Crispin
Cc: linux-pwm, linux-arm-kernel, linux-mediatek
Il 28/07/25 18:00, Uwe Kleine-König ha scritto:
> Hello,
>
> here comes v3 of the (formerly patch, now) series to fix duty_cycle and
> period setting for the mediatek PWM driver.
>
> v2: https://lore.kernel.org/linux-pwm/20250724210041.2513590-2-u.kleine-koenig@baylibre.com
>
> Changes since v2:
>
> - Split changed clock handling into a separate patch (suggested by
> AngeloGioacchino)
> - Drop
>
> if (err < 0)
> return err;
>
> just before an unconditional
>
> return err;
>
> .
>
>
> I didn't add a R-b for AngeloGioacchino yet, as it felt wrong to do that
> for a patch that he didn't see before. So assuming you're happy, please
> provide the tag again for this v3.
>
For the whole series
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Cheers,
Angelo
> v1: https://lore.kernel.org/linux-pwm/20250710163705.2095418-2-u.kleine-koenig@baylibre.com
>
> Best regards
> Uwe
>
> Uwe Kleine-König (2):
> pwm: mediatek: Handle hardware enable and clock enable separately
> pwm: mediatek: Fix duty and period setting
>
> drivers/pwm/pwm-mediatek.c | 71 ++++++++++++++++++++------------------
> 1 file changed, 37 insertions(+), 34 deletions(-)
>
> base-commit: 68b9272ca7ac948b71aba482ef8244dee8032f46
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v3 0/2] pwm: mediatek: Fix duty and period setting
2025-07-29 10:07 ` [PATCH v3 0/2] " AngeloGioacchino Del Regno
@ 2025-07-29 16:11 ` Uwe Kleine-König
0 siblings, 0 replies; 5+ messages in thread
From: Uwe Kleine-König @ 2025-07-29 16:11 UTC (permalink / raw)
To: AngeloGioacchino Del Regno
Cc: Matthias Brugger, John Crispin, linux-pwm, linux-arm-kernel,
linux-mediatek
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On Tue, Jul 29, 2025 at 12:07:43PM +0200, AngeloGioacchino Del Regno wrote:
> Il 28/07/25 18:00, Uwe Kleine-König ha scritto:
> > Hello,
> >
> > here comes v3 of the (formerly patch, now) series to fix duty_cycle and
> > period setting for the mediatek PWM driver.
> >
> > v2: https://lore.kernel.org/linux-pwm/20250724210041.2513590-2-u.kleine-koenig@baylibre.com
> >
> > Changes since v2:
> >
> > - Split changed clock handling into a separate patch (suggested by
> > AngeloGioacchino)
> > - Drop
> >
> > if (err < 0)
> > return err;
> >
> > just before an unconditional
> >
> > return err;
> >
> > .
> >
> >
> > I didn't add a R-b for AngeloGioacchino yet, as it felt wrong to do that
> > for a patch that he didn't see before. So assuming you're happy, please
> > provide the tag again for this v3.
> >
>
> For the whole series
>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Thanks, I added a Cc: stable and applied it to
https://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux.git pwm/fixes
. Will give it a bit of time in next and then send it to Linus for
6.17-rc1.
Best regards
Uwe
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^ permalink raw reply [flat|nested] 5+ messages in thread