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[79.33.140.232]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43fe4cb1176sm52641843f8f.3.2026.04.23.01.27.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Apr 2026 01:27:26 -0700 (PDT) From: Andrea della Porta To: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , linux-pwm@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Broadcom internal kernel review list , Andrea della Porta , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Naushir Patuck , Stanimir Varbanov , mbrugger@suse.com Subject: [PATCH v3 0/3] Add RP1 PWM controller support Date: Thu, 23 Apr 2026 10:30:18 +0200 Message-ID: X-Mailer: git-send-email 2.51.0 Precedence: bulk X-Mailing-List: linux-pwm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This patchset adds support for the PWM controller found on the Raspberry Pi RP1 southbridge. This is necessary to operate the cooling fan connected to one of the PWM channels. The tachometer pin for the fan speed is managed by the firmware running on the RP1's M-core. It uses the PHASE2 register to report the RPM, which is then exported by this driver via syscon registers. A subsequent patch will add a new device and driver to read the RPM and export this value via hwmon. Subsequent patches will also add the CPU thermal zone, which acts as a consumer of the PWM device. Best regards, Andrea CHANGES in V3: - Refactored all the register macros. They now have RP1_PWM_ prefix and follow the register name. - Dropped the tab alignment in front of struct declarations (use a space instead). - Added a check in tohw() to test (and bail out quickly) in case that period_length_ns is zero. - Probing now returns an error if clk_rate > 1 GHz. - Added a check on minimum period ticks. Return 1 to signal round-up. - Fixed inverted polarity detection on edge cases. - Fixed rounding errors (in both tohwi() and fromhw()) in inverted polarity calculations. - Dropped a redundant check on period >= duty. - Replaced memset by inline struct init. - Disabling a channel now is faster, skipping the duty/period/polarity setup. - Fixed an error string (s/Fail/Failed) - Used %pe to signal error string instead of an integer. - Added several new sections to the Limitations paragraph to better explain what will happen on edge cases. - Maximum period is now U32_MAX-1 to allow 100% duty cycle on all selectable periods. - The hw period register now takes into account for the extra tick at the end of the period (subtracted one to wfhw->period_ticks in tohw and added 1 in fromhw). - Added .remove() callback to free resources even if the driver is not unbindable/unloadable, to avoid accumulating tech debt. Naushir Patuck (2): dt-bindings: pwm: Add Raspberry Pi RP1 PWM controller pwm: rp1: Add RP1 PWM controller driver Stanimir Varbanov (1): arm64: dts: broadcom: rpi-5: Add RP1 PWM node .../bindings/pwm/raspberrypi,rp1-pwm.yaml | 54 +++ .../boot/dts/broadcom/bcm2712-rpi-5-b.dts | 12 + arch/arm64/boot/dts/broadcom/rp1-common.dtsi | 10 + drivers/pwm/Kconfig | 9 + drivers/pwm/Makefile | 1 + drivers/pwm/pwm-rp1.c | 414 ++++++++++++++++++ 6 files changed, 500 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/raspberrypi,rp1-pwm.yaml create mode 100644 drivers/pwm/pwm-rp1.c -- 2.35.3