From: Christoph Hellwig <hch@lst.de>
To: Andrew Morton <akpm@linux-foundation.org>
Cc: Song Liu <song@kernel.org>, Yu Kuai <yukuai@fnnas.com>,
Li Nan <linan122@huawei.com>, Xiao Ni <xiao@kernel.org>,
linux-raid@vger.kernel.org
Subject: [PATCH 2/2] raid6/x86: register avx512 after avx2
Date: Wed, 27 May 2026 09:45:26 +0200 [thread overview]
Message-ID: <20260527074539.2292913-3-hch@lst.de> (raw)
In-Reply-To: <20260527074539.2292913-1-hch@lst.de>
This way non-benchmarks configs still get avx512 if supported.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
lib/raid/raid6/x86/pq_arch.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/lib/raid/raid6/x86/pq_arch.h b/lib/raid/raid6/x86/pq_arch.h
index 28e395eb04d1..02f8843b0537 100644
--- a/lib/raid/raid6/x86/pq_arch.h
+++ b/lib/raid/raid6/x86/pq_arch.h
@@ -60,16 +60,16 @@ static inline bool raid6_has_sse1_or_mmxext(void)
static __always_inline void __init arch_raid6_init(void)
{
if (raid6_has_avx2()) {
+ raid6_algo_add(&raid6_avx2x1);
+ raid6_algo_add(&raid6_avx2x2);
+ if (IS_ENABLED(CONFIG_X86_64))
+ raid6_algo_add(&raid6_avx2x4);
if (raid6_has_avx512()) {
raid6_algo_add(&raid6_avx512x1);
raid6_algo_add(&raid6_avx512x2);
if (IS_ENABLED(CONFIG_X86_64))
raid6_algo_add(&raid6_avx512x4);
}
- raid6_algo_add(&raid6_avx2x1);
- raid6_algo_add(&raid6_avx2x2);
- if (IS_ENABLED(CONFIG_X86_64))
- raid6_algo_add(&raid6_avx2x4);
} else if (IS_ENABLED(CONFIG_X86_64) || raid6_has_sse2()) {
/* x86_64 can assume SSE2 as baseline */
raid6_algo_add(&raid6_sse2x1);
--
2.53.0
prev parent reply other threads:[~2026-05-27 7:45 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-27 7:45 incremental fixes for "cleanup the RAID6 P/Q library v3" Christoph Hellwig
2026-05-27 7:45 ` [PATCH 1/2] raid6: remove duplicate ccflags-y line Christoph Hellwig
2026-05-27 7:45 ` Christoph Hellwig [this message]
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