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From: sashiko-bot@kernel.org
To: "Eric Biggers" <ebiggers@kernel.org>
Cc: yukuai@fygo.io, linux-raid@vger.kernel.org
Subject: Re: [PATCH RESEND] raid6: add missing vzeroupper to AVX-512 code
Date: Mon, 31 Aug 2026 22:07:54 +0000	[thread overview]
Message-ID: <20260831220754.8CD601F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260831212316.213896-1-ebiggers@kernel.org>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:

Pre-existing issues:
- [High] Missing `vzeroupper` in AVX and AVX2 RAID6 and XOR implementations
- [High] Missing `vzeroupper` in ARIA GFNI AVX512 crypto routines
--

commit c86f8a80ee519a29f4ac71611d625cca2868db38
Author: Eric Biggers <ebiggers@kernel.org>
raid6: add missing vzeroupper to AVX-512 code

This commit adds vzeroupper to the AVX-512 optimized RAID6 routines before
returning, preventing performance degradation of subsequent SSE code.

> diff --git a/lib/raid/raid6/x86/avx512.c b/lib/raid/raid6/x86/avx512.c
> --- a/lib/raid/raid6/x86/avx512.c
> +++ b/lib/raid/raid6/x86/avx512.c
> @@ -78,6 +78,7 @@ static void raid6_avx5121_gen_syndrome(int disks, size_t bytes, void **ptrs)
>  	}
>  
>  	asm volatile("sfence" : : : "memory");
> +	asm volatile("vzeroupper");
>  	kernel_fpu_end();
>  }

[Severity: High]
This is a pre-existing issue, but does this incomplete fix also need to
address the conceptually identical AVX/AVX2 implementations?

For example, in lib/raid/raid6/x86/avx2.c:raid6_avx21_gen_syndrome():

	asm volatile("sfence" : : : "memory");
	kernel_fpu_end();

And similarly in lib/raid/raid6/x86/recov_avx2.c:raid6_2data_recov_avx2()
and lib/raid/xor/x86/xor-avx.c:xor_gen_avx(). These routines use YMM
registers but return to other kernel paths without clearing the upper state.

[Severity: High]
This isn't a bug introduced by this patch, but are there other areas in the
kernel that need a similar fix? For example, in the crypto subsystem, the
ARIA GFNI AVX512 routines dirty ZMM registers but omit the vzeroupper.

arch/x86/crypto/aria_gfni_avx512_glue.c:aria_avx512_ctr_encrypt():

			kernel_fpu_begin();
			aria_ops.aria_ctr_crypt_64way(ctx, dst, src,
						      &req_ctx->keystream[0],
						      walk.iv);
			kernel_fpu_end();

And in arch/x86/crypto/aria-gfni-avx512-asm_64.S:aria_gfni_avx512_encrypt_64way(),
the assembly implementation returns without issuing a vzeroupper to clear
the upper state of the ZMM registers.

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260831212316.213896-1-ebiggers@kernel.org?part=1

  reply	other threads:[~2026-08-31 22:07 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-31 21:23 [PATCH RESEND] raid6: add missing vzeroupper to AVX-512 code Eric Biggers
2026-08-31 22:07 ` sashiko-bot [this message]
2026-08-31 22:09   ` Eric Biggers

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