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From: sashiko-bot@kernel.org
To: "Eric Biggers" <ebiggers@kernel.org>
Cc: linux-raid@vger.kernel.org, yukuai@fygo.io
Subject: Re: [PATCH RESEND] raid6: add missing vzeroupper to AVX2 code
Date: Mon, 31 Aug 2026 22:12:36 +0000	[thread overview]
Message-ID: <20260831221236.DC9311F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260831212308.213855-1-ebiggers@kernel.org>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] The patch adds `vzeroupper` to AVX2 functions to avoid AVX-to-SSE transition penalties, but fails to apply the same necessary fix to the corresponding AVX-512 functions which suffer from the exact same issue.
--

commit 51aca22e4c3be53f90a7f330d0ca103da02290ab
Author: Eric Biggers <ebiggers@kernel.org>

raid6: add missing vzeroupper to AVX2 code

This patch adds the vzeroupper instruction to the AVX2 optimized RAID6
code before returning. This prevents degrading the performance of
subsequent legacy SSE code by avoiding hardware transition penalties.

> diff --git a/lib/raid/raid6/x86/avx2.c b/lib/raid/raid6/x86/avx2.c
> index 7d829c669ea79..3cc2fe7ac42c5 100644
> --- a/lib/raid/raid6/x86/avx2.c
> +++ b/lib/raid/raid6/x86/avx2.c
> @@ -67,6 +67,7 @@ static void raid6_avx21_gen_syndrome(int disks, size_t bytes, void **ptrs)
>  	}
>  
>  	asm volatile("sfence" : : : "memory");
> +	asm volatile("vzeroupper");

[Severity: High]
This isn't a bug introduced by this patch, but do the AVX-512 versions of
this code need the same fix?

In lib/raid/raid6/x86/avx512.c:raid6_avx5121_gen_syndrome():

	asm volatile("sfence" : : : "memory");
	kernel_fpu_end();

And in lib/raid/raid6/x86/recov_avx512.c:raid6_2data_recov_avx512():

	}

	kernel_fpu_end();

The AVX-512 syndrome generation and recovery functions exit leaving ZMM
registers dirty without calling vzeroupper. Without vzeroupper after using
ZMM0-ZMM15 registers, the CPU remains in a dirty upper state. This flaw
appears to be mirrored across all AVX-512 functions in these files.

If subsequent kernel code on the same CPU core executes legacy 128-bit SSE
instructions before the state is cleared, could this cause severe hardware
transition penalties that degrade overall crypto or networking performance
and cause a performance regression?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260831212308.213855-1-ebiggers@kernel.org?part=1

      reply	other threads:[~2026-08-31 22:12 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-31 21:23 [PATCH RESEND] raid6: add missing vzeroupper to AVX2 code Eric Biggers
2026-08-31 22:12 ` sashiko-bot [this message]

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