Code base for rework of ppc440SPe ADMA driver

[Anatolij Gustschin <agust@denx.de>]

Hello Dan,

Currently I am trying to estimate efforts for rework of the
ppc440SPe ADMA driver for inclusion in mainline Linux and a couple of
questions have arisen. As the current ASYNC_TX API in mainline Linux
doesn't contain support for RAID6 offload operations, the current
ppc440SPe ADMA driver have to be reworked to support RAID5 operations
only which would be a step backward and also would require some
changes in the ASYNC_TX code to cope with large dma_addr_t addresses.
Therefore my understanding is that the rework of the ADMA driver for
inclusion in mainline should be better based on code from your raid6
branch. Or what would be a better base?

If I understand it correctly initially the intention was to place
this work in linux-next and probably submit a pull request towards
the end of the 2.6.31 merge window. Is there any plan to proceed with
this?  Did you get a chance to look at per-cpu implementation for the
scribble-buffer?

Thanks,
Anatolij

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