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From: "Steve Wise" <swise-7bPotxP6k4+P2YhJcF5u+vpXobYPEAuW@public.gmane.org>
To: 'Jason Gunthorpe'
	<jgunthorpe-ePGOBjL8dl3ta4EC/59zMFaTQe2KTcn/@public.gmane.org>,
	'Leon Romanovsky' <leon-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: 'RDMA mailing list' <linux-rdma-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: RE: Endianess in cxgb4
Date: Tue, 24 Oct 2017 14:31:05 -0500	[thread overview]
Message-ID: <06a801d34cfe$a2563840$e702a8c0$@opengridcomputing.com> (raw)
In-Reply-To: <20171024185506.GE1806-ePGOBjL8dl3ta4EC/59zMFaTQe2KTcn/@public.gmane.org>

> On Tue, Oct 24, 2017 at 09:37:59PM +0300, Leon Romanovsky wrote:
> > Hi Steve,
> >
> > I reviewed my reports from various static checkers and saw strange code
> > in build_tpte_memreg() function that in drivers/infiniband/hw/cxgb4/qp.c.
> >
> > That function has following code:
> >  614         fr->r2 = cpu_to_be32(0);
> >  615         fr->stag = cpu_to_be32(mhp->ibmr.rkey);
> >
> > The r2, stag and rkey are u32, why do you need cpu_to_be32() conversion?
> >
> > The error report which I got is:
> >
> >  134 drivers/infiniband/hw/cxgb4/qp.c:614:16: warning: incorrect type in
> assignment (different base types)
> >  135 drivers/infiniband/hw/cxgb4/qp.c:614:16:    expected unsigned int
[unsigned]
> [usertype] r2
> >  136 drivers/infiniband/hw/cxgb4/qp.c:614:16:    got restricted __be32
[usertype]
> <noident>
> >  137 drivers/infiniband/hw/cxgb4/qp.c:615:18: warning: incorrect type in
> assignment (different base types)
> >  138 drivers/infiniband/hw/cxgb4/qp.c:615:18:    expected unsigned int
[unsigned]
> [usertype] stag
> >  139 drivers/infiniband/hw/cxgb4/qp.c:615:18:    got restricted __be32
[usertype]
> <noident>
> 
> I looked at cxgb in userspace and gave up. It seemed to be storing be
> and host values in the same memory locations :(

The Terminator HW/FW WRs are in BE always, with the exception that something
"opaque and owned by the host" is in HBO.  The only one I can think of is the
wrid field in each Terminator SQE.  It is provided by the host in each WR, and
is opaque to the HW/FW.  That is, the HW/FW does not interpret this 16b field,
but simply reflects it in the corresponding CQE.  

See my reply to Leon regarding the above issue...

Steve.

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      parent reply	other threads:[~2017-10-24 19:31 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-24 18:37 Endianess in cxgb4 Leon Romanovsky
     [not found] ` <20171024183759.GK16127-U/DQcQFIOTAAJjI8aNfphQ@public.gmane.org>
2017-10-24 18:45   ` Steve Wise
2017-10-24 19:01     ` Leon Romanovsky
     [not found]       ` <20171024190142.GM16127-U/DQcQFIOTAAJjI8aNfphQ@public.gmane.org>
2017-10-25 14:48         ` Steve Wise
2017-10-25 15:38           ` Leon Romanovsky
     [not found]             ` <20171025153856.GT16127-U/DQcQFIOTAAJjI8aNfphQ@public.gmane.org>
2017-10-25 15:46               ` Steve Wise
2017-10-24 18:55   ` Jason Gunthorpe
     [not found]     ` <20171024185506.GE1806-ePGOBjL8dl3ta4EC/59zMFaTQe2KTcn/@public.gmane.org>
2017-10-24 19:31       ` Steve Wise [this message]

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